® FQA13N50C 500V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction, electronic lamp ballasts based on half bridge topology. • • • • • • 13.5A, 500V, RDS(on) = 0.48Ω @VGS = 10 V Low gate charge ( typical 43 nC) Low Crss ( typical 20pF) Fast switching 100% avalanche tested Improved dv/dt capability D ! ● ◀ G! TO-3P Absolute Maximum Ratings Symbol VDSS ID ! FQA Series G DS S TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQA13N50C 500 Units V 13.5 A - Continuous (TC = 100°C) IDM Drain Current ▲ ● ● - Pulsed (Note 1) 8.5 A 54 A VGSS Gate-Source Voltage ± 30 V EAS Single Pulsed Avalanche Energy (Note 2) 860 mJ IAR Avalanche Current (Note 1) 13.5 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 21.8 4.5 218 1.56 -55 to +150 mJ V/ns W W/°C °C 300 °C dv/dt PD TJ, TSTG TL (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case Typ -- RθJS Thermal Resistance, Case-to-Sink Typ. 0.24 -- °C/W RθJA Thermal Resistance, Junction-to-Ambient -- 40 °C/W ©2004 Fairchild Semiconductor Corporation Max 0.58 Units °C/W Rev. A, October 2004 FQA13N50C QFET Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 500 -- -- V -- 0.5 -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C IDSS IGSSF IGSSR VDS = 500 V, VGS = 0 V -- -- 1 µA VDS = 400 V, TC = 125°C -- -- 10 µA Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 6.75 A -- 0.39 0.48 Ω gFS Forward Transconductance VDS = 40 V, ID = 6.75 A -- 15 -- S -- 1580 2055 pF -- 180 235 pF -- 20 25 pF (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 250 V, ID = 13.5 A, RG = 25 Ω (Note 4, 5) VDS = 400 V, ID = 13.5 A, VGS = 10 V (Note 4, 5) -- 25 60 ns -- 100 210 ns -- 130 270 ns -- 100 210 ns -- 43 56 nC -- 7.5 -- nC -- 18.5 -- nC A Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 13 ISM -- -- 52 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 13.5 A Drain-Source Diode Forward Voltage -- -- 1.4 V trr Reverse Recovery Time -- 410 -- ns Qrr Reverse Recovery Charge -- 4.5 -- µC VGS = 0 V, IS = 13.5 A, dIF / dt = 100 A/µs (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 5.6mH, IAS = 13.5A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 13.5A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2004 Fairchild Semiconductor Corporation Rev. A, October 2004 FQA13N50C Electrical Characteristics FQA13N50C Typical Characteristics VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V Top : ID, Drain Current [A] 1 10 ID, Drain Current [A] 1 10 0 10 o 150 C o -55 C o 25 C 0 10 ※ Notes : 1. 250µ s Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 40V 2. 250µs Pulse Test -1 -1 10 10 -1 0 10 2 1 10 10 4 6 10 1.5 VGS = 10V 1.0 VGS = 20V 0.5 Figure 2. Transfer Characteristics IDR, Reverse Drain Current [A] Figure 1. On-Region Characteristics RDS(ON) [Ω ], Drain-Source On-Resistance 8 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] 1 10 0 10 150℃ ※ Notes : 1. VGS = 0V 2. 250µs Pulse Test 25℃ ※ Note : TJ = 25℃ -1 0 5 10 15 20 25 30 10 35 0.2 0.4 ID, Drain Current [A] 0.6 0.8 1.0 1.2 1.4 VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 12 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 2500 Capacitance [pF] Ciss 2000 Coss 1500 ※ Notes ; 1. VGS = 0 V 2. f = 1 MHz 1000 Crss 500 VDS = 100V 10 VGS, Gate-Source Voltage [V] 3000 VDS = 250V VDS = 400V 8 6 4 2 ※ Note : ID = 13.5A 0 0 -1 10 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2004 Fairchild Semiconductor Corporation 0 10 20 30 40 50 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A, October 2004 (Continued) 1.2 3.0 RDS(ON), (Normalized) Drain-Source On-Resistance BVDSS, (Normalized) Drain-Source Breakdown Voltage FQA13N50C Typical Characteristics 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 µA 0.9 0.8 -100 -50 0 50 100 150 2.5 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 6.75 A 0.5 0.0 -100 200 -50 50 100 150 200 o TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature Figure 8. On-Resistance Variation vs Temperature 14 Operation in This Area is Limited by R DS(on) 2 10 12 10 µs ID, Drain Current [A] ID, Drain Current [A] 0 TJ, Junction Temperature [ C] o 100 µs 1 ms 1 10 10 ms 100 ms DC 0 10 ※ Notes : 10 8 6 4 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse 2 -1 10 0 10 1 2 10 0 25 3 10 10 50 75 100 125 150 VDS, Drain-Source Voltage [V] TC, Case Temperature [℃] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs Case Temperature Zθ JC(t), Thermal Response 10 0 D = 0 .5 0 .2 10 ※ N o te s : 1 . Z θ J C (t) = 0 .5 8 ℃ /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C (t) -1 0 .1 0 .0 5 PDM 0 .0 2 t1 0 .0 1 10 10 t2 s in g le p u ls e -2 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 11. Transient Thermal Response Curve for FQA13N50C ©2004 Fairchild Semiconductor Corporation Rev. A, October 2004 FQA13N50C Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ 200nF 12V Qg 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RG RL VDS 90% VDD VGS VGS DUT 10V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp ©2004 Fairchild Semiconductor Corporation ID (t) VDS (t) VDD tp Time Rev. A, October 2004 FQA13N50C Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2004 Fairchild Semiconductor Corporation Rev. A, October 2004 FQA13N50C Package Dimensions TO-3P 15.60 ±0.20 3.00 ±0.20 3.80 ±0.20 +0.15 1.00 ±0.20 18.70 ±0.20 23.40 ±0.20 19.90 ±0.20 1.50 –0.05 16.50 ±0.30 2.00 ±0.20 9.60 ±0.20 4.80 ±0.20 3.50 ±0.20 13.90 ±0.20 ø3.20 ±0.10 12.76 ±0.20 13.60 ±0.20 1.40 ±0.20 +0.15 5.45TYP [5.45 ±0.30] 5.45TYP [5.45 ±0.30] 0.60 –0.05 Dimensions in Millimeters ©2004 Fairchild Semiconductor Corporation Rev. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2004 Fairchild Semiconductor Corporation Rev. I13