MPQ4558 1A, 2MHz, 55V Step-Down Converter AEC-Q100 Qualified The Future of Analog IC Technology DESCRIPTION FEATURES The MPQ4558 is a high-frequency, step-down switching regulator with an integrated internal high-side high-voltage power MOSFET. It provides up to a 1A output with current-mode control for fast loop response and easy compensation. • The wide 3.8V-to-55V input range accommodates a variety of step-down applications, including automotive input. A 12µA shutdown-mode supply current makes it suitable for battery-powered applications. • • • • • • • • • A scaled-down switching frequency in light-load conditions provides high power-conversion efficiency over a wide load range while reducing switching and gate driver losses. • Guaranteed Industrial/Automotive Temperature Range Limits Wide 3.8V-to-55V Operating Input Range 250mΩ Internal Power MOSFET Up to 2MHz Programmable Switching Frequency 140μA Quiescent Current Stable with Ceramic Capacitors Internal Soft-Start Up to 95% Efficiency Output Adjustable from 0.8V to 52V Available in SOIC8E and 3mm x 3mm QFN10 Packages Available in AEC-Q100 Grade 1 APPLICATIONS The frequency fold-back prevents inductor current runaway during startup and thermal shutdown provides reliable, fault-tolerant operation. • • • • • By switching at 2MHz, the MPQ4558 can prevent EMI (electromagnetic interference) noise problems, such as those found in AM radio and ADSL applications. High-Voltage Power Conversion Automotive Systems Industrial Power Systems Distributed Power Systems Battery Powered Systems All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. The MPQ4558 is available in an SOIC8E and a 10-pin 3mm x 3mm QFN package. TYPICAL APPLICATION Efficiency @VOUT=3.3V fs=500kHz C4 680pF COMP CONTROL EN R3 200k BST MPQ4558 FREQ FB R2 40.2k VIN C1 C3 100nF SW GND VIN 8V to 55V L1 C2 D1 VOUT 3.3V @ 1A R1 127k EFFICIENCY (%) R4 24k 100 90 80 70 60 50 VIN=12V VIN=55V 40 30 20 10 0 0 0.5 0.75 0.25 OUTPUT CURRENT (A) MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 1 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED ORDERING INFORMATION Part Number MPQ4558DN* MPQ4558DQ** MPQ4558DQ-AEC1*** Package SOIC8E QFN10 (3 x 3mm) QFN10 (3 x 3mm) Top Marking MP4558DN ABP ABP Junction Temperature (TJ) -40°C to +125°C * For Tape & Reel, add suffix –Z (e.g. MPQ4558DN–Z) For RoHS Compliant Packaging, add suffix –LF, (e.g. MPQ4558DN–LF–Z) ** For Tape & Reel, add suffix –Z (e.g. MPQ4558DQ–Z) For RoHS Compliant Packaging, add suffix –LF, (e.g. MPQ4558DQ–LF–Z) ***Available End Sept. 2011 PACKAGE REFERENCE TOP VIEW TOP VIEW SW 1 8 BST SW 1 10 BST EN 2 7 VIN SW 2 9 VIN EN 3 8 VIN COMP 4 7 FREQ FB 5 6 GND COMP 3 6 FREQ FB 4 5 GND EXPOSED PAD EXPOSED PAD ON BACKSIDE SOIC8E QFN10 (3mm x 3mm) ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage (VIN).....................–0.3V to +60V Switch Voltage (VSW)..........–0.5V to (VIN + 0.5V) BST to SW .....................................–0.3V to +5V All Other Pins .................................–0.3V to +5V Continuous Power Dissipation (TJ = +25°C)(2) SOIC8E……………………………………….2.5W QFN10………………………………………. 2.5W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature.............. –65°C to +150°C Recommended Operating Conditions (3) Supply Voltage VIN ...........................3.8V to 55V Output Voltage VOUT .........................0.8V to 52V Maximum Junction Temp. (TJ) ................ 125°C Thermal Resistance (4) θJA θJC SOIC8E ...................................50 ...... 10 ... °C/W QFN10(3mm x 3mm) ..............50 ...... 12 ... °C/W Notes: 1) Exceeding these ratings may damage the device 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7 4-layer board. MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED ELECTRICAL CHARACTERISTICS VIN = 12V, VEN = 2.5V, VCOMP = 1.4V, TJ= –40°C to +125°C. Typical Values are at TJ=25°C, unless otherwise noted. Parameter Symbol Condition Feedback Voltage VFB Feedback Leakage Current IFB Upper Switch On Resistance (5) RDS(ON) Upper Switch Leakage ISW Current Limit ILIM COMP to Current Sense Transconductance Error Amp Voltage Gain Error Amp Transconductance Error Amp Min Source current Error Amp Min Sink current TJ=25°C 4.5V < VIN < 55V -40°C≤TJ≤85°C -40°C≤TJ≤125°C VBST – VSW = 5V TJ=25°C VEN = 0V, VSW = 0V TJ=25°C Duty cycle ≤60% 175 160 1.3 1.1 GCS ICOMP = ±3µA VFB = 0.7V VFB = 0.9V TJ=25°C VIN UVLO Threshold VIN UVLO Hysteresis Soft-Start Time (5) 2.7 2.4 0V < VFB < 0.8V TJ=25°C Oscillator Frequency fSW RFREQ = 95kΩ Shutdown Supply Current Quiescent Supply Current Thermal Shutdown Minimum Off Time Minimum On Time (5) IS IQ VEN < 0.3V No load, VFB = 0.9V (no switching) Hysteresis = 20°C EN Rising Threshold Min 0.780 0.772 0.766 0.19 0.8 0.7 tOFF tON TJ=25°C EN Threshold Hysteresis 1.4 1.3 Typ 0.800 0.1 250 1 1.9 Max 0.820 0.829 0.829 1.0 330 400 Units V μA mΩ μA 3.5 3.7 A 5.7 A/V 400 120 10 -10 3.0 V/V µA/V µA µA V 0.35 0.5 1 12 140 150 100 100 1.55 320 3.3 3.6 1.2 1.3 20 200 1.7 1.8 V ms MHz µA µA °C ns ns V mV Notes: 5) Derived from bench characterization. Not tested in production.. MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED PIN FUNCTIONS SOIC8 Pin # QFN10 Pin# 1 1, 2 2 3 3 4 4 5 5 6 6 7 7 8, 9 8 10 Name Description Switch Node. Output of the high-side switch. Requires a low VF Schottky rectifier to ground. Place the rectifier close to the SW pins to reduce switching spikes. Enable Input. Pull this pin below the specified threshold to shut the chip down. Pull EN it above the specified threshold or leaving it floating to enable the chip. Compensation. GM error amplifier output. Apply control-loop frequency COMP compensation to this pin. Feedback. Input to the error amplifier. Connect an external resistive divider FB between the output and GND: Compare to the internal +0.8V reference to set the regulation voltage. GND, Ground. Connect as close as possible to the output capacitor and avoid highExposed current switching paths. Connect the exposed pad to GND plane for optimal pad thermal performance. Switching Frequency Program Input. Connect a resistor from this pin to ground to FREQ set the switching frequency. Input Supply. Supplies power to all the internal control circuitry, both BS VIN regulators, and the high-side switch. Place a decoupling capacitor to ground close to this pin to minimize switching spikes. Bootstrap. Positive power supply for the internal floating high-side MOSFET driver. BST Connect a bypass capacitor between this pin and the SW pin. SW MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED TYPICAL CHARACTERISTICS On Resistance vs. Junction Temperature 2.2 2.2 450 2.0 2.0 IPEAK_LIMIT (A) 400 350 300 250 1.8 1.6 1.4 150 -50 -25 0 25 50 1.0 0% 75 100 125 Vin Start-up vs. Junction Temperature 40% 60% DUTY CYCLE 3.15 3.10 3.05 3.00 2.95 0 25 50 75 100 125 2.67 2.64 2.61 2.58 2.55 -50 -25 0 25 50 75 100 125 1.45 1.40 1.35 1.30 -50 -25 0.800 0.795 0.790 0.785 0.780 -50 -25 SWITCHING FREQUENCY (kHz) VEN LOW VOLTAGE(V) VEN HIGH VOLTAGE(V) 1.50 0 25 50 75 100 125 75 100 125 0 25 50 75 100 125 0 25 50 75 100 125 510 1.70 1.55 50 0.805 1.26 1.60 25 Venable-low vs. Junction Temperature 1.75 1.65 0 0.810 2.70 Venable-high vs. Junction Temperature 1.4 Voltage Reference vs. Junction Temperature VOLTAGE REFERENCE (V) 3.20 1.6 1.0 -50 -25 80% 2.73 VIN SHUT-DOWN VOLTAGE(V) VIN START-UP VOLTAGE(V) 20% Vin Shut-down vs. Junction Temperature 3.25 1.8 1.2 1.2 200 2.90 -50 -25 IPEAK_LIMIT (A) 500 1.25 1.24 1.23 1.22 1.21 -50 -25 0 25 50 75 100 125 505 500 495 490 485 480 -50 -25 MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED TYPICAL CHARACTERISTICS (continued) Frequency vs. FREQ Resistor SWITCHING FREQUENCY (kHz) SWITCHING FREQUENCY (kHz) 2000 1500 1000 500 0 0 100 200 300 400 500 600 170 500 160 150 400 140 300 130 200 120 100 110 0 100 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 10 Vin Quiescent Current vs. Junction Temperature VIN=12V 170 30 40 50 60 Shutdown Current vs. Junction Temperature VIN=12V 20 18 160 20 INPUT VOLTAGE(V) FEEDBACK VOLTAGE(V) 16 15 150 14 140 12 130 10 120 5 8 110 100 -50 -25 10 0 25 50 75 100 125 6 0 10 20 30 40 50 INPUT VOLTAGE(V) 60 0 -50 -25 0 25 MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 50 75 100 125 6 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, VOUT =3.3V, C1 = 4.7µF, C2 = 22µF, L1 = 10µH and TJ = 25°C, unless otherwise noted. Efficiency @VOUT=5V 90 100 VIN=12V 80 80 EFFICIENCY ( ) EFFICIENCY ( ) VIN=48V 60 50 40 30 20 VIN=55V 70 60 50 Vsw 10V/div 40 30 20 IL 500mA/div 0 0 0.25 0.5 0.75 1 0.25 0 0.75 1 Output Voltage Ripple Start up Start up IOUT=1A IOUT=0.1A IOUT=1A VOUT AC Coupled 10mV/div Vsw 10V/div IL 1A/div VEN 2V/div V EN 2V/div VOUT 2V/div V OUT 2V/div Vsw 10V/div IL 1A/div V sw 10V/div Shut down LI 1A/div IShut =1A down IOUT=0.1A EN 0.5 OUTPUT CURRENT (A) OUTPUT CURRENT (A) 2V/div VOUT AC Coupled 10mV/div 10 10 0 IOUT=0.1A VIN=12V 90 70 Output Voltage Ripple Short Circuit Entry IOUT=0.1A to Short OUT VEN 2V/div OUT OUT VOUT 2V/div sw 10V/div IL 1A/div Vsw 10V/div 2V/div IL 1A/div 2V/div sw 10V/div IL 1A/div MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, VOUT =3.3V, C1 = 4.7µF, C2 = 22µF, L1 = 10µH and TJ= 25°C, unless otherwise noted. Short Circuit Steady State Short Circuit Recovery IOUT=Short to 0A VOUT 2V/div VOUT 2V/div Vsw 10V/div Vsw 10V/div IL 1A/div IL 2A/div MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED BLOCK DIAGRAM VIN REFERENCE UVLO EN INTERNAL REGULATORS BST ISW 0.5ms SS -+ SS LOGIC SW FB SS 0V8 -- COMP + OSCILLATOR COMP GND FREQ Figure 1: Functional Block Diagram OPERATION The MPQ4558 is a programmable-frequency, non-synchronous, step-down, switching regulator with an integrated high-side, high-voltage power MOSFET. It provides a single, highly efficient solution with current-mode control for fast loop response and easy compensation. It features a wide input voltage range, internal soft-start control, and precision current limiting. Its very low operational quiescent current makes it suitable for battery-powered applications. PWM Control Mode At moderate-to-high output current, the MPQ4558 operates in a fixed-frequency, peakcurrent–control mode to regulate the output voltage. The internal clock initiates a PWM cycle. The power MOSFET turns on and remains on until its current reaches the value set by the COMP voltage. When the power MOSFET is off, it remains off for at least 100ns before the next cycle starts. If, in one PWM period, the power MOSFET current does not reach the COMP set current value, the power MOSFET remains on to saves on a turn-off operation. Pulse-Skipping Mode Under light-load condition, the switching frequency drops to zero to reduce switching and driving losses. Error Amplifier The error amplifier compares the FB pin voltage with the internal reference (REF) and outputs a current proportional to the difference between the two. This output current then charges the external compensation network to form the COMP voltage, which controls the power MOSFET current. While in operation, the minimum COMP voltage is clamped to 0.9V and its maximum is clamped to 2.0V. COMP is internally pulled down to GND in shutdown mode. Avoid pulling COMP up beyond 2.6V. MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED Internal Regulator The 2.6V internal regulator powers most of the internal circuits. This regulator takes the VIN input and operates in the full VIN range. When VIN exceeds 3.0V, the output of the regulator is in full regulation: When VIN is less than 3.0V, the output drops to 0V. Enable Control The MPQ4558 has a dedicated enable control pin (EN): An input voltage that exceeds an upper threshold enables the chip, while a voltage the drops below a lower threshold disables the chip. Its falling threshold is precisely 1.2V, and its rising threshold is 300mV higher, or 1.5V. When floating, EN is pulled up to about 3.0V by an internal 1µA current source to enable the chip. Pulling it down requires a 1µA current. When EN drops below 1.2V, the chip enters the lowest shutdown current mode. When EN exceeds 0V but remains below its rising threshold, the chip is still in shutdown mode but with a slightly higher shutdown current. Under-Voltage Lockout Under-voltage lockout (UVLO) protects the chip from operating at an insufficient supply voltage. The UVLO rising threshold is about 3.0V while its falling threshold is a consistent 2.6V. Internal Soft-Start Soft-Start prevents the converter output voltage from overshooting during start-up and shortcircuit recovery. When the chip starts, the internal circuitry generates a soft-start (SS) voltage that ramps up from 0V to 2.6V. When this voltage is less than the internal reference (REF), SS overrides REF so the error amplifier uses SS as the reference. When SS exceeds REF, REF regains control. Thermal Shutdown Thermal shutdown prevents the chip from operating at exceedingly high temperatures. When the silicon die temperature exceeds its upper threshold, it shuts down the whole chip. When the temperature falls below its lower threshold, the chip is enabled again. Floating Driver and Bootstrap Charging An external bootstrap capacitor powers the floating power MOSFET driver. This floating driver has its own UVLO protection with a rising threshold of 2.2V and a hysteresis of 150mV. The driver’s UVLO is connected to the SS: If the bootstrap voltage hits its UVLO, the soft-start circuit resets. To prevent noise, there is 20µs delay before the reset action. When the device exits the bootstrap UVLO condition, the reset turns off and then soft-start process resumes. The dedicated internal bootstrap regulator charges and regulates the bootstrap capacitor to about 5V. When the voltage between the BST and SW nodes falls below regulation, a PMOS pass transistor connected from VIN to BST turns on. The charging current path goes from VIN, to BST and then to SW. The external circuit must provide enough voltage headroom to facilitate charging. As long as VIN is sufficiently higher than SW, the bootstrap capacitor will charge. When the power MOSFET is ON, VIN is about equal to SW so the bootstrap capacitor cannot charge. When the external diode is on, the difference between VIN and SW is at its largest, thus making it the best period to charge. When there is no current in the inductor, SW equals the output voltage VOUT so the difference between VIN and VOUT can charge the bootstrap capacitor. Under higher duty-cycle operation conditions, the time period available for bootstrap charging is smaller so the bootstrap capacitor may not sufficiently charge. In case the internal circuit does not have sufficient voltage and the bootstrap capacitor is not charged, extra external circuitry can ensure the bootstrap voltage is in the normal operational region. Refer to the External Bootstrap Diode in Application section. The DC quiescent current of the floating driver is about 20µA. Make sure the bleeding current at the SW node is higher than this value, such that: IO + VO > 20μA (R1 + R2) MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED Current Comparator and Current Limit A current-sense MOSFET accurately senses the current in the power MOSFET. This signal is then fed to the high speed current comparator for current-mode–control purposes, which uses it as one of its inputs with the COMP voltage. When the power MOSFET turns on, the comparator is first blanked until the end of the turn-on transition to avoid noise issues. When the sensed current exceeds the COMP voltage, the comparator output is low and the power MOSFET turns off. The cycle-by-cycle maximum current of the internal power MOSFET is internally limited. Short-Circuit Protection When the output is shorted to the ground, the switching frequency folds back and the current limit falls to reduce the short circuit current. When the FB voltage equals 0V, the current limit falls to about 50% of its full current limit. The FB voltage reaches its 100% of its current limit when it exceeds 0.4V When the short-circuit FB voltage is low, the SS drops by VFB and SS ≈ VFB + 100mV. If the short circuit is removed, the output voltage recovers at the SS rate. When FB is high enough, the frequency and current limit return to normal values. Startup and Shutdown If both VIN and VEN exceed their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. While the internal supply rail is up, an internal timer blanks the power MOSFET OFF for about 50µs to avoid start-up glitches. When the internal soft-start block is enabled, it first holds its SS output low to ensure the other circuits are ready and then slowly ramps up. Three events can shut down the chip: EN low, VIN low and thermal shutdown. In shutdown, the power MOSFET turns off first to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. Programmable Oscillator An external resistor—RFREQ connected from the FREQ pin to GND—sets the MPQ4558 oscillating frequency. Calculate the value of RFREQ from: RFREQ (kΩ) = 100000 -5 fS (kHz) For fSW=500kHz, RFREQ=195kΩ. MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED APPLICATION INFORMATION COMPONENT SELECTION Setting the Output Voltage Set the output voltage with a resistor divider between the output voltage and the FB pin. The voltage divider drops the output voltage down to the feedback voltage by the ratio: VFB =VOUT × R2 R1+R2 Thus the output voltage is: VOUT =VFB × R1+R2 R2 For example, for R2 = 10kΩ, R1 can be determined by: R1 = 12.5 × (VOUT − 0.8)(kΩ) For example, for a 3.3V output voltage, R2 is 10kΩ, and R1 is 31.6kΩ. Inductor The inductor supplies constant current to the output load while being driven by the switched input voltage. A larger value inductor will result in less ripple current that will lower the output ripple voltage. However, a larger-valued inductor is physically larger, has a higher series resistance, or lower saturation current. maximum switch current limit. Also, make sure that the peak inductor current is below the maximum switch current limit. Calculate the inductance value with: L1= VOUT fs × ΔIL × (1- VOUT VIN ) Where: • VOUT is the output voltage, • VIN is the input voltage, • fS is the switching frequency, and • ∆IL is the peak-to-peak inductor ripple current. Choose an inductor that will not saturate under the maximum inductor peak current. Calculate the peak inductor current with: ILP = ILOAD + ⎛ ⎞ VOUT V × ⎜1 − OUT ⎟⎟ 2 × fS × L1 ⎜⎝ VIN ⎠ Where ILOAD is the load current. Table 1 lists a number of suitable inductors from various manufacturers. The choice the inductor style mainly depends on the price vs. size requirements and any EMI requirement. Generally, determine an appropriate inductance value by selecting the peak-to-peak inductor ripple current equal to approximately 30% of the MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED Part Number Table 1: Inductor Selection Guide Inductance Max DCR Current Rating Dimensions (µH) (Ω) (A) L x W x H (mm) 7447789004 4.7 0.033 2.9 7.3x7.3x3.2 744066100 10 0.035 3.6 10x10x3.8 744771115 15 0.025 3.75 12x12x6 744771122 22 0.031 3.37 12x12x6 RLF7030T-4R7 4.7 0.031 3.4 7.3x6.8x3.2 SLF10145T-100 10 0.0364 3 10.1x10.1x4.5 SLF12565T-150M4R2 15 0.0237 4.2 12.5x12.5x6.5 SLF12565T-220M3R5 22 0.0316 3.5 12.5x12.5x6.5 FDV0630-4R7M 4.7 0.049 3.3 7.7x7x3 919AS-100M 10 0.0265 4.3 10.3x10.3x4.5 919AS-160M 16 0.0492 3.3 10.3x10.3x4.5 919AS-220M 22 0.0776 3 10.3x10.3x4.5 Wurth Electronics TDK Toko Output Rectifier Diode The output rectifier diode supplies the current to the inductor when the high-side switch is off. To reduce losses due to the forward diode voltage and recovery times, use a Schottky diode. Choose a diode whose maximum reverse voltage rating is greater than the maximum input voltage, and whose current rating is greater than the maximum load current. Table 2 lists example Schottky diodes and manufacturers. Table 2: Diode Selection Guide Voltage/ Diodes Manufacturer Current Rating B290-13-F 90V, 2A Diodes Inc. B380-13-F 80V, 3A Diodes Inc. CMSH2-100M 100V, 2A Central Semi CMSH3-100MA 100V, 3A Central Semi MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 13 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED Input Capacitor The input current to the step-down converter is discontinuous and therefore requires a capacitor to supply the AC current to the step-down converter while maintaining the DC input voltage. Use capacitors with low equivalent series resistance (ESR) for the best performance. Ceramic capacitors are preferred, but tantalum or low-ESR electrolytic capacitors may also suffice. frequency. For simplification, the output ripple can be approximated as: For simplification, choose the input capacitor with an RMS current rating greater than half of the maximum load current. The input capacitor (C1) can be electrolytic, tantalum or ceramic. Compensation Components MPQ4558 employs current-mode control for easy compensation and fast transient response. The COMP pin controls the system stability and transient response—the COMP pin is the output of the internal error amplifier. A capacitor-resistor combination in series sets a pole-zero combination to control the characteristics of the control system. The DC gain of the voltage feedback loop is given by: When using electrolytic or tantalum capacitors, include a small, high-quality ceramic capacitor— i.e. 0.1μF—placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at the input. The input voltage ripple caused by the capacitance can be estimated by: ΔVIN = ⎛ ILOAD V V × OUT × ⎜1 − OUT fS × C1 VIN ⎜⎝ VIN ⎞ ⎟⎟ ⎠ Output Capacitor The output capacitor (C2) maintains the DC output voltage. Use ceramic, tantalum, or lowESR electrolytic capacitors for best results. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: ΔVOUT = VOUT ⎛ V × ⎜⎜1 − OUT fS × L ⎝ VIN ⎞ ⎞ ⎛ 1 ⎟ ⎟⎟ × ⎜ R ESR + ⎜ 8 × f S × C2 ⎟⎠ ⎠ ⎝ Where L is the inductor value and RESR is the ESR value of the output capacitor. For ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated by: ΔVOUT = ⎛ ⎞ V × ⎜⎜1 − OUT ⎟⎟ V × L × C2 ⎝ IN ⎠ VOUT 8 × fS 2 For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching ΔVOUT = VOUT ⎛ V × ⎜⎜1 − OUT fS × L ⎝ VIN ⎞ ⎟⎟ × R ESR ⎠ The characteristics of the output capacitor also affect the stability of the regulation system. The MPQ4558 can be optimized for a wide range of capacitances and ESR values. A VDC = R LOAD × G CS × A VEA × VFB VOUT Where • AVEA is the error amplifier voltage gain, 400V/V, • GCS is the current transconductance,5.6A/V, and • RLOAD is the load resistor value. sense The system has two poles of importance: One is caused by the compensation capacitor (C3) and the output resistor of error amplifier; the other is caused by the output capacitor and the load resistor. These poles are located at: fP1 = GEA 2 π× C3 × A VEA fP 2 = 1 2 π× C 2 × RLOAD is the Where, GEA transconductance, 120μA/V. error amplifier The system has one zero of importance from C3 and the compensation resistor (R3). This zero is located at: fZ1 = 1 2 π× C3 × R 3 MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 14 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED The system may have another important zero if the output capacitor has a large capacitance or a high ESR value. The zero, due to the ESR and the output capacitor value, is located at: fESR = 1 2π × C2 × RESR In this case, a third pole set by the compensation capacitor (C5) and R3 compensates for the effect of the ESR zero on the loop gain. This pole is located at: fP 3 = 1 2 π× C5 × R 3 The compensation network shapes the converter transfer function for a desired loop gain. The feedback-loop unity gain at the system crossover frequency is important: Lower crossover frequencies result in slower line and load transient responses, while higher crossover frequencies can destabilize the system. Generally, set the crossover frequency to approximately 1/10 of the switching frequency. Table 3: Compensation Values for Typical Output Voltage/Capacitor Combinations VOUT C2 R3 C3 C6 L (µH) (V) (µF) (kΩ) (pF) (pF) 1.8 4.7 33 32.4 680 None 2.5 4.7 - 6.8 22 26.1 680 None 3.3 6.8 -10 22 68.1 220 None 5 15 - 22 33 47.5 330 None 12 10 22 16 470 2 To optimize the compensation components for conditions not listed in Table 3, use the following procedure. 1. Choose R3 to set the desired crossover frequency. Determine the R3 value from the following equation: R3 = 2 π× C2 × fC VOUT × GEA × GCS VFB Where fC is the desired crossover frequency. 2. Choose C3 to achieve the desired phase margin. For applications with typical inductor values, set the compensation zero—fZ1—below ¼ the crossover frequency to provide sufficient phase margin. Determine C3 from the following equation: C3 > 4 2 π× R 3 × fC 3. Determine if C5 is required—if the ESR zero of the output capacitor is located at less than 1/2 fS, or if the following relationship is valid: f 1 < S 2π × C2 × RESR 2 If this is the case, then add C5 to set the pole fP3 at the location of the ESR zero. Determine the C5 value by the equation: C5 = C 2 × RESR R3 High-Frequency Operation The MPQ4558 switching frequency can be programmed up to 2MHz by an external resistor. The minimum MPQ4558 ON-time is typically about 100ns. Pulse-skipping operation can be seen more easily at higher switching frequencies due to the minimum ON-time. Since the internal bootstrap circuitry has higher impedance that may not be adequate to charge the bootstrap capacitor during each (1-D)×tS charging period, add an external bootstrap charging diode if the switching frequency is about 2MHz (see External Bootstrap Diode section for detailed implementation information). With higher switching frequencies, the inductive reactance (XL) of the capacitor dominates so that the ESL of the input/output capacitor determines the input/output ripple voltage at higher switching frequencies. Because of this ripple, use highfrequency ceramic capacitors for the input decoupling capacitor and output the filtering capacitor for high-frequency operation. Layout becomes more important when the device switches at higher frequencies. For best results, MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 15 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED place the input decoupling capacitor and the catch diode as close to the MPQ4558 (VIN pin, SW pin and PGND) as close as possible with short and wide traces. This can help to greatly reduce the voltage spikes on the SW node, and lower the EMI noise level. Route the feedback trace as far from the inductor and noisy power traces as possible. If possible, run the feedback trace on the opposite side of the PCB opposite from the inductor with a ground plane separating the two. Placing the compensation components close to the MPQ4558. Avoid placing the compensation components close to or under the high-dv/dt SW node, or inside the high-di/dt power loop. If this is not possible, route a ground plane to isolate the circuit. Switching loss is expected to increase at high switching frequencies. To help to improve the thermal conduction, add grid of thermal vias under the exposed pad. use small vias (15mil barrel diameter) so that the plating process fills the holes, thus aiding conduction to the other side. Excessively large holes can cause solder wicking during the reflow soldering process. The typical pitch (distance between the centers) between thermal vias is typically 40mil. This diode is also recommended for high-duty– cycle operation (when VOUT/VIN > 65%) applications. The bootstrap diode can be a low-cost one such as IN4148 or BAT54. 5V BST MPQ4558 0.1υF SW Figure 2: External Bootstrap Diode At no load or light load, the converter may operate in pulse-skipping mode to maintain the output voltage in regulation: there is less time to refresh the BS voltage. For sufficient gate voltage under such operating conditions, chose VIN – VOUT > 3V. For example, if VOUT = 3.3V, VIN needs to be greater than 3.3V+3V=6.3V for sufficient BST voltage at no load or light load. To meet this requirement, the EN pin can program the input UVLO voltage to VOUT+3V. External Bootstrap Diode An external bootstrap diode may enhance the regulator efficiency. For the cases described below, add an external BST diode from 5V to the BST pin: • There is a 5V rail available in the system; • VIN is no greater than 5V; • VOUT is between 3.3V and 5V; MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 16 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED TYPICAL APPLICATION CIRCUITS C4 100nF 10 8,9 VIN C1 4.7uF 100V R5 100kΩ EN R6 36.5kΩ BST VIN SW L1 4.7uH 1,2 C2 33uF 16V D1 3 7 EN MPQ4558 FB COMP FREQ 5 R1 R2 40.2kΩ 49.9kΩ 4 C3 680pF GND R4 200kΩ VOUT 1.8V 6 R3 32.4kΩ C5 NS Figure 3—1.8V Output Typical Application Schematic C4 100nF 10 8,9 VIN C1 4.7uF 100V EN R6 17.4kΩ R5 100kΩ BST VIN SW L1 15uH 1,2 C2 33uF 16V D1 3 7 R4 200kΩ EN MPQ4558 FB COMP FREQ GND 6 VOUT 5V 5 R1 R2 40.2kΩ 210kΩ 4 C3 330pF R3 47.5kΩ C5 NS Figure 4—5V Output Typical Application Schematic MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 17 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED PCB LAYOUT GUIDE 2) PCB layout is very important to achieve stable operation. Duplicate the EVB layout below for optimal performance. Place the bypass ceramic capacitors close to the VIN pin. 3) Use short and direct feedback connections. Place the feedback resistors and compensation components as close to the chip as possible. 4) Route the SW path away from sensitive analog areas such as the FB path. 5) Connect IN, SW, and GND, respectively, to a large copper area to cool the chip to improve thermal performance and longterm reliability. For changes, please follow these guidelines and use Figure 3 for reference. 1) Keep the switching-current path short and minimize the loop area formed by the input capacitor, high-side MOSFET and external switching diode. R4 24k C4 680pF COMP CONTROL VIN EN R3 200k BST MPQ4558 FREQ VIN 8V to 55V C1 C3 100nF L1 SW FB GND VOUT 3.3V @ 1A C2 D1 R1 127k R2 40.2k MPQ4558 Typical Application Circuit GND R1 R5 R4 C3 R2 R3 L1 2 FB COMP FREQ EN SW VIN BST 1 3 GND 4 SW C4 D1 8 7 6 5 R6 C2 C1 Vin GND GND Vo TOP Layer Bottom Layer MPQ4558DN Layout Guide MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 18 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED GND C3 R4 R5 SW 1 EN 3 SW 2 FB 5 COMP 4 R1 R2 R3 L1 SW C4 8 9 Vin Vin 10 BST 7 FREQ 6 GND D1 R6 C2 C1 Vin GND GND Vo TOP Layer Bottom Layer MPQ4558DQ Layout Guide Figure 3: MPQ4558 Typical Application Circuit and PCB Layout Guide MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 19 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED PACKAGE INFORMATION SOIC8 (EXPOSED PAD) 0.189(4.80) 0.197(5.00) 0.124(3.15) 0.136(3.45) 8 5 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.089(2.26) 0.101(2.56) 4 TOP VIEW BOTTOM VIEW SEE DETAIL "A" 0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SIDE VIEW 0.050(1.27) BSC FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0.050(1.27) 0.024(0.61) 0o-8o 0.016(0.41) 0.050(1.27) 0.063(1.60) DETAIL "A" 0.103(2.62) 0.138(3.51) RECOMMENDED LAND PATTERN 0.213(5.40) NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE. MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 20 MPQ4558 – 1A, 2MHz, 55V STEP-DOWN CONVERTER, AEC-Q100 QUALIFIED QFN10 (3mm x 3mm) 2.90 3.10 0.30 0.50 PIN 1 ID MARKING 0.18 0.30 2.90 3.10 PIN 1 ID INDEX AREA 1.45 1.75 PIN 1 ID SEE DETAIL A 10 1 2.25 2.55 0.50 BSC 5 6 TOP VIEW BOTTOM VIEW PIN 1 ID OPTION A R0.20 TYP. PIN 1 ID OPTION B R0.20 TYP. 0.80 1.00 0.20 REF 0.00 0.05 SIDE VIEW DETAIL A NOTE: 2.90 0.70 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5. 5) DRAWING IS NOT TO SCALE. 1.70 0.25 2.50 0.50 RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ4558 Rev. 1.01 www.MonolithicPower.com 5/17/2013 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 21