CHS5104-QAG DC-4GHz Reflective SPDT GaAs Monolithic Microwave IC in SMD leadless package Description The CHS5104-QAG is a monolithic FET based reflective switch. It is designed for a wide range of applications, from military to commercial systems. The circuit is manufactured with a pHEMT process, 0.25µm gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is supplied in RoHS compliant SMD package. Main Features ■ Broadband performance: DC-4GHz ■ Low insertion loss: 0.7dB ■ Isolation: 40dB ■ Return loss: 16dB ■ Input P1dB: 30dBm ■ QAG-QFN3x3 ■ MSL1 Main Electrical Characteristics Tamb.= +25°C Symbol Parameter Freq Frequency range IL On state insertion loss ISOL Off state isolation RL On state return loss IP1dB Input Power @1dB gain compression Ref. : DSCHS5104-QAG2335 - 30 Nov 12 1/12 Min DC Typ Max 4 0.7 40 16 30 Unit GHz dB dB dB dBm Specifications subject to change without notice United Monolithic Semiconductors S.A.S. Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Electrical Characteristics (1) Tamb.= +25°C, specifications are given for 50Ω source and load impedances. Symbol Parameter Condition Min Typ Max Freq Frequency range DC 4 (2) IL On state insertion loss DC - 2GHz 0.3 DC - 4GHz 0.7 ISOL Off state isolation DC - 2GHz 45 DC - 4GHz 35 On state input and output RL DC - 2GHz 16 return losses DC - 4GHz 12 VH Control voltage high level 0 0.5 VL Control voltage low level -8 -5 Input Power @1dB gain IP1dB DC - 1GHz compression. VL=-5V/VH=0V 27 VL=-8V/VH=0V 30 1GHz - 4GHz VL=-5V/VH=0V 30 VL=-8V/VH=0V 33 50% control to Ton / Toff Switching time 10 90% RF, and 50% control to 10% RF Current consumption on Freq. ≥0.5GHz Ic the control supply Pin≤33dBm voltage VH= 0V 150 VL=-5V 50 VL=-8V 300 Unit GHz dB dB dB V dBm ns µA (1) These values are representative of on-board measurements with correction of the board losses. (2) Variation rate of insertion loss with temperature in the range -40°C to +85°C: 0.002dB/°C Ref. : DSCHS5104-QAG2335 - 30 Nov 12 2/12 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Absolute Maximum Ratings (1) Tamb.= +25°C Symbol Parameter Values Unit VH High level control voltage 0.8 V VL Low level control voltage -10 V (2) Pin Maximum peak input power overdrive 37 dBm (3) Tj Junction temperature 175 °C Ta Operating temperature range -40 to +85 °C Tstg Storage temperature range -55 to +150 °C (1) Operation of this device above anyone of these parameters may cause permanent damage. (2) Duration < 1s, Frequency >1GHz (3) Thermal Resistance channel to ground paddle <33°C/W for Tamb. = +85°C. SPDT truth table PAD A VH VL PAD B VL VH Electrical path RFC to RF1 ON OFF Ref. : DSCHS5104-QAG2335 - 30 Nov 12 3/12 Electrical path RFC to RF2 OFF ON Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Device thermal performances All the figures given in this section are obtained assuming that the QFN device is cooled down only by conduction through the package thermal pad (no convection mode considered). The temperature is monitored at the package back-side interface (Tcase) as shown below. The system maximum temperature must be adjusted in order to guarantee that Tcase remains below the maximum value specified in the next table. So, the PCB system must be designed to comply with this requirement. A derating must be applied on the dissipated power if the Tcase temperature can not be maintained below the maximum temperature specified (see the curve Pdiss. Max) in order to guarantee the nominal device life time (MTTF). Ref. : DSCHS5104-QAG2335 - 30 Nov 12 4/12 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Typical Board Measurements Tamb.= +25°C, VH=0V / VL=-5V Note: board losses are corrected ON state: S21 versus Frequency ON state: S11 versus Frequency Ref. : DSCHS5104-QAG2335 - 30 Nov 12 5/12 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Typical Board Measurements Tamb.= +25°C, VH=0V / VL=-5V Note: board losses are corrected ON state: S22 versus Frequency OFF state: S21 versus frequency Ref. : DSCHS5104-QAG2335 - 30 Nov 12 6/12 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Typical Board Measurements Tamb.= +25°C, VH=0V / VL=-5V Note: board losses are corrected Insertion Loss variation versus input power Input power at 1dB gain compression versus frequency Ref. : DSCHS5104-QAG2335 - 30 Nov 12 7/12 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Typical Board Measurements Tamb.= +25°C, VH=0V / VL=-8V Note: board losses are corrected Insertion Loss variation versus input power Ref. : DSCHS5104-QAG2335 - 30 Nov 12 8/12 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Package outline (1) Matt tin, Lead Free Units : From the standard : (Green) mm JEDEC MO-220 (VGGD) 17- GND 12345678- Nc Gnd(2) RFC Gnd(2) Nc Gnd(2) RF1 Nc 910111213141516- Nc A B Nc Nc RF2 Gnd(2) Nc (1) The package outline drawing included to this data-sheet is given for indication. Refer to the application note AN0017 (http://www.ums-gaas.com) for exact package dimensions. (2) It is strongly recommended to ground all pins marked “Gnd” through the PCB board. Ensure that the PCB board is designed to provide the best possible ground to the package. Ref. : DSCHS5104-QAG2335 - 30 Nov 12 9/12 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Evaluation mother board ■ Based on typically Ro4003 / 8mils or equivalent. ■ Using a micro-strip to coplanar transition to access the package. ■ Recommended for implementation of this product on a module board. ■ See application note AN0017 for details. Recommendation on decoupling Label A, B RFC, RF1, RF2 Type Control voltage RF access Ref. : DSCHS5104-QAG2335 - 30 Nov 12 Decoupling Not required Comment SPDT switch pad control External DC block must be used to ensure DC decoupling The MMIC is DC coupled 10/12 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Notes The DC connections do not include any decoupling capacitor in package; therefore it might be necessary to provide a good external DC decoupling on the PC board, as close as possible to the package. DC Schematic Ref. : DSCHS5104-QAG2335 - 30 Nov 12 11/12 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHS5104-QAG DC-4GHz Reflective SPDT Recommended package footprint Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot print recommendations. SMD mounting procedure For the mounting process standard techniques involving solder paste and a suitable reflow process can be used. For further details, see application note AN0017. Recommended environmental management UMS products are compliant with the regulation in particular with the directives RoHS N°2011/65 and REACh N°1907/2006. More environmental data are available in the application note AN0019 also available at http://www.ums-gaas.com. Recommended ESD management Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD sensitivity and handling recommendations for the UMS package products. Ordering Information QFN 3x3 package: CHS5104-QAG/XY Stick: XY = 20 Tape & reel: XY = 21 Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S. Ref. : DSCHS5104-QAG2335 - 30 Nov 12 12/12 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34