CYStech Electronics Corp. Spec. No. : C739E3 Issued Date : 2009.10.19 Revised Date : 2010.10.18 Page No. : 1/6 N -Channel Logic Level Enhancement Mode Power MOSFET MTN6515E3 BVDSS 150V ID 20A RDSON(MAX) 65mΩ Features • Low Gate Charge • Simple Drive Requirement • Pb-free lead plating Equivalent Circuit Outline TO-220 MTN6515E3 G：Gate D：Drain S：Source G D S Absolute Maximum Ratings (TC=25°C, unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current @ TC=25°C Continuous Drain Current @ TC=100°C Pulsed Drain Current *1 Avalanche Current Avalanche Energy @ L=0.1mH, ID=10A, RG=25Ω Repetitive Avalanche Energy @ L=0.05mH *2 Total Power Dissipation @TC=25℃ Total Power Dissipation @TC=100℃ Operating Junction and Storage Temperature Range Symbol Limits VDS VGS ID ID IDM IAS EAS EAR 150 ±16 20 15 80 20 5 2.5 110 55 -55~+175 PD Tj, Tstg Unit V A mJ W °C Note : *1. Pulse width limited by maximum junction temperature *2. Duty cycle ≤ 1% MTTN6515E3 CYStek Product Specification Spec. No. : C739E3 Issued Date : 2009.10.19 Revised Date : 2010.10.18 Page No. : 2/6 CYStech Electronics Corp. Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max Symbol Rth,j-c Rth,j-a Value 1.36 62.5 Unit °C/W °C/W Characteristics (Tc=25°C, unless otherwise specified) Symbol Static BVDSS VGS(th) IGSS IDSS ID(ON) *1 RDS(ON) *1 GFS *1 Dynamic Qg *1, 2 Qgs *1, 2 Qgd *1, 2 td(ON) *1, 2 tr *1, 2 td(OFF) *1, 2 tf *1, 2 Ciss Coss Crss Source-Drain Diode IS *1 ISM *3 VSD *1 trr Qrr Min. Typ. Max. Unit 150 0.45 20 - 0.75 40 50 60 25 1.20 ±100 1 25 55 65 75 - V V nA - 107 18 60 20 115 330 380 7660 725 420 - - 60 130 20 80 1.3 - μA A mΩ S Test Conditions VGS =0V, ID=250μA VDS =VGS, ID=250μA VGS=±12, VDS=0 VDS =120V, VGS =0 VDS =100V, VGS =0, TJ=125°C VDS =10V, VGS =10V VGS =10V, ID=15A VGS =5V, ID=10A VGS =3V, ID=3A VDS =5V, ID=10A nC ID=10A, VDS=80V, VGS=5V ns VDS=75V, ID=1A, VGS=4.5V, RG=6Ω pF VGS=0V, VDS=25V, f=1MHz A V ns nC IF=IS, VGS=0V IF=20A, dIF/dt=100A/μs Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% *2.Independent of operating temperature *3.Pulse width limited by maximum junction temperature. Ordering Information Device Package TO-220 MTN6515E3 (Pb-free lead plating package) MTTN6515E3 Shipping Marking 50 pcs/tube, 20 tubes/box, 4 boxes / carton N6515 CYStek Product Specification Spec. No. : C739E3 Issued Date : 2009.10.19 Revised Date : 2010.10.18 Page No. : 3/6 CYStech Electronics Corp. Typical Characteristics On-Region Characteristics 80 2.0 On-Resistance Variation with Drain Current and Gate Voltage VGS= 10V 5.0V 1.8 RDS(ON) -Normalized Drain-Source On-Resistance ID - Drain Current( A ) 64 48 3.0V 32 16 0 0 1 2 3 VDS - Drain Source Voltage( V ) 4 VGS = 3.0 V 1.6 1.4 1.2 5.0 V 1.0 10 V 0.8 5 16 0 On-Resistance Variation with Temperature 80 On-Resistance Variation wit h Gate-Source Voltage 1.9 0.090 ID = 10A VGS = 5V ID = 5 A 0.080 RDS(ON) - On-Resistance( Ω ) 1.6 RDS(on) - Normalized Drain-Source On-Resistance 64 32 48 I D - Drain Current( A ) 1.3 1.0 0.7 0.070 0.060 TA = 125° C 0.050 0.040 TA = 25° C 0.030 0.020 0.4 -50 -25 75 25 50 0 TJ - Junction Temperature (° C) 100 125 150 0.010 4 6 VGS- Gate-Source Voltage( V ) 2 Gate Charge Characteristics 10 12000 Ciss f = 1MHz VGS = 0 V 9000 80V 6 Capacitance( pF ) VGS - Gate Source Voltage( V ) VDS = 50V 10 Capacitance Characteristics ID = 10A 8 8 4 2 6000 3000 Coss 0 0 MTTN6515E3 50 100 Q g - Gate Charge( nC ) 150 200 Crss 0 0 10 20 VDS - Drain-Source Voltage( V ) 30 40 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C739E3 Issued Date : 2009.10.19 Revised Date : 2010.10.18 Page No. : 4/6 Typical Characteristics(Cont.) Body Diode Forward Voltage Variation with Source Current and Temperature 100 Is - Reverse Drain Current(A) V GS= 0V T A= 125° C 10 25°C 1 -55° C 0.1 0.01 0.001 0 MTTN6515E3 0.2 0.6 0.8 1.0 0.4 VSD- Body Diode Forward Voltage(V) 1.2 1.4 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C739E3 Issued Date : 2009.10.19 Revised Date : 2010.10.18 Page No. : 5/6 Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Average ramp-up rate 3°C/second max. (Tsmax to Tp) Preheat 100°C −Temperature Min(TS min) −Temperature Max(TS max) 150°C −Time(ts min to ts max) 60-120 seconds Time maintained above: −Temperature (TL) 183°C − Time (tL) 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C Time within 5°C of actual peak 10-30 seconds temperature(tp) Ramp down rate 6°C/second max. 6 minutes max. Time 25 °C to peak temperature Pb-free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds 260 +0/-5 °C 20-40 seconds 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. MTTN6515E3 CYStek Product Specification Spec. No. : C739E3 Issued Date : 2009.10.19 Revised Date : 2010.10.18 Page No. : 6/6 CYStech Electronics Corp. TO-220 Dimension A Marking: B D E C H Device Name I 1 3 G N6515 K M □□□□ 2 3 Date Code N 2 1 4 O P 3-Lead TO-220 Plastic Package CYStek Package Code: E3 Style: Pin 1.Gate 2.Drain 3.Source 4.Drain *: Typical Inches Min. Max. 0.2441 0.2598 0.3386 0.3543 0.1732 0.1890 0.0492 0.0571 0.0142 0.0197 0.3858 0.4094 *0.6398 DIM A B C D E G H Millimeters Min. Max. 6.20 6.60 8.60 9.00 4.40 4.80 1.25 1.45 0.36 0.50 9.80 10.40 *16.25 DIM I K M N O P Inches Min. Max. *0.1508 0.0299 0.0394 0.0461 0.0579 *0.1000 0.5217 0.5610 0.5787 0.6024 Millimeters Min. Max. *3.83 0.76 1.00 1.17 1.47 *2.54 13.25 14.25 14.70 15.30 Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead: KFC ; pure tin plated. • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTTN6515E3 CYStek Product Specification