Anachip AP139-28TWA 300ma low-noise cmos ldo Datasheet

AP139
300mA Low-Noise CMOS LDO
„ Features
„ General Descriptions
- Very low dropout voltage
- Low current consumption: Typ.45µA, Max. 60µA
- Output voltage: 1.5V,1.8V,2.0V, 2.5V, 2.8V, 3.0V
3.3V, and 3.5V
- Guaranteed 300mA output
- Input range up to 7.0V
- Thermal shutdown
- Current limiting
- Stability with low ESR capacitors
- Low temperature coefficient
- Pb-free package: SOT23-5L,TSOT23-5L
The AP139 is a positive voltage linear regulator
utilizing CMOS technology. The features that
include low quiescent current (45µA typ.), low
dropout voltage, and high output voltage accuracy,
make it ideal for battery applications. EN input
connected to CMOS has low bias current. The
space-saving SOT23-5L and TSOT23-5L package
is attractive for “Pocket” and “Hand Held”
applications.
This rugged device has both thermal shutdown, and
current limit protections to prevent device failure
under the “Worst” operating conditions.
„ Applications
In a low noise, regulated supply application, a 10nF
capacitor is necessary to be placed in between
Bypass and Ground.
- Battery-powered devices
- Personal communication devices
- Home electric/electronic appliances
- PC peripherals
The AP139 is stable with a low ESR output
capacitor of 1.0µF or greater.
„ Pin Assignments
„ Pin Descriptions
(Top View)
VOUT
BYP
5
4
Pin
Name
VIN
GND
EN
BYP
VOUT
AP139
1
2
Pin
No.
1
2
3
4
5
Function
Power Supply
Ground
Enable Pin
Bypass Signal Pin
Output
3
VIN GND EN
SOT23-5/TSOT23-5
„ Ordering Information
AP139
XX X X
Output voltage
Package
Packing
15: 1.5V
18: 1.8V
20: 2.0V
25: 2.5V
28: 2.8V
30: 3.0V
33: 3.3V
35: 3.5V
W : SOT23-5L
TW:TSOT23-5L
Blank: Tube
A: Taping
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev.1.1 Jun 02, 2006
1/8
AP139
300mA Low-Noise CMOS LDO
„ Block Diagram
VIN
VOUT
Current
Limit
1uA
Thermal
Shutdown
R1
EN
-
BYP
AMP
+
Vref
R2
GND
„ Absolute Maximum Ratings
Symbol
VIN
IOUT
VOUT
TA
TJ
Parameter
Input Voltage
Output Current
Output Voltage
ESD Classification
Ambient Temperature Range
Junction Temperature Range
Rating
+7
PD/ (VIN-VO)
GND - 0.3 to VIN+ 0.3
B
-40 to +85
-40 to +125
Unit
V
mA
V
Maximum
160
250
150
300
Unit
ºC/W
mW
ºC
ºC
ºC
ºC
„ Thermal Information
Symbol
θjc
PD
TJ
TLead
Parameter
Thermal Resistance
Internal Power Dissipation (∆T=100 ºC)
Maximum Junction Temperature
Maximum Lead Temperature (10 sec)
SOT23-5L
SOT23-5L
Anachip Corp.
www.anachip.com.tw
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AP139
300mA Low-Noise CMOS LDO
„ Electrical Characteristics
(TA=+25ºC, unless otherwise noted.)
Symbol
Parameter
VIN
Input Voltage
IQ
Quiescent Current
ISTB
Standby Current
VOUT
Min.
Note 1
-
Typ.
45
2.0
Max.
7
60
3.0
Unit
V
µA
µA
Output Voltage Accuracy IO=1mA, VIN=5V
-2
-
2
%
VOUT Temperature
Coefficient
-
50
-
ppm/ oC
300
-
1.5
1.2
1
0.6
0.45
-
mA
300
450
-
mA
1.7
150
0.1
0.3
60
50
40
75
55
30
-
300
0.3
1
-
mA
%
%
-
-
0.8
V
-
-
<0.1
µA
-
130
-
o
C
-
20
-
o
C
VDROPOUT Dropout Voltage
IOUT
Output Current
ILIMIT
Current Limit
Test Conditions
IO=0mA
VIN=5.0V, VOUT=0V, VEN < VEL
IO=1mA to 300mA,
VOUT=VO(NOM)-1.5%
VO =1.5V
VO =1.8V
VO =2V
VO =2.5V
VO ≥2.8V
VOUT > 1.05V
Ishort
Short Circuit Current
△VLINE Line Regulation
△VLOAD Load Regulation
PSRR
PSRR
VEH
VEL
IEN
OTS
OTH
Vcc=5V,Vout<1.05V
IOUT=5mA, VIN=5~7V
IO=1mA to 300mA, VIN=5V
f=1KHz
I =100mA,
Power Supply Rejection O
f=10KHz
CO=2.2µF ceramic
f=100KHz
f=1KHz
IO=100mA,
Power Supply Rejection CO=2.2µF ceramic,
f=10KHz
CBYP=20nF
f=100KHz
Output ON
EN Input Threshold
Output OFF
Enable Pin Current
Over Temperature
Shutdown
Over Temperature
Hysteresis
V
dB
dB
V
Note 1. : VIN(MIN)=VOUT+VDROPOUT
„ Typical Application
VOUT
VIN
IN
OUT
AP139
BYP
C1
1uF
C2
10nF
GND
EN
C3
1uF
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AP139
300mA Low-Noise CMOS LDO
„ Typical Performance Characteristics
Vcc Vs Quiescent Current
100
Vout Vs Dropout Voltage
1.6
1.4
80
70
Dropout Voltage (V)
Quiescent Current (μA)
90
60
50
40
30
1.2
1
0.8
0.6
Io=300mA
0.4
20
TA=25℃
10
0
3.5
4
4.5
5
5.5
6
6.5
Io=200mA
0.2
0
7
Io=100mA
1.5
1.8
2
Vcc (V)
Iout=100mA
-10
-20
-20
-30
-30
-40
-50
BP=1nF
BP=5nF
-60
3.3
3.5
BP=10nF
100mA
-40
10mA
-50
-60
1mA
-70
-70
BP=10nF
-80
-80
BP=20nF
-90
1.0E+00
1.0E+01
1.0E+02
1.0E+03
1.0E+04
-90
1.0E+00
1.0E+05 1.0E+06
1.0E+01
1.0E+02
1.0E+03
1.0E+04
1.0E+05 1.0E+06
Frequency (Hz)
Frequency (Hz)
Power Supply Rejection Ratio
Vout Vs Current Limit
0
0.7
BP=0
-10
0.6
100mA
-20
0.5
-40
Current Limit (A)
-30
PSRR (dB)
3
Power Supply Rejection Ratio
0
PSRR (dB)
PSRR (dB)
-10
2.8
Vout (V)
Power Supply Rejection Ratio
0
2.5
10mA
-50
-60
1mA
0.4
0.3
0.2
-70
0.1
-80
-90
1.0E+00
Vcc=5V
0
1.0E+01
1.0E+02
1.0E+03
1.0E+04
1.0E+05
1.5
1.0E+06
Frequency (Hz)
1.8
2
2.5
2.8
3
3.3
3.5
Vout (V)
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Rev.1.1 Jun 02, 2006
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AP139
300mA Low-Noise CMOS LDO
„ Typical Performance Characteristics (Continued)
Vcc Vs Short Current
400
350
Short Current (mA)
300
250
200
Top to bottom
Vout=1.5V
150
Vout=1.8V
100
Vout=2.5V
Vout=3.3V
50
0
3.5
4
4.5
5
5.5
6
6.5
7
Vcc (V)
„ Function Description
Enable
The enable pin normally floats high. When actively,
pulled low, the PMOS pass transistor shut off, and
all internal circuits are powered down. In this state,
the quiescent current is less than 2µA. This pin
behaves much like an electronic switch.
The AP139 of CMOS regulators contain a PMOS
pass transistor, voltage reference, error amplifier,
over-current protection, thermal shutdown.
The P-channel pass transistor receives data from
the error amplifier, over-current protection, and
thermal protection circuits. During normal operation,
the error amplifier compares the output voltage to a
precision reference. Over-current and thermal
shutdown circuits become active when the junction
temperature exceeds 130oC, or the current exceeds
300mA. During thermal shutdown, the output
voltage remains low. Normal operation is restored
when the junction temperature drops below 110oC.
External Capacitor
The AP139 is stable with a low ESR output
capacitor to ground of 1.0µF or greater. It can keep
stable even with higher ESR capacitors. A second
capacitor is recommended between the input and
ground to stabilize VIN. The input capacitor should
be larger than 0.1µF to have a beneficial effect. All
capacitors should be placed in close proximity to
the pins. A “quiet” ground termination is desirable.
The AP139 switches from voltage mode to current
mode when the load exceeds the rated output
current. This prevents over-stress.
Anachip Corp.
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Rev.1.1 Jun 02, 2006
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AP139
300mA Low-Noise CMOS LDO
„ Marking Information
4
XX : Identification code
(See Appendix)
Y : Year: 0-9
M : Month: A~L
XX Y M
1
Appendix
Identification
Code
N0
N1
N2
N3
N4
N5
N6
N7
7
5
2
3
SOT23-5L
4
7
5
XX : Identification code
(See Appendix)
Y : Year: 0-9
M : Month: A~L
XX Y M
1
2
Output version
AP139-1.5V
AP139-1.8V
AP139-2.0V
AP139-2.5V
AP139-2.8V
AP139-3.0V
AP139-3.3V
AP139-3.5V
3
TSOT23-5L
Anachip Corp.
www.anachip.com.tw
Rev.1.1 Jun 02, 2006
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AP139
300mA Low-Noise CMOS LDO
„ Package Information
(1)Package Type: SOT23-5L
HE
E
C
D
GAUGE PLANE
θ
L
L1
e1
VIEW C
e
A
SEE VIEW C
A1
A2
θ1(4x)
θ 2(4x)
b(5x)
Symbol
Dimensions In Millimeters
Nom.
-
Max.
1.35
Dimensions In Inches
A
Min.
1.05
Min.
Nom.
Max.
0.041
-
0.053
A1
0.05
-
0.15
0.002
-
0.006
A2
1.00
1.10
1.20
0.039
0.043
0.047
b
0.25
-
0.50
0.010
-
0.020
C
0.08
-
0.20
0.003
-
0.008
D
2.70
2.90
3.00
0.106
0.114
0.118
E
1.50
1.60
1.70
0.059
0.063
0.067
HE
2.60
2.80
3.00
0.102
0.110
0.118
L
0.30
-
0.60
0.012
-
0.024
L1
0.50
0.60
0.70
0.020
0.024
0.028
e
1.80
1.90
2.00
0.071
0.075
0.079
e1
0.85
0.95
1.05
0.033
0.037
0.041
θ
θ1
θ2
0o
o
3
6o
5o
o
5
8o
10o
o
7
10o
0o
o
3
6o
5o
o
5
8o
10o
o
7
10o
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Rev.1.1 Jun 02, 2006
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AP139
300mA Low-Noise CMOS LDO
„ Package Information (Continued)
(2) Package Type: TSOT23-5L
θ
D
L
E
E1
L1
R
b
e
C
L2
GAUGE PLANE
A2
e1
A
θ2
Symbol
A
4xθ1
A1
y
Dimensions In Millimeters
Dimensions In Inches
Min.
Nom.
Max.
Min.
Nom.
Max.
0.75
-
0.90
0.030
-
0.035
A1
0.00
-
0.10
0.000
-
0.004
A2
0.70
0.75
0.80
0.028
0.030
0.031
b
0.35
-
0.51
0.014
-
0.020
C
0.10
-
0.25
0.004
-
0.010
D
2.80
2.90
3.00
0.110
0.114
0.118
E
2.60
2.80
3.00
0.102
0.110
0.118
E1
1.50
1.60
1.70
0.059
0.063
0.067
e
0.95 BSC.
0.037
e1
1.90 BSC.
0.075
L
0.37
-
-
0.015
-
L1
0.60 REF.
0.024
L2
0.25 BSC.
0.010
-
y
-
-
0.10
-
-
0.004
R
0.10
-
-
0.004
-
-
-
8o
θ
θ1
θ2
o
0
-
o
8
o
0
o
o
7 NOM.
o
5o NOM.
7 NOM.
5 NOM.
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Rev.1.1 Jun 02, 2006
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