MPS MP5000SDQ 12v, 5a programmable current limit switch Datasheet

MP5000S
12V, 5A Programmable Current
Limit Switch
DESCRIPTION
FEATURES
The MP5000S is a protection device designed to
protect circuitry on the output (source) from
transients on input (VCC). It also protects VCC from
undesired shorts and transients coming from the
source.
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At start up, inrush current is limited by limiting the
slew rate at the source. The slew rate is
controlled by a small capacitor at the dv/dt pin.
The dv/dt pin has an internal circuit that allows
the customer to float this pin (no connect) and
still receive 0.9ms ramp time at the source.
The maximum load at the output (source) is
current limited. This is accomplished by utilizing a
sense FET topology. The magnitude of the
current limit is controlled by an external resistor
from the I-Limit pin to the Source pin.
Integrated 40mΩ Power FET
Enable/Fault Pin
Adjustable Slew Rate for Output Voltage
Adjustable Current Limit: 1-5A
Thermal Protection
Over Voltage Limit
APPLICATIONS
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Hot Swap
PC Cards
Laptops
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
An internal charge pump drives the gate of the
power device, allowing a very low on-resistance
DMOS power FET of just 40mΩ.
The source is protected from the VCC input being
too low or too high. Under Voltage Lockout
(UVLO) assures that VCC is above the minimum
operating threshold, before the power device is
turned on. If VCC goes above the high output
threshold, the source voltage will be limited.
TYPICAL APPLICATION
MP5000S Rev. 1.0
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP5000SDQ
QFN10 (3 x3mm)
ADT
* For Tape & Reel, add suffix –Z (e.g. MP5000SDQ–Z);
For RoHS Compliant Packaging, add suffix –LF (e.g. MP5000SDQ–LF–Z)
PACKAGE REFERENCE
Operating Junction Temp. (TJ). -40°C to +125°C
ABSOLUTE MAXIMUM RATINGS
(1)
VCC, SOURCE, I-LIMIT .................. -0.3V to 22V
dv/dt, ENABLE/FAULT..................... -0.3V to 6V
Storage Temperature ............... -65C to +155C
(2)
Continuous Power Dissipation (TA = +25°C)
............................................................2.5W
Operating Junction Temperature . -40C to 150C
Input Voltage Transient (100mS) ......... VIN=25V
Recommended Operating Conditions
(3)
Input Voltage Operating Range…….10V to 18V
Continuous Current
0.5 in2 pad .................................................4.2A
For Minimum Copper, TA=80°C...................2.3A
Thermal Resistance
(4)
θJA
θJC
QFN10 .................................... 50 ...... 12 ... C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
MP5000S Rev. 1.0
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
ELECTRICAL CHARACTERISTICS
VCC = 12V, RLIMIT=22Ω, Capacitive Load = 100μF, TA=25°C, unless otherwise noted.
Parameters
Power FET
Symbol
Delay Time
tDLY
ON Resistance
(5)
RDSon
Off State Output Voltage
VOFF
Thermal Latch
(5)
Shutdown Temperature
Under/Over Voltage Protection
TSD
Output Clamping Voltage
VCLAMP
Under Voltage Lockout
VUVLO
Under Voltage Lockout (UVLO)
Hysteresis
Current Limit
(6)
Hold Current
Trip Current
dv/dt Circuit
Min
Enabling
of
chip
to
ID=100mA with a 1A resistive
load
TJ=25°C
TJ=85°C
VCC=18Vdc, VENABLE=0Vdc,
RL= 500Ω
ILIM-SS
ILIM-OL
Tr
Enable/Fault
Low Level Input Voltage
VIL
Intermediate Level Input Voltage
VI (INT)
High Level Input Voltage
High State Maximum Voltage
Low Level Input Current (Sink)
VIH
VI (MAX)
IIL
Maximum Fanout for Fault Signal
Typ
40
52
IBIAS
Minimum Operating Voltage for
UVLO
VMIN
Units
ms
55
mΩ
120
mV
175
Overvoltage Protection
VCC=17V
Turn on,
Voltage going high
°C
13.8
15
16.2
V
7.7
8.5
9.3
V
0.80
RLIM=22Ω
RLIM=22Ω
Float dv/dt pin, Enable to
VOUT=12V
Output Disabled
Thermal
Fault,
Disabled
Output Enabled
Output
VENABLE=0V
Total number of chips that
can be connected for
simultaneous shutdown
V
2.4
3.7
5.0
5.0
A
A
0.5
0.9
2.1
ms
0.5
V
1.95
V
-50
V
V
μA
3
Units
VCC
V
0.82
1.4
2.5
5
-28
VMAX
Bias Current
Max
0.1
VHYST
Rise Time
Maximum Voltage on Enable/Fault
(7)
Pin
Total Device
Condition
Device Operational
1
Thermal Shutdown
0.4
Enable<0.5V
1.2
5
mA
V
Notes:
5) Guaranteed by design.
6) Guaranteed by characterization Test.
7) Maximum Input Voltage on Enable pin to be ≤ 6.0V if Vcc ≥ 6.0V, Maximum Input Voltage on Enable pin to be Vcc if Vcc ≤ 6.0V.
MP5000S Rev. 1.0
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4/29/2013
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
PIN FUNCTIONS
Pin #
Name
Description
1
GND
2
dv/dt
Negative Input Voltage to the Device. This is used as the internal reference for the IC.
The internal dv/dt circuit controls the slew rate of the output voltage at turn on. It has an
internal capacitor that allows it to ramp up over the period of 0.9ms. An external
capacitor can be added to this pin to increase the ramp time. If an additional time delay
is not required, this pin should be left open.
3
Enable/Fault
4
I-Limit
5
6-10
11
The Enable/Fault pin is a tri-state, bi-directional interface. It can be used to enable the
output of the device by floating the pin, or disable the chip by pulling it to ground (using
an open drain or open collector device). If a thermal fault occurs, the voltage on this pin
will go to an intermediate state to signal a monitoring circuit that the device is in thermal
shutdown. See text: “ENABLE/FAULT PIN”.
A resistor between this pin and the Source pin sets the overload and short circuit
current limit levels.
DO NOT CONNECT. Pin must be left floating.
This pin is the source of the internal power FET and the output terminal of the IC.
N/C
SOURCE
VCC
Positive input voltage to the device (exposed pad).
(Exposed Pad)
MP5000S Rev. 1.0
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VEN=3.3V, RLIMIT=22Ω, COUT=10uF, Cdv/dt=1nF, TA=25°C, unless otherwise noted.
MP5000S Rev. 1.0
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VEN=3.3V, RLIMIT=22Ω, COUT=10uF, Cdv/dt=1nF, TA=25°C, unless otherwise noted.
MP5000S Rev. 1.0
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VEN=3.3V, RLIMIT=22Ω, COUT=10uF, Cdv/dt=1nF, TA=25°C, unless otherwise noted.
MP5000S Rev. 1.0
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4/29/2013
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
BLOCK DIAGRAM
Figure 1—Function Block Diagram
MP5000S Rev. 1.0
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
OPERATION
The MP5000S is designed to limit the in-rush
current to the load. It offers an integrated solution
to monitor the input voltage, output voltage,
output current and die temperature.
Under Voltage Lock Out Operation
If the supply (input) is below the UVLO threshold,
the output is disabled, and the fault line is driven
low.
When the supply goes above the UVLO
threshold, the output is enabled and the fault line
is released. When the fault line is released it will
be pulled high by a 28uA current source. No
external pull up resistor is required. In addition,
the pull up voltage is limited to 5 volts.
Output Over Voltage Protection
If the input voltage is higher than the OVP
threshold, the output will be clamped at 15V
(typical).
Current Limit
When the part is active, if load reaches trip
current (minimum threshold current triggering
over current protection) or a short is present, the
part switches into to a constant-current (hold
current) mode. Part will be shutdown only if the
over current condition stays long enough to
trigger thermal protection.
However, when the part is powered up by VCC or
EN, the load current should be smaller than hold
current. Otherwise, the part can’t be fully turned
on.
In a typical application using a current limit
resistor of 22Ω, the trip current will be 5A and the
hold current will be 3.7A. If the device is in its
normal operating state and passing 2.0A it will
need to dissipate only 160mw with the very low
on resistance of 40mΩ. For the package
dissipation of 50°C/Watt, the temperature rise will
only be + 8°C. Combined with a 25°C ambient,
this is only 33°C total package temperature.
During a short circuit condition, the device now
has 12V across it and the hold current clamps at
3.7A and therefore must dissipate 44W. At
50°C/watt, if uncontrolled, the temperature would
rise above the MP5000S thermal protection
(+175°C) and shutdown the device to cause the
temperature to drop below a hysteresis level.
Proper heat sink must be used if the device is
intended to supply the hold current and not
shutdown. Without a heat sink, hold current
should be maintained below 250mA at + 25°C
and below 150mA at +85°C to prevent the device
from activating the thermal shutdown feature.
Thermal protection
When thermal protection is triggered, the output
is disabled and the fault line is driven to the
middle level. The thermal fault condition is
latched, and the part will remain latch off state
until restart the power or reset the enable pin.
Enable / Fault Pin
The Enable/Fault Pin is a Bi-Directional three
levels I/O with a weak pull up current (28uA
typical). The three levels are low, mid and high. It
functions to enable/disable the part and to relay
Fault information.
Enable/Fault pin as an input:
1.
Low and mid disable the part.
2.
Low, in addition to disabling the part,
clears the fault flag.
3.
High enables the part (if the fault flag is
clear).
Enable/Fault pin as an output:
1. The pull up current may (if not over
ridden) allow a “wired nor” pull up to
enable the part.
2.
An under voltage will cause a low on the
Enable/Fault pin, and will clear the fault
flag.
3.
A thermal fault will cause a mid level on
the Enable/Fault pin, and will set the fault
flag.
The Enable/Fault line must be above the mid
level for the output to be turned on.
The fault flag is an internal flip-flop that can be
set or reset under various conditions:
1.
Thermal Shutdown: set fault flag
2.
Under Voltage: reset fault flag
MP5000S Rev. 1.0
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4/29/2013
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
3.
low voltage on Enable/Fault pin: reset
fault flag
4.
mid voltage on Enable/Fault pin: no effect
Under a fault, the Enable/Fault pin is driven to
the mid level.
There are 4 types of faults, and each fault has a
direct and indirect effect on the Enable/Fault pin
and the internal fault flag.
In a typical application there are one or more of
the MP5000S chips in a system. The
Enable/Fault lines will typically be connected
together.
Table 1—Fault Function Influence in Application
Fault description
Internal action
Effect on Fault Pin
Short/over current
Limit current
none
Under Voltage
Output is
turned off
Internally drives
Enable/Fault pin to
Logic low
Over Voltage
Limit output
voltage
None
Thermal
Shutdown
Shutdown part
The part is
latched off until
a UVLO or
externally driven
to ground.
Internally drives
Enable/Fault pin
to mid level
Effect on Flag
none
Flag is reset
None
Flag is set
Effect on secondary Part
none
Secondary part output is
disabled, and fault flag is
reset.
None
Secondary part output is
disabled.
MP5000S Rev. 1.0
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
APPLICATION INFORMATION
Current Limit
The desired current limit is a function of the
external current limit resistor.
Table 2—Current Limit vs. Current Limit Resistor
(VCC=12V)
Current Limit
Resistor (Ω)
Trip Current (A)
Hold Current (A)
15.4
22
50
100
6.1
5.8
5
3.7
2.7
1.63
2.3
1.1
Rise Time
The rise time is a function of the capacitor
(Cdvdt) on the dv/dt pin.
PCB LAYOUT
PCB layout is very important to achieve stable
operation. Please follow these guidelines and
take below figure for reference. Place Rlimit
close to I_limit pin, Cdv/dt close to dv/dt pin and
input cap close to VCC pin. Keep the N/C pin float.
Put vias in thermal pad and ensure enough
copper area near VCC and source to achieve
better thermal performance.
VIN
VOUT
C2
Table 3—Rise Time vs. Cdv/dt
none
0.9
50pF
2
500pF
12
1
10 SOURCE
dv/dt
2
9 SOURCE
EN/ FAULT
3
I_LIMIT
4
N/C
5
Cdv/dt
Cdvdt
Rise Time
(TYPICAL) (ms)
C3
GND
1nF
EN/ FAULT
23
* Notes: Rise Time = KRT*(41pF+Cdv/dt), KRT =22E6
RLIMIT
7 SOURCE
6 SOURCE
C4
The “rise time” is measured by from 0% to 100%
of output voltage.
8 SOURCE
VIN
GND
Top Layer
Figure 2—Rise Time
VIN
Bottom Layer
Figure 3―PCB Layout
MP5000S Rev. 1.0
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
Design Example
Below is a design example following the
application guidelines for the given specifications:
Table 4: Design Example
VIN
Trip Current
Hold Current
12V
5A
3.7A
Figure 4 shows the application schematic. The
Typical Performance Characteristics section
shows the circuit waveforms. For more device
applications, please refer to the related
Evaluation Board Datasheet.
TYPICAL APPLICATION CIRCUITS
Figure 4―Typical Application Schematic
MP5000S Rev. 1.0
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MP5000S – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH
PACKAGE INFORMATION
QFN10 (3 x 3mm)
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP5000S Rev1.0
4/29/2013
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