LTC3563 500mA, Synchronous Step-Down DC/DC Converter with Selectable Output Voltage DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High Efficiency: Up to 96% Pin Selectable Output Voltage: 1.28V/1.87V Low Ripple (<20mVP-P) Burst Mode® Operation: IQ = 26µA Very Low Quiescent Current: Only 26µA 2.5V to 5.5V Input Voltage Range 2.25MHz Constant Frequency Operation Low Dropout Operation: 100% Duty Cycle No Schottky Diode Required Internal Soft-Start Limits Inrush Current Shutdown Mode Draws <1µA Supply Current ±2% Output Voltage Accuracy Current Mode Operation for Excellent Line and Load Transient Response Overtemperature Protected Available in 2mm × 2mm 6-Lead DFN U APPLICATIO S ■ ■ ■ ■ The switching frequency is internally set at 2.25MHz, allowing the use of small surface mount inductors and capacitors. The LTC3563 is specifically designed to work well with ceramic output capacitors, achieving very low output voltage ripple and a small PCB footprint. The LTC3563 is configured for the power saving Burst Mode Operation. Cellular Telephones Wireless and DSL Modems Digital Cameras MP3 Players PDAs and Other Handheld Devices , LTC, LT, LTM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131, 5994885. U ■ The LTC®3563 is a high efficiency monolithic synchronous buck converter using a constant frequency, current mode architecture. A voltage select input allows the user to program the output voltage to 1.28V or 1.87V. Supply current during operation is only 26µA, dropping to <1µA in shutdown. The 2.5V to 5.5V input voltage range makes the LTC3563 ideally suited for single Li-Ion battery-powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable systems. Internal power switches are optimized to provide high efficiency and eliminate the need for an external Schottky diode. TYPICAL APPLICATIO Efficiency and Power Loss vs Output Current 100 1000 90 1.28V 1.87V VIN SW VOUT 1.28V/1.87V 500mA LTC3563 RUN VOUT VSEL COUT 10µF CER 3563 TA01a GND 80 100 70 EFFICIENCY (%) 2.2µH CIN 10µF CER 60 50 10 40 30 1 20 10 0 0.1 POWER LOSS (mW) VIN 2.7V TO 5.5V VIN = 3.6V VOUT = 1.87V 1 10 100 OUTPUT CURRENT (mA) 0.1 1000 3563 TA01b 3563f 1 LTC3563 W W W AXI U U ABSOLUTE RATI GS PACKAGE/ORDER INFORMATION (Note 1) Input Supply Voltage (VIN) ........................... –0.3V to 6V VOUT, RUN Voltages .....................................–0.3V to VIN VSEL Voltage...................................–0.3V to (VIN + 0.3V) SW Voltage ....................................–0.3V to (VIN + 0.3V) Operating Ambient Temperature Range (Note 2).................................................... –40°C to 85°C Junction Temperature (Note 7) ............................. 125°C Storage Temperature Range................... –65°C to 125°C Reflow Peak Body Temperature (DFN) .................. 260°C TOP VIEW 6 RUN VOUT 1 VIN 2 7 5 VSEL 4 SW GND 3 DC PACKAGE 6-LEAD (2mm × 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 102°C/W, θJC = 20°C/W (SOLDERED TO A 4-LAYER BOARD, NOTE 3) EXPOSED PAD (PIN 7) IS PGND, MUST BE SOLDERED TO PCB ORDER PART NUMBER DC PART MARKING LTC3563EDC LCSZ Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise noted. SYMBOL PARAMETER VIN Operating Voltage Range VOUT Output Voltage (Note 4) CONDITIONS VSEL = 0V VSEL = High ΔVLINE_REG Reference Voltage Line Regulation (Note 4) VIN = 2.5V to 5.5V ΔVLOAD_REG Output Voltage Load Regulation (Note 4) ILOAD = 100mA to 500mA IS Input DC Supply Current (Note 5) Active Mode Sleep Mode Shutdown VOUT = 1.1V, VSEL = 0V VOUT = 1.4V, VSEL = 0V RUN = 0V MIN TYP MAX 5.5 V 1.28 1.87 1.306 1.908 V V 0.04 0.2 %/V 0.2 % 26 0.1 500 35 1 µA µA µA 1.8 2.25 2.7 MHz 650 1000 1750 mA ● 2.5 ● ● 1.254 1.832 ● UNITS fOSC Oscillator Frequency ILIM Peak Switch Current VIN = 3V, VFB = 0.5V, Duty Cycle < 35% RDS(ON) P-Channel On Resistance (Note 6) N-Channel On Resistance (Note 6) ISW = 100mA ISW = 100mA 0.5 0.35 0.65 0.55 Ω Ω ISW(LKG) Switch Leakage Current VIN = 5V, VRUN = 0V, VSW = 0V or 5V ±0.01 ±1 µA 3563f 2 LTC3563 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS VUVLO Undervoltage Lockout Threshold VIN Rising VIN Falling VRUN RUN Threshold ● IRUN RUN Leakage Current ● VSEL VSEL Threshold ● RSEL VSEL Pull-Up Resistance Resistance Between VSEL and VIN Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. No pin should exceed 6V. Note 2: The LTC3563 is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Failure to solder the Exposed Pad of the package to the PC board will result in a thermal resistance much higher than 40°C/W. U W VOUT 50mV/DIV AC COUPLED IL 100mA/DIV VIN = 3.6V VOUT = 1.87V ILOAD = 30mA 2µs/DIV 3563 G01 2.3 1.8 0.3 UNITS V V 1.2 V ±0.01 ±1 µA 0.3 1 1.2 V 1.3 2.2 3 MΩ Start-Up from Shutdown RUN 2V/DIV RUN 2V/DIV VOUT 1V/DIV VOUT 1V/DIV IL 200mA/DIV IL 500mA/DIV VIN = 3.6V VOUT = 1.87V ILOAD = 0A MAX 2.0 1.9 TA = 25°C unless otherwise specified. Start-Up from Shutdown SW 2V/DIV TYP Note 4: The converter is tested in a proprietary test mode that connects the output of the error amplifier to the SW pin, which is connected to an external servo loop. Note 5: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 6: The DFN switch on resistance is guaranteed by correlation to wafer level measurements. Note 7: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD) • (θJA). TYPICAL PERFOR A CE CHARACTERISTICS Burst Mode Operation MIN 400µs/DIV 3542 G02 VIN = 3.6V VOUT = 1.87V ILOAD = 500mA 400µs/DIV 3563 G03 3563f 3 LTC3563 U W TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise specified. Load Step Load Step Load Step VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED IL 500mA/DIV IL 500mA/DIV IL 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV 3563 G04 VIN = 3.6V 20µs/DIV VOUT = 1.87V ILOAD = 0A TO 500mA 3563 G05 VIN = 3.6V 20µs/DIV VOUT = 1.87V ILOAD = 30mA TO 500mA Regulated Output Voltage vs Temperature Load Step 1.31 VOUT 100mV/DIV AC COUPLED Oscillator Frequency vs Temperature 2.5 VSEL = 0V 1.30 2.4 VOUT (V) ILOAD 500mA/DIV FREQUENCY (MHz) 1.29 IL 500mA/DIV 1.28 1.27 1.26 2.3 2.2 2.1 3563 G07 VIN = 3.6V 20µs/DIV VOUT = 1.28V ILOAD = 30mA TO 500mA 3563 G06 20µs/DIV VIN = 3.6V VOUT = 1.28V ILOAD = 0mA TO 500mA 1.25 1.24 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 2.0 –50 125 –25 50 25 0 75 TEMPERATURE (°C) 2.6 0.4 2.5 0.3 2.3 2.2 2.1 –0.1 –0.2 –0.4 5 4 SUPPLY VOLTAGE (V) 6 3563 G10 1.0 0 1.9 VIN = 3.6V 1.5 0.1 –0.3 3 IOUT = 200mA 0.2 2.0 2 2.0 VOUT ERROR (%) 2.4 VOUT ERROR (%) FREQUENCY (MHz) 0.5 1.8 Output Voltage vs Load Current Output Voltage vs Supply Voltage 2.7 125 3563 G09 3563 G08 Oscillator Frequency vs Supply Voltage 100 0.5 Burst Mode OPERATION 0 –0.5 –1.0 –1.5 VOUT = 1.28V VOUT = 1.87V –0.5 2 2.5 3 3.5 4 4.5 5 INPUT VOLTAGE (V) 5.5 6 3563 G11 VOUT = 1.28V VOUT = 1.87V –2.0 1 10 100 LOAD CURRENT (mA) 1000 3563 G12 3563f 4 LTC3563 U W TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C unless otherwise specified. RDS(ON) vs Temperature RDS(ON) vs Input Voltage 0.9 0.9 0.8 0.8 0.7 0.7 Switch Leakage vs Input Voltage 1000 900 MAIN SWITCH LEAKAGE CURRENT (pA) 0.6 RDS(ON) (Ω) MAIN SWITCH 0.5 0.4 0.3 0.2 0.5 0.4 0.3 SYNCHRONOUS SWITCH SYNCHRONOUS SWITCH 0.2 0.1 0 3 4 VIN (V) 5 6 7 –25 0 25 50 75 TEMPERATURE (°C) 100 3563 G13 600 500 MAIN SWITCH 400 300 SYNCHRONOUS SWITCH 100 0 125 0 1 2 3 VIN (V) 3563 G14 Switch Leakage vs Temperature 4 5 6 3542 G15 Efficiency vs Input Voltage 100 300 VOUT = 1.87V 90 250 80 EFFICIENCY (%) 200 150 100 70 60 50 MAIN SWITCH SYNCHRONOUS SWITCH 50 0 –50 –25 40 50 25 75 0 TEMPERATURE (°C) 100 30 2.5 125 IOUT = 500mA IOUT = 100mA IOUT = 10mA IOUT = 1mA IOUT = 0.1mA 3 4.5 4 3.5 INPUT VOLTAGE (V) 5 Efficiency vs Load Current Efficiency vs Load Current 100 100 90 90 80 80 70 70 60 50 40 30 60 50 40 30 20 10 5.5 3563 G17 3542 G16 EFFICIENCY (%) 2 SWITCH LEAKAGE (nA) 1 0 –50 700 200 VIN = 2.7V VIN = 3.6V VIN = 4.2V 0.1 EFFICIENCY (%) RDS(ON) (Ω) 0.6 800 VOUT = 1.87V FIGURE 3a CIRCUIT 0 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 1 10 100 OUTPUT CURRENT (mA) 1000 3563 G17 20 10 VOUT = 1.28V FIGURE 3a CIRCUIT 0 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 1 10 100 OUTPUT CURRENT (mA) 1000 3563 G18 3563f 5 LTC3563 U U U PI FU CTIO S VOUT (Pin 1): Output Voltage Feedback. An internal resistive divider divides the output voltage down for comparison to the internal 0.6V reference voltage. VIN (Pin 2): Power Supply Pin. Must be closely decoupled to GND. GND (Pin 3): Ground Pin. SW (Pin 4): Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches. VSEL (Pin 5): Output Voltage Selection Pin. This pin controls the regulated output voltage. When tied to GND, VOUT is 1.28V. When floating or connecting this pin to VIN, VOUT becomes 1.87V. RUN (Pin 6): Converter Enable Pin. Forcing this pin above 1.5V enables this part, while forcing it below 0.3V causes the device to shut down. In shutdown, all functions are disabled drawing <1µA supply current. This pin must be driven; do not float. Exposed Pad (Pin 7): GND. The Exposed Pad is ground. It must be soldered to PCB ground to provide both electrical contact and optimum thermal performance. 3563f 6 LTC3563 W BLOCK DIAGRA 1 VOUT SLOPE COMPENSATION + OSC VIN 2 ICOMP – VIN 0.6V 5 + – – EA + VSEL VB + BURST LOGIC SW ANTISHOOT THROUGH 4 VIN + 6 RUN 0.6V REF SHUTDOWN IRCMP – GND 3 3563 BD 3563f 7 LTC3563 U OPERATIO The LTC3563 uses a constant frequency, current mode, step-down architecture. The operating frequency is set at 2.25MHz. The output voltage is set by an internal divider. An error amplifier compares the divided output voltage with a reference voltage of 0.6V and adjusts the peak inductor current accordingly. Main Control Loop During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when the VOUT voltage is below the regulated voltage. The current flows into the inductor and the load increases until the current limit is reached. The switch turns off and energy stored in the inductor flows through the bottom switch (N-channel MOSFET) into the load until the next clock cycle. The peak inductor current is controlled by the internally compensated output of the error amplifier. When the load current increases, the feedback voltage decreases slightly below the reference. This decrease causes the error amplifier to increase its output voltage until the average inductor current matches the new load current. The main control loop is shut down by pulling the RUN pin to ground. Burst Mode Operation During light load currents, the LTC3563 operates in Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. In Burst Mode operation, the peak current of the inductor is set to approximately 60mA regardless of the output load. Each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. In between these burst events, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent current to 26µA. In this sleep state, the load current is being supplied solely from the output capacitor. As the output voltage drops, the EA amplifier’s output rises above the sleep threshold and turns the top MOSFET on. This process repeats at a rate that is dependent on the load demand. By running cycles periodically, the switching losses which are dominated by the gate charge losses of the power MOSFETs are minimized. Low Supply Operation To prevent unstable operation, the LTC3563 incorporates an undervoltage lockout circuit which shuts down the part when the input voltage drops below 2V. Internal Soft-Start At start-up when the RUN pin is brought high, the internal reference is linearly ramped from 0V to 0.6V in about 1ms. The regulated output voltage follows this ramp from 0% to 100% in 1ms. The current in the inductor during soft-start is defined by the combination of the current needed to charge the output capacitance and the current provided to the load as the output voltage ramps up. The start-up waveform, shown in the Typical Performance Characteristics, shows the output voltage start-up from 0V to 1.87V with a 500mA load and VIN = 3.6V. 3563f 8 LTC3563 U W U U APPLICATIO S I FOR ATIO A general LTC3563 application circuit is shown in Figure1. External component selection is driven by the load requirement and begins with the selection of the inductor L. Once the inductor is chosen, CIN and COUT can be selected. L VIN 2.7V TO 5.5V VIN CIN SW LTC3563 RUN 1.28V 1.87V VOUT VSEL COUT VOUT GND 3563 F01 Figure 1. LTC3563 General Schematic Inductor Selection The inductor value has a direct effect on ripple current ΔIL, which decreases with higher inductance and increases with higher VIN or VOUT, as shown in following equation: ∆IL = VOUT ⎛ VOUT ⎞ 1– ƒ O • L ⎜⎝ VIN ⎟⎠ where fO is the switching frequency. A reasonable starting point for setting ripple current is ΔIL = 0.4 • IOUT(MAX), where IOUT(MAX) is 500mA. The largest ripple current ΔIL occurs at the maximum input voltage. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation: L= VOUT ⎛ VOUT ⎞ ⎜ 1– ⎟ ƒ O • ∆IL ⎝ VIN(MAX ) ⎠ The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 600mA rated inductor should be enough for most applications (500mA + 100mA). For better efficiency, choose a low DC-resistance inductor. The inductor value will also have an effect on Burst Mode operation. The transition to low current operation begins when the inductor’s peak current falls below a level set by the burst clamp. Lower inductor values result in higher ripple current which causes the transition to occur at lower load currents. This causes a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values cause the burst frequency to increase. Inductor Core Selection Different core materials and shapes change the size/current and price/current relationships of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3563 requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3563 applications. Input Capacitor (CIN) Selection In continuous mode, the input current of the converter is a square wave with a duty cycle of approximately VOUT/VIN. To prevent large voltage transients, a low equivalent series resistance (ESR) input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: IRMS ≈ IMAX VOUT ( VIN – VOUT ) VIN where the maximum average output current IMAX equals the peak current minus half the peak-to-peak ripple current, IMAX = ILIM – ΔIL/2. This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case is commonly used to design because even significant deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours life time. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet the size or height requirements of the 3563f 9 LTC3563 U W U U APPLICATIO S I FOR ATIO Table 1. Representative Surface Mount Inductors PART NUMBER VALUE (µH) MAX DC CURRENT (A) DCR (Ω) SIZE (mm3) CDRH2D11 2.2 0.780 0.098 3.2 × 3.2 × 1.2 CDRH3D16 2.2 1.2 0.075 3.8 × 3.8 × 1.8 MANUFACTURER Sumida Murata TDK CMD4D11 2.2 0.95 0.116 4.4 × 5.8 × 1.2 CDH2D09B 3.3 0.85 0.15 2.8 × 3 × 1 4.9 × 4.9 × 1 CLS4D09 4.7 0.75 0.15 LQH32CN 2.2 0.79 0.097 2.5 × 3.2 × 1.55 LQH43CN 4.7 0.75 0.15 4.5 × 3.2 × 2.6 IVLC453232 2.2 0.85 0.18 4.8 × 3.4 × 3.4 VLF3010AT2R2M1R0 2.2 1.0 0.12 2.8 × 2.6 × 1 design. An additional 0.1µF to 1µF ceramic capacitor is also recommended on VIN for high frequency decoupling, when not using an all ceramic capacitor solution. T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Ceramic Input and Output Capacitors Output Capacitor (COUT) Selection The selection of COUT is driven by the required ESR to minimize voltage ripple and load step transients. Typically, once the ESR requirement is satisfied, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement, except for an all ceramic solution. The output ripple (ΔVOUT) is determined by: ⎛ ⎞ 1 ∆VOUT ≈ ∆IL ⎜ ESR + 8 • ƒO • COUT ⎟⎠ ⎝ where fO is the switching frequency, COUT is the output capacitance and ΔIL is the inductor ripple current. For a fixed output voltage, the output ripple is highest at maximum input voltage since ΔIL increases with input voltage. If tantalum capacitors are used, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalums, available in case heights ranging from 2mm to 4mm. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP, Kemet T510 and Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current rating, high voltage rating and low ESR are tempting for switching regulator use. However, the ESR is so low that it can cause loop stability problems. Since the LTC3563’s control loop does not depend on the output capacitor’s ESR for stable operation, ceramic capacitors can be used to achieve very low output ripple and small circuit size. X5R or X7R ceramic capacitors are recommended because these dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Great care must be taken when using only ceramic input and output capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce ringing at the VIN pin. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, the ringing at the input can be large enough to damage the part. For more information, see Application Note 88. The recommended capacitance value to use is 10µF for both input and output capacitors. 3563f 10 LTC3563 U W U U APPLICATIO S I FOR ATIO Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, three main sources usually account for most of the losses in LTC3563 circuits: 1) VIN quiescent current, 2) I2R loss and 3) switching loss. VIN quiescent current loss dominates the power loss at very low load currents, whereas the other two dominate at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power loss is of no consequence as illustrated in Figure 2. 1000 VIN = 3.6V POWER LOSS (mW) 100 10 1 0.1 0.1 VOUT = 1.87V VOUT = 1.28V 1 10 100 OUTPUT CURRENT (mA) 1000 3563 F02 Figure 2. Power Loss vs Load Current 1) The VIN quiescent current is the DC supply current given in the Electrical Characteristics which excludes MOSFET charging current. VIN current results in a small (<0.1%) loss that increases with VIN, even at no load. 2) I2R losses are calculated from the DC resistances of the internal switches, RSW, and external inductor, RL. In continuous mode, the average output current flows through inductor L, but is “chopped” between the internal top and bottom switches. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (D) as follows: RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT)(1 – D) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses: I2R losses = IOUT2(RSW + RL) 3) The switching current is MOSFET gate charging current, that results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC bias current. In continuous mode, IGATECHG = fO(QT + QB), where QT and QB are the gate charges of the internal top and bottom MOSFET switches. The gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. Other “hidden” losses such as copper trace and internal battery resistances can account for additional efficiency degradations in portable systems. The internal battery and fuse resistance losses can be minimized by making sure that CIN has adequate charge storage and very low ESR at the switching frequency. Other losses include diode conduction losses during dead-time and inductor core losses generally account for less than 2% total additional loss. 3563f 11 LTC3563 U W U U APPLICATIO S I FOR ATIO Thermal Considerations In most applications the LTC3563 does not dissipate much heat due to its high efficiency. But in applications where the LTC3563 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150°C, both power switches will be turned off and the SW node will become high impedance. To avoid the LTC3563 from exceeding the maximum junction temperature, the user needs to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(θJA) where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient. The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. As an example, consider the LTC3563 with an output voltage of 1.87V, an input voltage of 2.7V, a load current of 500mA and an ambient temperature of 70°C. From the typical performance graph of switch resistance, the RDS(ON) of the P-channel switch at 70°C is approximately 0.7Ω and the RDS(ON) of the N-channel synchronous switch is approximately 0.4Ω. The duty cycle in this case is approximately 70%. The series resistance looking into the SW pin is: RSW = 0.7Ω (0.7) + 0.4Ω (0.3) = 0.61Ω Therefore, for the power dissipated by the part is: PD = ILOAD2 • RSW = 152.5mW For the DFN package, the θJA is 40°C/W. Thus, the junction temperature of the regulator is: TJ = 70°C + (0.1525)(40) = 76.1°C which is below the maximum junction temperature of 125°C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD • ESR, where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT, generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Application Note 76. In some applications, a more severe transient can be caused by switching loads with large (>1µF) bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem, if the switch connecting the load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot SwapTM controller is designed specifically for this purpose and usually incorporates current limit, short circuit protection and soft-start. Design Example As a design example, assume the LTC3563 is used in a single lithium-ion battery-powered cellular phone application. The VIN will be operating from a maximum of 4.2V down to about 2.7V. The load current requirement is a maximum of 0.5A, but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. Output voltage is either 1.87V or 1.28V. 3563f 12 LTC3563 U W U U APPLICATIO S I FOR ATIO With this information we can calculate L using: L= CIN will require an RMS current rating of at least 0.25A ≅ ILOAD(MAX)/2 at temperature and COUT will require ESR of less than 0.2Ω. In most cases, ceramic capacitors will satisfy these requirements. Select COUT = 10µF and CIN = 10µF. ⎛ V ⎞ 1 • VOUT • ⎜ 1– OUT ⎟ f • ∆IL VIN ⎠ ⎝ Substituting VOUT = 1.87V, VIN = 4.2V, ΔIL = 200mA and f = 2.25MHz gives: Figure 3 shows the complete circuit along with its efficiency curve, load step response and recommended layout. 1.87 V ⎛ 1.87 V ⎞ • ⎜ 1– = 2.31µH 2.25MHz • 200mA ⎝ 4.2V ⎟⎠ With VOUT = 1.28 V L= PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3563. These items are also illustrated graphically in Figure 3b. Check the following in your layout: 1.28 V ⎛ 1.28 V ⎞ • ⎜ 1– = 1.98µH L= 2.25MHz • 200mA ⎝ 4.2V ⎟⎠ Choosing a vendor’s closest inductor value of 2.2µH results in a maximum ripple current of: 1. The power traces, consisting of the GND trace, the SW trace and the VIN trace should be kept short, direct and wide. For VOUT = 1.87 V ∆IL = 2. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 1.87 V ⎛ 1.87 V ⎞ • ⎜1 – = 209.6mA 2.25MHz • 2.2µH ⎝ 4.2V ⎟⎠ For VOUT = 1.28 V 3. Keep the (–) plates of CIN and COUT as close as possible. 1.28 V ⎛ 1.28 V ⎞ • ⎜1 – = 179.8mA ∆IL = 2.25MHz • 2.2µH ⎝ 4.2V ⎟⎠ Hot Swap is a trademark of Linear Technology Corporation. L VIN 2.7V TO 5.5V VIN CIN SW LTC3563 RUN 1.28V 1.87V VOUT VSEL COUT VOUT 3563 F03 GND Figure 3a. Typical Application 3563f 13 LTC3563 U W U U APPLICATIO S I FOR ATIO VIA TO VOUT GND VIN 6 RUN VOUT 1 VIN 2 CIN GND 5 VSEL 4 SW GND 3 L COUT GND VOUT 3563 F03b Figure 3b. Layout Diagram 100 90 VOUT 100mV/DIV AC COUPLED 80 EFFICIENCY (%) 70 IL 500mA/DIV 60 50 40 ILOAD 500mA/DIV 30 20 10 VOUT = 1.87V FIGURE 3a CIRCUIT 0 0.1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 100 1 OUTPUT CURRENT (mA) 20µs/DIV VIN = 3.6V VOUT = 1.87V ILOAD = 0A TO 500mA 3563 G04 1000 3563 G17 Figure 3d. Load Step Figure 3c. Efficiency Curve 3563f 14 LTC3563 U PACKAGE DESCRIPTIO DC Package 6-Lead Plastic DFN (2mm × 2mm) (Reference LTC DWG # 05-08-1703) 0.675 ±0.05 2.50 ±0.05 1.15 ±0.05 0.61 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 1.42 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 0.56 ± 0.05 (2 SIDES) 0.38 ± 0.05 4 6 2.00 ±0.10 (4 SIDES) PIN 1 BAR TOP MARK (SEE NOTE 6) PIN 1 CHAMFER OF EXPOSED PAD 3 0.200 REF 0.75 ±0.05 1 (DC6) DFN 1103 0.25 ± 0.05 0.50 BSC 1.37 ±0.05 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3563f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC3563 U TYPICAL APPLICATIO Using Low Profile Components, <1mm Height 2.2µH** VIN 2.7V TO 5.5V VIN CIN* 10µF CER VOUT 1.28V/1.87V 500mA SW LTC3563 RUN VOUT COUT* 10µF CER VSEL 1.28V 1.87V 3563 TA02a GND *MURATA GRM219R60J106KE19 **TDK VLF3010AT-2R2M1R0 Efficiency vs Output Current 100 90 VIN = 3.6V 80 EFFICIENCY (%) 70 VOUT = 1.87V VOUT = 1.28V 60 50 40 30 20 10 0 0.1 1 10 100 OUTPUT CURRENT (mA) 1000 3563 TA02b RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3405/LTC3405B 300mA IOUT, 1.5MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 20µA, ISD < 1µA, ThinSOT Package LTC3406/LTC3406B 600mA IOUT, 1.5MHz, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20µA, ISD < 1µA, ThinSOT Package LTC3407/LTC3407-2 Dual 600mA/800mA IOUT, 1.5MHz/2.25MHz, Synchronous 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40µA, Step-Down DC/DC Converter ISD < 1µA, MS10E, DFN Packages LTC3409 600mA IOUT, 1.7MHz/2.6MHZ, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN: 1.6V to 5.5V, VOUT(MIN) = 0.6V, IQ = 65µA, ISD < 1µA, DFN Package LTC3410/LTC3410B 300mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 26µA, ISD < 1µA, SC70 Package LTC3411 1.25A IOUT, 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60µA, ISD < 1µA, MS10, DFN Packages LTC3542 500mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 26µA, ISD < 1µA, DFN Packages LTC3548 Dual 400mA/800mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40µA, ISD < 1µA, MS10, DFN Packages LTC3561 1A IOUT, 4MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 2.6V to 5.5V, VOUT(MIN) = 0.8V, IQ = 240µA, ISD < 1µA, 3mm × 3mm DFN Package 3563f 16 Linear Technology Corporation LT 0107 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007