MOTOROLA MMBF0201 N-channel enhancement-mode tmos mosfet Datasheet

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by MMBF0201N/D
SEMICONDUCTOR TECHNICAL DATA
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Motorola Preferred Device
N–CHANNEL
ENHANCEMENT–MODE
TMOS MOSFET
rDS(on) = 1.0 OHM
These miniature surface mount MOSFETs utilize Motorola’s High
Cell Density, HDTMOS process. Low rDS(on) assures minimal
power loss and conserves energy, making this device ideal for use
in small power management circuitry. Typical applications are
dc–dc converters, power management in portable and battery–
powered products such as computers, printers, PCMCIA cards,
cellular and cordless telephones.

3
• Low rDS(on) Provides Higher Efficiency and Extends Battery Life
3 DRAIN
• Miniature SOT–23 Surface Mount Package Saves Board Space
1
2
CASE 318–07, Style 21
SOT–23 (TO–236AB)
1
GATE
2 SOURCE
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
VDSS
20
Vdc
Gate–to–Source Voltage — Continuous
VGS
± 20
Vdc
Drain Current — Continuous @ TA = 25°C
Drain Current — Continuous @ TA = 70°C
Drain Current — Pulsed Drain Current (tp ≤ 10 µs)
ID
ID
IDM
300
240
750
mAdc
Total Power Dissipation @ TA = 25°C(1)
PD
225
mW
Operating and Storage Temperature Range
TJ, Tstg
– 55 to 150
°C
Thermal Resistance — Junction–to–Ambient
RθJA
625
°C/W
TL
260
°C
Rating
Drain–to–Source Voltage
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
DEVICE MARKING
N1
(1) Mounted on G10/FR4 glass epoxy board using minimum recommended footprint.
ORDERING INFORMATION
Device
Reel Size
Tape Width
Quantity
MMBF0201NLT1
7″
12 mm embossed tape
3000
MMBF0201NLT3
13″
12 mm embossed tape
10,000
HDTMOS is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a registered trademark of the Berquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
Motorola
Transistors, FETs and Diodes Device Data

Motorola, Small–Signal
Inc. 1995
1
MMBF0201N
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
V(BR)DSS
20
—
—
Vdc
—
—
—
—
1.0
10
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 10 µA)
µAdc
Zero Gate Voltage Drain Current
(VDS = 16 Vdc, VGS = 0 Vdc)
(VDS = 16 Vdc, VGS = 0 Vdc, TJ = 125°C)
IDSS
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0)
IGSS
—
—
±100
nAdc
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
VGS(th)
1.0
1.7
2.4
Vdc
Static Drain–to–Source On–Resistance
(VGS = 10 Vdc, ID = 300 mAdc)
(VGS = 4.5 Vdc, ID = 100 mAdc)
rDS(on)
—
—
0.75
1.0
1.0
1.4
gFS
—
450
—
mMhos
pF
ON CHARACTERISTICS(1)
Forward Transconductance (VDS = 10 Vdc, ID = 200 mAdc)
Ohms
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 5.0 V)
Ciss
—
45
—
Output Capacitance
(VDS = 5.0 V)
Coss
—
25
—
Transfer Capacitance
(VDG = 5.0 V)
Crss
—
5.0
—
td(on)
—
2.5
—
tr
—
2.5
—
td(off)
—
15
—
tf
—
0.8
—
QT
—
1400
—
pC
IS
—
—
0.3
A
Pulsed Current
ISM
—
—
0.75
Forward Voltage(2)
VSD
—
0.85
—
SWITCHING CHARACTERISTICS(2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
(VDD = 15 Vdc, ID = 300 mAdc,
RL = 50 Ω)
Fall Time
Gate Charge (See Figure 5)
ns
SOURCE–DRAIN DIODE CHARACTERISTICS
Continuous Current
V
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBF0201N
TYPICAL ELECTRICAL CHARACTERISTICS
1.0
1.0
I D , DRAIN CURRENT (AMPS)
0.8
0.6
0.4
125°C
0.2
0
– 55°C
25°C
0
1
2
3
4
5
ON–RESISTANCE (OHMS)
VGS = 4 V
0.6
VGS = 10, 9, 8, 7, 6 V
0.4
0.2
VGS = 3 V
0
0.3
0.9
Figure 1. Transfer Characteristics
Figure 2. On–Region Characteristics
1.2
0.9
VGS = 4.5 V
0.6
VGS = 10 V
0
0.2
0.4
0.6
ID, DRAIN CURRENT (AMPS)
1
0.8
2.0
1.5
1.0
0.5
0
0
5
10
15
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
1.10
14
1.05
ID = 250 µA
VGS(th) , NORMALIZED
1.00
VDS = 16 V
ID = 300 mA
10
8
6
4
20
Figure 4. On–Resistance versus
Gate–to–Source Voltage
16
12
1.4
2.4
Figure 3. On–Resistance versus Drain Current
0.95
0.90
0.85
0.80
0.75
0.70
2
0
0
1.2
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
0.3
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
0.6
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
1.5
0
0.8
0
6
RDS(on) , DRAIN–TO–SOURCE RESISTANCE (OHMS)
I D , DRAIN CURRENT (AMPS)
VGS = 5 V
0.65
160
450
2000
3400
0.60
–25
0
25
50
75
100
TEMPERATURE (°C)
Figure 5. Gate Charge
Figure 6. Threshold Voltage Variance
Over Temperature
Motorola Small–Signal Transistors, FETs and Diodes Device Data
150
125
Qg, TOTAL GATE CHARGE (pC)
3
MMBF0201N
TYPICAL ELECTRICAL CHARACTERISTICS
100
1.6
VGS = 10 V @ 300 mA
80
C, CAPACITANCE (pF)
RDS(on) , NORMALIZED (OHMS)
1.8
1.4
1.2
VGS = 4.5 V @ 100 mA
1.0
60
Ciss
40
Coss
20
0.8
Crss
0.6
–50
–25
0
25
50
75
100
125
0
150
0
5
10
15
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 7. On–Resistance versus
Junction Temperature
Figure 8. Capacitance
20
SOURCE CURRENT (AMPS)
10
1.0
0.1
125°C
25°C
– 55°C
0.01
0.001
0
0.3
0.6
0.9
1.2
SOURCE–TO–DRAIN FORWARD VOLTAGE (VOLTS)
1.4
Figure 9. Source–to–Drain Forward Voltage
versus Continuous Current (IS)
4
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBF0201N
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
drain pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by T J(max), the maximum rated junction temperature of the
die, RθJA, the thermal resistance from the device junction to
ambient, and the operating temperature, TA . Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:
PD =
TJ(max) – TA
RθJA
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and soldering
should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the maximum
temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should be
allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
MMBF0201N
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIUMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
A
L
3
B S
1
V
2
G
C
H
D
K
J
DIM
A
B
C
D
G
H
J
K
L
S
V
INCHES
MIN
MAX
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0180 0.0236
0.0350 0.0401
0.0830 0.0984
0.0177 0.0236
MILLIMETERS
MIN
MAX
2.80
3.04
1.20
1.40
0.89
1.11
0.37
0.50
1.78
2.04
0.013
0.100
0.085
0.177
0.45
0.60
0.89
1.02
2.10
2.50
0.45
0.60
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
CASE 318–07
SOT–23 (TO–236AB)
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6
◊
*MMBF0201N/D*
Motorola Small–Signal Transistors, FETs and Diodes
Device Data
MMBF0201N/D
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