e ADVANCED LINEAR DEVICES, INC. TM EPAD EN ® AB LE ALD210808A/ALD210808 PRECISION N-CHANNEL EPAD® MOSFET ARRAY VGS(th)= +0.80V QUAD HIGH DRIVE MATCHED PAIR GENERAL DESCRIPTION FEATURES & BENEFITS The ALD210808A/ALD210808 precision enhancement mode N-Channel EPAD® MOSFET array is precision matched at the factory using ALD’s proven EPAD® CMOS technology. These quad monolithic devices are enhanced additions to the ALD110808A/ALD110808 EPAD® MOSFET Family, with increased forward transconductance and output conductance, particularly at very low supply voltages. • Precision VGS(th) = +0.80V +0.010V • VOS (VGS(th) match) to 2mV/10mV max. • Sub-threshold voltage (nano-power) operation • < 800mV min. operating voltage • < 1nA min. operating current • < 1nW min. operating power • > 100,000,000:1 operating current ranges • High transconductance and output conductance • Low RDS(ON) of 25Ω • Output current > 50mA • Matched and tracked tempco • Tight lot-to-lot parametric control • Positive, zero, and negative VGS(th) tempco • Low input capacitance and leakage currents Intended for low voltage, low power small signal applications, the ALD210808A/ ALD210808 features precision threshold voltage, which enables circuit designs with input/output signals referenced to GND at enhanced operating voltage ranges. With these devices, a circuit with multiple cascading stages can be built to operate at extremely low supply/bias voltage levels. For example, a nanopower input amplifier stage operating at less than 1.0V supply voltage has been successfully built with these devices. ALD210808A EPAD MOSFETs feature exceptional matched pair electrical characteristics of Gate Threshold Voltage VGS(th) set precisely at +0.80V +0.01V, IDS = +10µA @ VDS = 0.1V, with a typical offset voltage of only +0.001V (1mV). Built on a single monolithic chip, they also exhibit excellent temperature tracking characteristics. These precision devices are versatile as design components for a broad range of analog small signal applications such as basic building blocks for current mirrors, matching circuits, current sources, differential amplifier input stages, transmission gates, and multiplexers. They also excel in limited operating voltage applications, such as very low level voltage-clamps and nano-power normally-on circuits. In addition to precision matched-pair electrical characteristics, each individual EPAD MOSFET also exhibits well controlled manufacturing characteristics, enabling the user to depend on tight design limits from different production batches. These devices are built for minimum offset voltage and differential thermal response, and they can be used for switching and amplifying applications in +0.1V to +10V (+0.05V to +5V) powered systems where low input bias current, low input capacitance, and fast switching speed are desired. At VGS > +0.80V, the device exhibits enhancement mode characteristics whereas at VGS < +0.80V the device operates in the subthreshold voltage region and exhibits conventional sub threshold characteristics, with well controlled turn-off and sub-threshold levels that operate the same as standard enhancement mode MOSFETs. The ALD210808A/ALD210808 features high input impedance (2.5 x 1010Ω) and high DC current gain (>108). A sample calculation of the DC current gain at a drain output current of 30mA and input current of 300pA at 25°C is 30mA/300pA = 100,000,000, which translates into a dynamic operating current range of about eight orders of magnitude. A series of four graphs titled “Forward Transfer Characteristics”, with the 2nd and 3rd sub-titled “expanded (subthreshold)” and “further expanded (subthreshold)”, and the 4th sub-titled “low voltage”, illustrates the wide dynamic operating range of these devices. Generally it is recommended that the V+ pin be connected to the most positive voltage and the V- and IC (internally-connected) pins to the most negative voltage in the system. All other pins must have voltages within these voltage limits at all times. Standard ESD protection facilities and handling procedures for static sensitive devices are highly recommended when using these devices. ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS)) Operating Temperature Range * 0°C to +70°C 16-Pin SOIC Package ALD210808ASCL ALD210808SCL D 16-Pin Plastic Dip Package APPLICATIONS • Low overhead current mirrors and current sources • Zero Power Normally-On circuits • Energy harvesting detectors • Very low voltage analog and digital circuits • Zero power fail-safe circuits • Backup battery circuits & power failure detector • Extremely low level voltage-clamps • Extremely low level zero-crossing detectors • Matched source followers and buffers • Precision current mirrors and current sources • Matched capacitive probes and sensor interfaces • Charge detectors and charge integrators • High gain differential amplifier input stage • Matched peak-detectors and level-shifters • Multiple Channel Sample-and-Hold switches • Precision Current multipliers • Discrete matched analog switches/multiplexers • Nanopower discrete voltage comparators PIN CONFIGURATION ALD210808 DN1 2 GN1 3 SN1 4 V- 5 6 GN4 7 SN4 M1 V- VM4 DN4 ALD210808APCL ALD210808PCL 8 V- 16 IC* 15 DN2 14 GN2 13 SN2 12 V+ 11 DN3 10 GN3 9 SN3 M2 V- V+ M3 V- SCL, PCL PACKAGES *IC pins are internally connected, connect to V- *Contact factory for industrial temp. range or user-specified threshold voltage values. ©2017 Advanced Linear Devices, Inc., Vers. 1.2 1 IC* www.aldinc.com 1 of 12 ABSOLUTE MAXIMUM RATINGS Drain-Source voltage, VDS 10.6V 10.6V Gate-Source voltage, VGS Operating Current 80mA Power dissipation 500mW Operating temperature range SCL, PCL 0°C to +70°C Storage temperature range -65°C to +150°C Lead temperature, 10 seconds +260°C CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. OPERATING ELECTRICAL CHARACTERISTICS V+ = +5V V- = GND TA = 25°C unless otherwise specified ALD210808A Parameter Symbol Gate Threshold Voltage VGS(th) Offset Voltage Min 0.78 Typ ALD210808 Max Min 0.78 Typ Max Unit Test Conditions 0.80 0.82 V IDS = 10µA, VDS = 0.1V 2 10 mV VGS(th)M1 - VGS(th)M2 or VGS(th)M3 - VGS(th)M4 0.80 0.82 VOS 1 2 Offset Voltage Tempco TCVOS 5 5 µV/°C VDS1 = VDS2 Gate Threshold Voltage Tempco TCVGS(th) -1.6 0.0 +1.6 -1.6 0.0 +1.6 mV/°C ID = 10µA, VDS = 0.1V ID = 380µA, VDS = 0.1V ID = 700µA, VDS = 0.1V Drain Source On Current IDS(ON) 70 70 mA VGS = +4.8V, VDS = +5V 50 50 µA VGS = +0.9V, VDS = +0.1V VGS = +4.8V VDS = +5.0V Forward Transconductance GFS 24 24 mmho Transconductance Mismatch ∆GFS 1.8 1.8 % Output Conductance GOS 1.6 1.6 mmho VGS = +4.8V VDS = +5.0V Drain Source On Resistance RDS(ON) 25 25 Ω VGS = +5.8V VDS = +0.1V Drain Source On Resistance RDS(ON) 10 2.0 10 2.0 KΩ VGS = +0.8V, VDS = +0.1V VGS = +0.9V, VDS = +0.1V Drain Source On Resistance Tolerance ∆RDS(ON) 1.8 1.8 % VGS = +5.8V VDS = +0.1V Drain Source On Resistance Mismatch ∆RDS(ON) 0.6 0.6 % Drain Source Breakdown Voltage BVDSX Drain Source Leakage Current1 IDS(OFF) 10 V V- = VGS = -0.2V IDS = 10µA 400 pA 4 nA VGS = -0.2V, VDS = +5V V- = -5V TA = 125°C 200 1 pA nA VGS = +5V, VDS = 0V TA = 125°C 10 10 400 10 4 Gate Leakage Current1 IGSS 5 Input Capacitance CISS 15 15 pF Transfer Reverse Capacitance CRSS 1 1 pF Turn-on Delay Time ton 10 10 ns V+ = 5V, RL = 5KΩ Turn-off Delay Time toff 10 10 ns V+ = 5V, RL = 5KΩ 60 60 dB f = 100KHz Crosstalk Notes: 1 200 1 5 Consists of junction leakage currents ALD210808A/ALD210808 Advanced Linear Devices 2 of 12 PERFORMANCE CHARACTERISTICS OF EPAD® PRECISION MATCHED PAIR MOSFET ARRAY FAMILY ALD2108xx/ALD2129xx/ALD2148xx/ALD2169xx high precision monolithic quad/dual N-Channel MOSFET arrays are enhanced versions of the ALD1108xx/ALD1109xx EPAD® MOSFET family, with increased forward transconductance and output conductance, intended for operation at very low power supply voltages. These devices are also capable of sub-threshold operation with less than 1nA of operating supply currents and at the same time delivering higher output drive currents (typ. > 50mA). They feature precision Gate Offset Voltages, VOS , defined as the difference in VGS(th) between MOSFET pairs M1 and M2 or M3 and M4. ALD's Electrically Programmable Analog Device (EPAD®) technology provides the industry's only family of matched MOSFET transistors with a range of precision gate-threshold voltage values. All members of this family are designed and actively programmed for exceptional matching of device electrical and temperature characteristics. Gate Threshold Voltage VGS(th) values range from -3.50V Depletion Mode to +3.50V Enhancement Mode devices, including standard products with VGS(th) specified at -3.50V, -1.30V, -0.40V, +0.00V, +0.20V, +0.40V, +0.80V, +1.40V, and +3.30V. ALD can also provide any customer-desired VGS(th) between -3.50V and +3.50V on a special order basis. For all these devices ALD EPAD technology enables excellent well-controlled gate threshold voltage, subthreshold voltage, and low leakage characteristics. With well matched design and precision programming, units from different production lots provide the user with exceptional matching and uniformity characteristics. Built on the same monolithic IC chip, the units also have excellent temperature tracking characteristics. This ALD2108xx/ALD2129xx/ALD2148xx/ALD2169xx EPAD MOSFET Array product family (EPAD MOSFET) is available in three separate categories, each providing a distinctly different set of electrical specifications and characteristics. The first category is the ALD210800A/ALD210800/ALD212900A/ALD212900 Zero-Threshold™ mode EPAD MOSFETs. The second is the ALD2108xx/ ALD2129xx enhancement mode EPAD MOSFETs. The third category includes the ALD2148xx/ALD2169xx depletion mode EPAD MOSFETs. (The suffix “xx” denotes threshold voltage in 0.1V steps, for example, xx=08 denotes 0.80V). For each device, there is a zero-tempco bias current and bias voltage point. When a design utilizes such a feature, then the gate-threshold voltage is temperature stable, greatly simplifying certain designs where stability of certain circuit parameters over a temperature range is desired. The ALD210800A/ALD210800 are quad Zero Threshold MOSFETs in which the individual gate-threshold voltage of each MOSFET is set at zero, VGS(th) = 0.00V at IDS(ON) = 10µA @ VDS(ON) = +0.1V (IDS(ON) = 20µA for the dual ALD212900A/ALD212900). Zero Threshold MOSFETs operate in the enhancement region when operated above threshold voltage (VGS > 0.00V and IDS > 10µA) and subthreshold region when operated at or below threshold voltage (VGS ≤ 0.00V and IDS < 10µA). These devices, along with other low VGS(th) members of the product family, enable ultra low supply voltage analog or digital operation and nanopower circuit designs, thereby reducing or eliminating the use of very high valued (expensive) resistors in many cases. The ALD2108xx/ALD2129xx (quad/dual) product family features precision matched enhancement mode EPAD MOSFET devices, which require a positive gate bias voltage VGS to turn on. Precision VGS(th) values at +3.30V, +1.40V, +0.80V, +0.40V and +0.20V are offered. No conductive channel exists between the source and drain at zero applied gate voltage (VGS = 0.00V) for +3.30V, +1.40V and +0.80V versions. The +0.40V and the +0.20V versions have a subthreshold current at about 1nA and 100nA for the ALD2108xx (2nA and 200nA for the ALD2129xx) respectively at zero applied gate voltage. They are also capable of delivering lower RDS(ON) and higher output currents greater than 68mA (see specifications). ALD210808A/ALD210808 The ALD2148xx/ALD2169xx (quad/dual) features Depletion Mode EPAD MOSFETs, which are normally-on devices at zero applied gate voltage. The VGS(th) is set at a negative voltage level (V- < VGS < VS) at which the EPAD MOSFET turns off. Without a supply voltage and/or with VGS = V- = 0.00V = Ground, the EPAD MOSFET device is already turned on and exhibits a defined and controlled on-resistance RDS(ON). An EPAD MOSFET may be turned off when a negative voltage is applied to V- pin and VGS set more negative than its VGS(th). These Depletion Mode EPAD MOSFETs are different from most other depletion mode MOSFETs and JFETs in that they do not exhibit high gate leakage currents and channel/junction leakage currents, while they stay controlled, modulated and turned off at precise voltages. The same MOSFET device equations as those for enhancement mode devices apply. KEY APPLICATION ENVIRONMENTS EPAD MOSFETs are ideal for circuits requiring low VOS and low operating currents with tracked differential thermal responses. They feature low input bias currents (less than 200pA max.), low input capacitance and fast switching speed. These and other operating characteristics offer unique solutions in one or more of the following operating environments: * Low supply voltage: 0.1V to 10V (+0.05V to +5V) * Ultra low supply voltage: < +10mV to +0.1V * Nanopower operation: voltage x current = nW or µW * Precision VOS characteristics * Matching and tracking of multiple MOSFETs * Matching across multiple packages ELECTRICAL CHARACTERISTICS The turn-on and turn-off electrical characteristics of the EPAD MOSFET products are shown in the IDS(ON) vs. VDS(ON) and IDS(ON) vs. VGS graphs. Each graph shows IDS(ON) versus VDS(ON) characteristics as a function of VGS in a different operating region under different bias conditions, while IDS(ON) at a given gate input voltage is controlled and predictable. A series of four graphs titled “Forward Transfer Characteristics”, with the 2nd and 3rd sub-titled “expanded (subthreshold)” and “further expanded (subthreshold)”, and the 4th sub-titled “low voltage”, illustrates the wide dynamic operating range of these devices. Classic MOSFET equations for an N-channel MOSFET also apply to EPAD MOSFETs. The drain current in the linear region (VDS(ON) < VGS - VGS(th)) is given by: IDS(ON) = u . COX . W/L . [VGS - VGS(th) - VDS/2] . VDS(ON) where: u = Mobility COX = Capacitance / unit area of Gate electrode VGS = Gate to Source Voltage VGS(th) = Gate Threshold (Turn-on)Voltage VDS(ON) = Drain to Source On Voltage W = Channel width L = Channel length In this region of operation the IDS(ON) value is proportional to the VDS(ON) value and the device can be used as a gate-voltage controlled resistor. For higher values of VDS(ON) where VDS(ON) ≥ VGS - VGS(th), the saturation current IDS(ON) is now given by (approx.): IDS(ON) = u . COX . W/L . [VGS - VGS(th)]2 Advanced Linear Devices 3 of 12 PERFORMANCE CHARACTERISTICS OF EPAD® PRECISION MATCHED PAIR MOSFET FAMILY (cont.) SUB-THRESHOLD REGION OF OPERATION PERFORMANCE CHARACTERISTICS The gate threshold (turn-on) voltage VGS(th) of the EPAD MOSFET is a voltage below which the MOSFET conduction channel rapidly turns off. For analog designs, this gate threshold voltage directly affects the operating signal voltage range and the operating bias current levels. Performance characteristics of the EPAD MOSFET product family are shown in the following graphs. In general, the gate threshold voltage shift for each member of the product family causes other affected electrical characteristics to shift linearly with VGS(th) bias voltage. This linear shift in VGS causes the subthreshold I-V curves to shift linearly as well. Accordingly, the subthreshold operating current can be determined by calculating the gate source voltage drop relative to its gate threshold voltage, VGS(th). At a voltage below VGS(th), an EPAD MOSFET exhibits a turn-off characteristic in an operating region called the subthreshold region. This is when the EPAD MOSFET conduction channel rapidly turns off as a function of decreasing applied gate voltage. The conduction channel, induced by the gate voltage on the gate electrode, decreases exponentially and causes the drain current to decrease exponentially as well. However, the conduction channel does not shut off abruptly with decreasing gate voltage, but rather decreases at a fixed rate of about 104mV per decade of drain current decrease. For example, for the ALD2108xx device, if the gate threshold voltage is +0.20V, the drain current is 10µA at VGS = +0.20V. At VGS = +0.096V, the drain current would decrease to 1µA. Extrapolating from this, the drain current is about 0.1µA at VGS = 0.00V, 1nA at VGS = -0.216V, and so forth. This subthreshold characteristic extends all the way down to current levels below 1nA and is limited by junction leakage currents. At a drain current of “zero current” as defined and selected by the user, the VGS voltage at that zero current can now be estimated. Note that using the above example, with VGS(th) = +0.20V, the drain current still hovers around 100nA when the gate is at ground voltage. With a device that has VGS(th) = +0.40V (part number ALD210804), the drain current is about 2nA when the gate is at ground potential. Thus, in this case an input signal referenced to ground can operate with a natural drain current of only 2nA internal bias current, dissipating nano-watts of power. LOW POWER AND NANOPOWER When supply voltages decrease, the power consumption of a given load resistor decreases as the square of the supply voltage. Thus, one of the benefits in reducing supply voltage is to reduce power consumption. While decreasing power supply voltages and power consumption go hand-in-hand with decreasing useful AC bandwidth and increased noise effects in the circuit, a circuit designer can make the necessary tradeoffs and adjustments in any given circuit design and bias the circuit accordingly for optimal performance. With EPAD MOSFETs, a circuit that performs any specific function can be designed so that power consumption of that circuit is minimized. These circuits operate in low power mode where the power consumed is measure in mW, µW, and nW (nano-watt) region and still provide a useful and controlled circuit function operation. ZERO TEMPERATURE COEFFICIENT (ZTC) OPERATION For an EPAD MOSFET in this product family, operating points exist where the various factors that cause the current to increase as a function of temperature balance out those that cause the current to decrease, thereby canceling each other, and resulting in a net temperature coefficient of near zero. An example of this temperature stable operating point is obtained by a ZTC voltage bias condition, which is 0.38V above VGS(th) when VDS(ON) = +0.1V, resulting in a temperature stable current level of about 380µA for the ALD2108xx and 760µA for the ALD2129xx devices. ALD210808A/ALD210808 NORMALLY-ON FIXED RDS(ON) AT VGS = GROUND Several members of this MOSFET family produce a fixed resistance when their gate is grounded. For ALD210800, the drain current at VDS = 0.1V is @ 10µA at VGS = 0.00V. Thus, just by grounding the gate of the ALD210800, a resistor with RDS(ON) = ~10KΩ is produced (For ALD212900 device, RDS(ON) = ~5KΩ). When an ALD214804 gate is grounded, the drain current IDS = 424µA @ VDS = 0.1V, producing RDS(ON) = ~236Ω. Similarly, ALD214813 and ALD214835 produces 1.71mA and 3.33mA for each MOSFET, respectively, at VGS = 0.00V, producing RDS(ON) values of 59Ω and 30Ω, respectively. For example, when all 4 MOSFETs in an ALD214835 are connected in parallel, an on-resistance of 30/4 = ~7.5Ω is measured between the Drain and Source terminals when VGS = V- = 0.00V, producing a fixed on-resistance without any gate bias voltages applied to the device. MATCHING CHARACTERISTICS One of the key performance benefits of using matched-pair EPAD MOSFETs is to maintain temperature tracking between the different devices in the same package. In general, for EPAD MOSFET matched pair devices, one device of the matched pair has gate leakage currents, junction temperature effects, and drain current temperature coefficient as a function of bias voltage that cancel out similar effects of the other device, resulting in a temperature stable circuit. As mentioned earlier, this temperature stability can be further enhanced by biasing the matched-pairs at Zero Tempco (ZTC) point, even though that may require special circuit configurations and power consumption design considerations. POWER SUPPLY SEQUENCES AND ESD CONTROL EPAD MOSFETs are robust and reliable, as demonstrated by more than a decade of production history supplied to a large installed base of customers across the world. However, these devices do require a few design and handling precautions in order for them to be used successfully. EPAD MOSFETs, being a CMOS Integrated Circuit, in addition to having Drain, Gate and Source pins normally found in a MOSFET device, have three other types of pins, namely V+, V- and IC pins. V+ is connected to the substrate, which must always be connected to the most positive supply in a circuit. V- is the body of the MOSFET, which must be connected to the most negative supply voltage in the circuit. IC pins are internally connected pins, which must also be connected to V-. Drain, Gate and Source pins must have voltages between V- and V+ at all times. Proper power-up sequencing requires powering up supply voltages before applying any signals. During the power down cycle, remove all signals before removing V- and V+. This way internally back biased diodes are never allowed to become forward biased, possibly causing damage to the device. Of course, standard ESD control procedures should also be observed so that static charge does not degrade the performance of the devices. Advanced Linear Devices 4 of 12 TYPICAL PERFORMANCE CHARACTERISTICS LOW VOLTAGE OUTPUT CHARACTERISTICS 40 100 DRAIN SOURCE ON CURRENT IDS(ON) (mA) VGS = VGS(th)+5V 80 VGS = VGS(th)+4V 60 VGS = VGS(th)+3V 40 VGS = VGS(th)+2V 20 VGS = VGS(th)+1V 0 V- = 0V 20 2V 10 0 VGS - VGS(th) = 1V -10 -20 -30 -40 10 -0.4 -0.3 DRAIN SOURCE ON VOLTAGE - VDS(ON) (V) VGS(th) = 0.0V VGS(th) = -1.3V VGS(th) = +0.2V VGS(th) = -3.5V VGS(th) = +0.4V 20 VGS(th) = +0.8V VGS(th) = +1.4V 0 -2 2 0 4 6 +0.4 +0.5 1000.00 100.00 10.00 1.00 0.10 0.01 -5 8 ALD210814 ALD214813 10000.00 -4 -3 -2 -1 0 +1 +2 GATE SOURCE VOLTAGE - VGS (V) GATE SOURCE VOLTAGE - VGS (V) FORWARD TRANSFER CHARACTERISTICS LOW VOLTAGE 500 FORWARD TRANSFER CHARACTERISTICS FURTHER EXPANDED (SUBTHRESHOLD) 1000000.00 DRAIN SOURCE ON CURRENT IDS(ON) (nA) DRAIN SOURCE ON CURRENT IDS(ON) (µA) +0.2 +0.3 ALD210802 ALD210804 ALD210808 VGS(th) = -0.8V 40 +0.1 ALD214808 DRAIN SOURCE ON CURRENT IDS(ON) (nA) DRAIN SOURCE ON CURRENT IDS(ON) (mA) VGS(th) = -0.2V -4 TA = + 25°C 100000.00 VGS(th) = -0.4V 60 0.0 FORWARD TRANSFER CHARACTERISTICS EXPANDED (SUBTHRESHOLD) 1000000.00 TA = + 25°C VDS = + 5V 80 -0.1 DRAIN SOURCE ON VOLTAGE - VDS(ON) (V) FORWARD TRANSFER CHARACTERISTICS 100 -0.2 ALD214804 8 ALD214802 6 4 2 ALD210800 0 400 10V 8V 6V 4V 30 ALD214835 DRAIN SOURCE ON CURRENT IDS(ON) (mA) OUTPUT CHARACTERISTICS 100000.00 VDS = + 5.0V TA = + 25°C 300 200 100 0 TA = + 25°C 10000.00 1000.00 100.00 10.00 1.00 0.10 0.01 -0.4 -0.3 -0.2 -0.1 0 +0.1 +0.2 +0.3 +0.4 +0.5 GATE SOURCE OVERDRIVE VOLTAGE VGS - VGS(th) (V) ALD210808A/ALD210808 Advanced Linear Devices -0.5 -0.4 -0.3 -0.2 -0.1 0.0 +0.1 +0.2 GATE SOURCE OVERDRIVE VOLTAGE VGS - VGS(th) (V) 5 of 12 TYPICAL PERFORMANCE CHARACTERISTICS (cont.) HIGH LEVEL OUTPUT CONDUCTANCE vs. GATE THRESHOLD VOLTAGE LOW LEVEL OUTPUT CONDUCTANCE vs. AMBIENT TEMPERATURE HIGH LEVEL OUTPUT CONDUCTANCE - GOS (mA/V) LOW LEVEL OUTPUT CONDUCTANCE - GOS (µA/V) 500 VGS = VGS(th) + 0.5V VDS = + 5.0V 400 300 200 100 TA = + 25°C 2.0 1.5 1.0 VGS = VGS(th) + 4.0V VDS = + 5.0V 0.5 0 0 -50 -25 0 +25 +50 +75 +125 +100 -4.0 -2.0 -1.0 0.0 +1.0 +2.0 +3.0 GATE THRESHOLD VOLTAGE - VGS(th) (V) LOW LEVEL OUTPUT CONDUCTANCE vs. GATE THRESHOLD VOLTAGE HIGH LEVEL OUTPUT CONDUCTANCE vs. AMBIENT TEMPERATURE HIGH LEVEL OUTPUT CONDUCTANCE - GOS (mA/V) 3.0 TA = + 25°C 400 300 200 VGS = VGS(th) + 0.5V VDS = + 5.0V 100 0 -4.0 -3.0 -2.0 -1.0 0 +1.0 +2.0 VGS = VGS(th)+ 4.0V VDS = + 5.0V 2.5 2.0 1.5 1.0 0.5 0 -50 +3.0 -25 0 +25 +50 +75 +100 +125 AMBIENT TEMPERATURE - TA (°C) GATE THRESHOLD VOLTAGE - VGS(th) (V) TRANSCONDUCTANCE vs. AMBIENT TEMPERATURE TRANSCONDUCTANCE vs. GATE THRESHOLD VOLTAGE 50 40 TRANSCONDUCTANCE GFS ( mA/V) TRANSCONDUCTANCE GFS (mA/V) -3.0 AMBIENT TEMPERATURE - TA (°C) 500 LOW LEVEL OUTPUT CONDUCTANCE - GOS (µA/V) 2.5 40 VGS = VGS(th) + 4.0V VDS = + 5.0V 30 20 10 VGS = VGS(th) + 1.0V VDS = + 5.0V 0 VGS = VGS(th) + 4.0V VDS = + 5.0V TA = + 25°C 30 20 10 VGS = VGS(th) + 1.0V VDS = + 5.0V 0 -50 -25 0 +25 +50 +75 +100 +125 -4.0 AMBIENT TEMPERATURE - TA (°C) ALD210808A/ALD210808 -3.0 -2.0 -1.0 0.0 +1.0 +2.0 +3.0 GATE THRESHOLD VOLTAGE - VGS(th) (V) Advanced Linear Devices 6 of 12 TYPICAL PERFORMANCE CHARACTERISTICS (cont.) ZERO TEMPERATURE COEFFICIENT (ZTC) 500 100 DRAIN SOURCE ON CURRENT IDS(ON) (µA) DRAIN SOURCE ON CURRENT IDS(ON) (mA) OUTPUT CHARACTERISTICS VGS = VGS(th) + 4V 80 -55°C 60 +25°C 40 +125°C +70°C 20 0 VDS = + 0.1V 400 300 +125°C 200 +25°C 100 - 55°C 0 0 1 2 3 4 5 +0.1 0 DRAIN SOURCE ON VOLTAGE - VDS(ON) (V) +25°C 60 40 +70°C 20 +125°C 0 1 2 3 4 5 GATE SOURCE OVERDRIVE VOLTAGE VGS-VGS(th) (V) DRAIN SOURCE ON CURRENT IDS(ON) (mA) -55°C 80 0 +0.3 +0.5 +0.4 GATE SOURCE OVERDRIVE VOLTAGE vs. DRAIN SOURCE ON CURRENT 100 VDS = + 10V +0.2 GATE SOURCE OVERDRIVE VOLTAGE VGS - VGS(th) (V) DRAIN SOURCE ON CURRENT vs. GATE SOURCE OVERDRIVE VOLTAGE 5 V+ = VDS = + 5V 4 +125°C 3 +70°C -55°C 0°C 2 +25°C 1 0 0 10 20 30 40 50 60 70 GATE SOURCE OVERDRIVE VOLTAGE VGS - VGS(th) (V) DRAIN SOURCE ON CURRENT - IDS(ON) (mA) GATE SOURCE OVERDRIVE VOLTAGE vs. DRAIN SOURCE ON CURRENT GATE THRESHOLD VOLTAGE vs. AMBIENT TEMPERATURE 2.0 5 GATE THRESHOLD VOLTAGE VGS(th) (V) GATE SOURCE OVERDRIVE VOLTAGE VGS-VGS(th) (V) Zero Temperature Coefficient (ZTC) VDS = + 0.2V 4 +125°C 3 +70°C +25°C 2 0°C 1 - 55°C 0 VDS = + 0.1V ID = 10µA 1.0 VGS(th) = 0.8V 0 VGS(th) = 0.0V -1.0 VGS(th) = -1.4V -2.0 0 2 4 6 8 10 DRAIN SOURCE ON CURRENT - IDS(ON) (mA) ALD210808A/ALD210808 Advanced Linear Devices -50 -25 0 +25 +50 +75 +100 +125 AMBIENT TEMPERATURE - TA (°C) 7 of 12 TYPICAL PERFORMANCE CHARACTERISTICS (cont.) OFFSET VOLTAGE vs. AMBIENT TEMPERATURE 600 +10 +8 500 +6 OFFSET VOLTAGE VOS (mV) DRAIN OFF LEAKAGE CURRENT IDS(OFF) (pA) DRAIN OFF LEAKAGE CURRENT IDS(OFF) vs. AMBIENT TEMPERATURE 400 300 200 IDS(OFF) REPRESENTATIVE UNITS VOS = VGS(th)M1 - VGS(th)M2 VOS = VGS(th)M3 - VGS(th)M4 +4 +2 0 -2 -4 -6 -8 100 -10 0 -50 -25 0 +25 +50 +75 +100 +125 ALD210808A/ALD210808 -50 -25 0 +25 +50 +75 +100 +125 AMBIENT TEMPERATURE - TA (°C) AMBIENT TEMPERATURE - TA (°C) Advanced Linear Devices 8 of 12 TYPICAL APPLICATIONS CURRENT SOURCE MIRROR CURRENT SOURCE WITH GATE CONTROL V+ = +5V V+ = +5V V+ = +5V M3 ISET M3 M4 RSET ISOURCE RSOURCE Digital Logic Control of Current Source ON ISET M4 RSET ISOURCE M1 M2 M1 OFF M1, M2: ALD1101, ALD1116, V+ - Vt ISOURCE = ISET = ALD1109xx, RSET ALD2129xx, where Vt = VGS - VGS(th) = VDS 1/2 ALD1103, 1/2 ALD1105, 1/2 ALD1106, 1/2 ALD1108xx, or 1/2 ALD2108xx M1: 1/2 ALD1101, 1/2 ALD1116, 1/2 ALD1109xx, 1/2 ALD2129xx, 1/4 ALD1103, 1/4 ALD1105, 1/4 ALD1106, 1/4 ALD1108xx, or 1/4 ALD2108xx M3, M4: ALD1102, ALD1117, 1/2 ALD1103, 1/2 ALD1105, 1/2 ALD1107, or 1/2 ALD3107xx RSOURCE M1, M2: N - Channel MOSFET M3, M4: P - Channel MOSFET M3, M4: ALD1102, ALD1117, 1/2 ALD1103, 1/2 ALD1105, 1/2 ALD1107, or 1/2 ALD3107xx : N - Channel MOSFET M1 M3, M4 : P - Channel MOSFET CURRENT SOURCE MULTIPLICATION DIFFERENTIAL AMPLIFIER V+ = +5V V+ = +5V V+ Package N Package 1 ISET RSOURCE RSET ISOURCE = ISET x N PMOS PAIR M4 M3 VIN+ MSET M2 M3 MN M2 Current Source MSET, M1..MN: N x ALD1101, N x ALD1116, N x ALD1109xx, N x ALD2129xx, N x ALD1103, N x ALD1106, N x ALD1108xx, or N x ALD2108xx M3, M4: ALD1102, ALD1117, 1/2 ALD1103, 1/2 ALD1105, 1/2 ALD1107, or 1/2 ALD3107xx All M's in the set are from the same part number. M1, M2: N - Channel MOSFET M3, M4: P - Channel MOSFET ALD210808A/ALD210808 M1 VIN- NMOS PAIR M1 M1, M2: ALD1101, ALD1116, ALD1109xx, ALD2129xx, 1/2 ALD1103, 1/2 ALD1105, 1/2 ALD1106, 1/2 ALD1108xx, or 1/2 ALD2108xx VOUT MSET, M1..MN: N - Channel MOSFET Advanced Linear Devices 9 of 12 TYPICAL APPLICATIONS (cont.) BASIC CURRENT SOURCES N- CHANNEL CURRENT SOURCE V+ = +5V RSOURCE ISOURCE P- CHANNEL CURRENT SOURCE V+ = +5V V+ = +5V ISET RSET 8 M2 8 6 M1 2 7 ISOURCE = ISET = 7 6 M3 3 5 3 2 M4 5 1 V+ - Vt RSET where Vt = VGS - VGS(th) = VDS ISET M1, M2: ALD1101, ALD1116, ALD1109xx, ALD2129xx, 1/2 ALD1103, 1/2 ALD1105, 1/2 ALD1106, 1/2 ALD1108xx, or 1/2 ALD2108xx RSET RSOURCE ISOURCE M3, M4: ALD1102, ALD1117, 1/2 ALD1103, 1/2 ALD1105, 1/2 ALD1107, or 1/2 ALD3107xx M3, M4: P - Channel MOSFET M1, M2 :N - Channel MOSFET CASCODE CURRENT SOURCES ISOURCE RSOURCE M4 M2 V+ = +5V V+ = +5V V+ = +5V ISET RSET M1 M2 M3 M4 M3 M1 ISET M1, M2: ALD1101, ALD1116, ALD2129xx, 1/2 ALD1103, 1/2 ALD1105, 1/2 ALD1106, or 1/2 ALD2108xx M3, M4: ALD1101, ALD1116, 1/2 ALD1103, 1/2 ALD1105, 1/2 ALD1106, or 1/2 ALD2108xx M1, M2, M3, M4: N - Channel MOSFET where M1 and M2 is a matched pair and M3 and M4 is a second matched pair. ALD210808A/ALD210808 M1, M2: ALD1102, ALD1117, 1/2 ALD1103, 1/2 ALD1105, 1/2 ALD1107, or 1/2 ALD3107xx RSET RSOURCE ISOURCE M3, M4: ALD1102, ALD1117, 1/2 ALD1103, 1/2 ALD1105, V+ - 2Vt 1/2 ALD1107, or ISOURCE = ISET = RSET 1/2 ALD3107xx where Vt = VGS - VGS(th) = VDS M1, M2, M3, M4: P - Channel MOSFET where M1 and M2 is a matched pair and M3 and M4 is a second matched pair. Advanced Linear Devices 10 of 12 SOIC-16 PACKAGE DRAWING 16 Pin Plastic SOIC Package E Millimeters Dim S (45°) D A Min 1.35 Max 1.75 Min 0.053 Max 0.069 A1 0.10 0.25 0.004 0.010 b 0.35 0.45 0.014 0.018 C 0.18 0.25 0.007 0.010 D-16 9.80 10.00 0.385 0.394 E 3.50 4.05 0.140 0.160 1.27 BSC e e Inches 0.050 BSC H 5.70 6.30 0.224 0.248 L 0.60 0.937 0.024 0.037 A ø 0° 8° 0° 8° A1 S 0.25 0.50 0.010 0.020 b S (45°) H L ALD210808A/ALD210808 C ø Advanced Linear Devices 11 of 12 PDIP-16 PACKAGE DRAWING 16 Pin Plastic DIP Package E E1 Millimeters Dim D S A2 A1 e b A L Inches A Min 3.81 Max 5.08 Min 0.105 Max 0.200 A1 0.38 1.27 0.015 0.050 A2 1.27 2.03 0.050 0.080 b 0.89 1.65 0.035 0.065 b1 0.38 0.51 0.015 0.020 c 0.20 0.30 0.008 0.012 D-16 18.93 21.33 0.745 0.840 E 5.59 7.11 0.220 0.280 E1 7.62 8.26 0.300 0.325 e 2.29 2.79 0.090 0.110 e1 L 7.37 7.87 0.290 0.310 2.79 3.81 0.110 0.150 S-16 0.38 1.52 0.015 0.060 ø 0° 15° 0° 15° b1 c e1 ALD210808A/ALD210808 ø Advanced Linear Devices 12 of 12