Nonreflective, Silicon SP4T Switch, 0.1 GHz to 6.0 GHz HMC7992 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM GND RFC GND GND 16 15 14 13 HMC7992 RF4 1 12 RF1 GND 2 11 GND GND 3 10 GND RF3 4 9 RF2 2:4 TTL DECODER 5 6 7 8 GND VDD B A PACKAGE BASE GND APPLICATIONS 13714-001 Nonreflective, 50 Ω design High isolation: 45 dB typical at 2 GHz Low insertion loss: 0.6 dB at 2 GHz High power handling 33 dBm through path 27 dBm terminated path High linearity 1 dB compression (P1dB): 35 dBm typical Input third-order intercept (IIP3): 58 dBm typical ESD rating: 2 kV human body model (HBM), Class 2 Single positive supply: 3.3 V to 5.0 V Standard TTL-, CMOS-, and 1.8 V-compatible control 16-lead, 3 mm × 3 mm LFCSP package (9 mm2) Pin compatible with the HMC241ALP3E Figure 1. Cellular/4G infrastructure Wireless infrastructure Automotive telematics Mobile radios Test equipment GENERAL DESCRIPTION The HMC7992 is a general-purpose, nonreflective, 0.1 GHz to 6.0 GHz, silicon, single-pole, four-throw (SP4T) switch in a leadless, surface-mount package. The switch is ideal for cellular infrastructure applications, offers high isolation of 45 dB typical at 2 GHz, and a low insertion loss of 0.6 dB at 2 GHz. It offers excellent power handling capability up to 6.0 GHz, with input power of 1 dB compression point (P1dB) of 35 dBm at 5 V operation. The HMC7992 has good low frequency input power handling below 0.1 GHz and can operate well down to 10 kHz, with a typical 1 dB compression of 21 dBm (see Figure 21) and an IIP3 of 37 dBm (see Figure 22) at 1 MHz. Rev. 0 The on-chip circuitry allows the HMC7992 to operate at a single, positive supply voltage range from 3.3 V to 5 V, and as well as a single, positive control voltage from 0 V to 1.8 V/3.3 V/5.0 V. A 2:4 decoder integrated in the switch requires only two controlled input signals, with a positive control voltage range from 0 V to 1.8 V/3.3 V/5.0 V, to select one of the four radio frequency (RF) paths. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com HMC7992 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................7 Applications ....................................................................................... 1 Insertion Loss, Isolation, and Return Loss ................................7 Functional Block Diagram .............................................................. 1 Input Compression and Input Third-Order Intercept (0.1 GHz to 6.0 GHz) ....................................................................9 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Digital Control Voltages .............................................................. 4 Bias and Supply Current .............................................................. 4 Absolute Maximum Ratings ............................................................ 5 ESD Caution .................................................................................. 5 Input Compression and Input Third-Order Intercept (10 kHz to 1 GHz) ..................................................................................... 10 Theory of Operation ...................................................................... 11 Applications Information .............................................................. 12 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 13 Pin Configuration and Function Descriptions ............................. 6 Interface Schematics..................................................................... 6 REVISION HISTORY 1/16—Revision 0: Initial Version Rev. 0 | Page 2 of 13 Data Sheet HMC7992 SPECIFICATIONS VDD = 3.3 V to 5.0 V, VCTL = 0 V/VDD, TA = 25°C, 50 Ω system, unless otherwise noted. Table 1. Parameter INSERTION LOSS Symbol ISOLATION RFC to RF1to RF4 (Worst Case) RETURN LOSS On State 0.1 dB Compression INPUT THIRD-ORDER INTERCEPT RECOMMENDED OPERATING CONDITIONS Bias Voltage Range Control Voltage Range Case Temperature Range Maximum RF Input Power Through Path Terminated Path Hot Switching Min Typ 0.6 0.7 1.0 0.1 GHz to 2.0 GHz 2.0 GHz to 4.0 GHz 4.0 GHz to 6.0 GHz 40 32 25 45 37 30 dB dB dB 25 24 17 7 15 20 dB dB dB dB dB dB 30 150 320 ns ns ns 35 33 33 31 dB dB dB dB 58 56 dBm dBm 0.1 GHz to 2.0 GHz 2.0 GHz to 4.0 GHz 4.0 GHz to 6.0 GHz 0.1 GHz to 2.0 GHz 0.4 GHz to 1.0 GHz 1.0 GHz to 6.0 GHz Off State SWITCHING SPEED Rise Time and Fall Time On Time and Off Time RADIO FREQUENCY (RF) SETTLING TIME INPUT POWER 1 dB Compression Test Conditions/Comments 0.1 GHz to 2.0 GHz 2.0 GHz to 4.0 GHz 4.0 GHz to 6.0 GHz tRISE, tFALL tON, tOFF P1dB P0.1dB IIP3 10%/90% RFOUT 50% VCTL to 0.1 dB margin of final RFOUT 0.1 GHz to 6.0 GHz VDD = 5 V VDD = 3.3 V VDD = 5 V VDD = 3.3 V 0.1 GHz to 6.0 GHz, two-tone input power = 14 dBm/tone VDD = 5 V VDD = 3.3 V VDD VCTL TCASE 3.0 0 −40 0.1 GHz to 6.0 GHz VDD/VCTL = 5 V, TCASE = 105°C VDD/VCTL = 5 V, TCASE = −40°C to +85°C VDD/VCTL = 3.3 V, TCASE = 105°C VDD/VCTL = 3.3 V, TCASE = −40°C to +85°C VDD/VCTL = 3.3 V to 5 V, TCASE = 105°C VDD/VCTL = 3.3 V to 5 V, TCASE = 85°C VDD/VCTL = 3.3 V to 5 V, TCASE = 25°C VDD/VCTL = 3.3 V to 5 V, TCASE = −40°C VDD/VCTL = 3.3 V to 5 V, TCASE = 105°C VDD/VCTL = 3.3 V to 5 V, TCASE = −40°C to +85°C Rev. 0 | Page 3 of 13 Max 0.9 1.1 1.5 5.4 VDD +105 30 33 29 32 21 24 27 27 24 27 Unit dB dB dB V V °C dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm HMC7992 Data Sheet DIGITAL CONTROL VOLTAGES TCASE = −40°C to +105°C, unless otherwise specified. Table 2. Parameter INPUT CONTROL VOLTAGE Low Voltage High Voltage Symbol Min VIL 0 0 1.15 1.55 VIH Typ Max Unit 8.5 1.2 3.3 5.0 V V V V Test Conditions/Comments <1 µA typical VDD = 3.3 V (±5% VDD) VDD = 5 V (±5% VDD) VDD = 3.3 V (±5% VDD) VDD = 5 V (±5% VDD) BIAS AND SUPPLY CURRENT Table 3. Parameter SUPPLY CURRENT VDD = 3.3 V VDD = 5 V Symbol IDD Min Rev. 0 | Page 4 of 13 Typ Max Unit 0.16 0.18 0.20 0.23 mA mA Data Sheet HMC7992 ABSOLUTE MAXIMUM RATINGS 36 Table 4. 32 30 28 TERMINATED AMR 26 24 0.1 1 10 FREQUENCY (GHz) 13714-002 MAXIMUM RF INPUT POWER (dBm) 34 dBm 28 dBm 30 dBm 135°C −65°C to +150°C 260°C THROUGH AMR 34 Figure 2. Maximum RF Input Power vs. Frequency 35 115°C 200°C THROUGH (AT 85°C) 33 THROUGH (AT 105°C) 2 kV (Class 2) 1.25 kV For recommended operating conditions, see Table 1. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. 31 29 27 25 TERMINATED (AT 85°C) 23 TERMINATED (AT 105°C) 21 19 0.1 1 FREQUENCY (GHz) Figure 3. Power Derating vs. Frequency ESD CAUTION Rev. 0 | Page 5 of 13 10 13714-003 1 Rating −0.3 V to +5.5 V −0.5 V to VDD + (+0.5 V) POWER DERATING (dBm) Parameter Bias Voltage Range (VDD) Control Voltage Range (A, B) RF Input Power,1 3.3 V to 5 V (see Figure 2 and Figure 3) Through Path Terminated Path Hot Switching Channel Temperature Storage Temperature Range Maximum Peak Reflow Temperature (MSL3) Thermal Resistance (Channel to Package Bottom) Through Path Terminated Path ESD Sensitivity Human Body Model (HBM) Charged Device Model (CDM) HMC7992 Data Sheet 13 GND 14 GND 16 GND 15 RFC PIN CONFIGURATION AND FUNCTION DESCRIPTIONS RF4 1 GND 3 12 RF1 HMC7992 TOP VIEW (Not to Scale) 11 GND 10 GND 9 RF2 A 8 B 7 VDD 6 GND 5 RF3 4 NOTES 1. THE EXPOSED PAD MUST CONNECT TO RF/DC GROUND. 13714-004 GND 2 Figure 4. Pin Configuration Table 5. Pin Function Descriptions Pin No. 1 2, 3, 5, 10, 11, 13, 14, 16 4 6 7 Mnemonic RF4 GND 8 A 9 12 15 RF2 RF1 RFC EPAD RF3 VDD B Description RF Port 4. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin. Ground. The package bottom has an exposed metal pad that must connect to the printed circuit board (PCB) RF/dc ground. See Figure 5 for the GND interface schematic. RF Port 3. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin. Supply Voltage. Logic Control Input B. See Figure 6 for the control input interface schematic. See Table 6 and the recommended input control voltages range in Table 2. Logic Control Input A. See Figure 6 for the control input interface schematic. See Table 6 and the recommended input control voltages range in Table 2. RF Port 2. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin. RF Port 1. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin. RF Common Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is required on this pin. Exposed Pad. The exposed pad must connect to RF/dc ground. Table 6. Truth Table Control Input Signal Path State A B RFC to Low High Low High Low Low High High RF1 RF2 RF3 RF4 INTERFACE SCHEMATICS VDD A/B 13714-005 13714-006 GND Figure 5. GND Interface Schematic Figure 6. Logic Control (A/B) Interface Schematic Rev. 0 | Page 6 of 13 Data Sheet HMC7992 TYPICAL PERFORMANCE CHARACTERISTICS 0 0 –0.5 –0.5 INSERTION LOSS (dB) –1.5 –2.0 0 2 1 3 4 6 5 7 8 FREQUENCY (GHz) –2.5 13714-007 –2.5 –2.0 +105°C +85°C +25°C –40°C 0 RFC TO RF2 RFC TO RF3 RFC TO RF4 –10 –20 –30 –30 ISOLATION (dB) –20 –50 –60 –80 –90 –100 4 3 5 6 13714-008 –90 –100 FREQUENCY (GHz) Figure 8. Isolation vs. Frequency, VDD = 3.3 V to 5 V, RFC to RF1 = On 0 2 3 4 5 6 0 RFC TO RF1 RFC TO RF2 RFC TO RF3 –10 –20 –30 –30 ISOLATION (dB) –20 –40 –50 –60 –40 –50 –60 –70 –80 –80 –90 –90 –100 2 3 FREQUENCY (GHz) 4 5 6 13714-009 –70 1 1 Figure 11. Isolation vs. Frequency, VDD = 3.3 V to 5 V, RFC to RF2 = On RFC TO RF1 RFC TO RF2 RFC TO RF4 0 8 FREQUENCY (GHz) 0 –10 7 6 –60 –70 2 5 –50 –80 1 4 –40 –70 0 3 RFC TO RF1 RFC TO RF3 RFC TO RF4 –10 –40 2 1 Figure 10. Insertion Loss vs. Frequency for Various Temperatures, VDD = 3.3 V 0 ISOLATION (dB) 0 FREQUENCY (GHz) Figure 7. Insertion Loss vs. Frequency for Various Temperatures, VDD = 5 V ISOLATION (dB) +105°C +85°C +25°C –40°C 13714-010 –1.5 –1.0 13714-111 –1.0 Figure 9. Isolation vs. Frequency, VDD = 3.3 V to 5 V, RFC to RF3 = On –100 0 1 2 3 FREQUENCY (GHz) 4 5 6 13714-112 INSERTION LOSS (dB) INSERTION LOSS, ISOLATION, AND RETURN LOSS Figure 12. Isolation vs. Frequency, VDD = 3.3 V to 5 V, RFC to RF4 = On Rev. 0 | Page 7 of 13 Data Sheet 0 –5 –5 –10 –10 –15 –20 –25 –15 –20 –25 –30 –30 –35 –35 –40 0 1 2 3 4 5 6 FREQUENCY (GHz) RF1, RF2, RF3, AND RF4 = ON RF1, RF2, RF3, AND RF4 = OFF –40 0 1 2 3 4 5 6 FREQUENCY (GHz) Figure 13. Return Loss for RFC vs. Frequency, VDD = 3.3 V to 5 V Figure 14. Return Loss for RF1, RF2, RF3, and RF4 vs. Frequency, VDD = 3.3 V to 5 V Rev. 0 | Page 8 of 13 13714-114 RETURN LOSS (dB) 0 13714-113 RETURN LOSS (dB) HMC7992 Data Sheet HMC7992 INPUT COMPRESSION AND INPUT THIRD-ORDER INTERCEPT (0.1 GHz TO 6.0 GHz) 40 36 34 32 30 28 36 34 32 30 0 1 2 3 4 5 6 FREQUENCY (GHz) 26 0 INPUT COMPRESSION (dBm) 6 34 32 30 36 34 32 30 1 2 3 4 5 6 FREQUENCY (GHz) 26 13714-012 0 0 1 2 3 4 5 6 FREQUENCY (GHz) Figure 16. Input Compression 0.1 dB Point vs. Frequency for Various Temperatures, VDD = 5 V 13714-015 28 Figure 19. Input Compression 0.1 dB Point vs. Frequency for Various Temperatures, VDD = 3.3 V 65 65 +105°C +85°C +25°C –40°C +105°C +85°C +25°C –40°C 60 IIP3 (dBm) 60 55 55 50 50 0 1 2 3 4 5 FREQUENCY (GHz) 6 45 13714-013 45 0 1 2 3 4 5 FREQUENCY (GHz) Figure 17. Input Third-Order Intercept (IIP3) Point vs. Frequency for Various Temperatures, VDD = 5 V Figure 20. Input Third-Order Intercept (IIP3) Point vs. Frequency for Various Temperatures, VDD = 3.3 V Rev. 0 | Page 9 of 13 6 13714-016 INPUT COMPRESSION (dBm) 5 +105°C +85°C +25°C –40°C 38 28 IIP3 (dBm) 4 40 36 26 3 Figure 18. Input Compression 1 dB Point vs. Frequency for Various Temperatures, VDD = 3.3 V +105°C +85°C +25°C –40°C 38 2 FREQUENCY (GHz) Figure 15. Input Compression 1 dB Point vs. Frequency for Various Temperatures, VDD = 5 V 40 1 13714-014 28 13714-011 26 +105°C +85°C +25°C –40°C 38 INPUT COMPRESSION (dBm) 38 INPUT COMPRESSION (dBm) 40 +105°C +85°C +25°C –40°C HMC7992 Data Sheet INPUT COMPRESSION AND INPUT THIRD-ORDER INTERCEPT (10 kHz TO 1 GHz) 65 40 60 55 30 P1dB P0.1dB IIP3 (dBm) INPUT COMPRESSION (dBm) 35 25 50 45 40 20 35 15 0.1 1 10 10 FREQUENCY IN LOG SCALE (MHz) 100 25 0.01 13714-020 10 0.01 0.1 1 10 10 FREQUENCY IN LOG SCALE (MHz) Figure 21. Input Compression (P1dB and P0.1dB Points) vs. Frequency in Log Scale, VDD = 5 V at 25°C 100 13714-021 30 Figure 22. Input Third-Order Intercept (IIP3) vs. Frequency in Log Scale, VDD = 5 V at 25°C Rev. 0 | Page 10 of 13 Data Sheet HMC7992 THEORY OF OPERATION The HMC7992 requires a single positive supply voltage applied to the VDD pin. A bypassing capacitor is recommended on the supply line to minimize RF coupling. The HMC7992 integrates with an internal 2:4 decoder; the four RF paths are selected via the two digital control voltages applied to the A and B control inputs. A small value bypassing capacitor is recommended on these digital signal lines to improve the RF signal isolation. The HMC7992 is internally matched to 50 Ω at the RF common port (RFC) and the RF ports (RF1, RF2, RF3, and RF4); therefore, no external matching components are required. The RF pins are dc-coupled and dc blocking capacitors are required on the RF paths. The design is bidirectional; the RF input signals can apply at the RFC port or the RF1 to RF4 ports. The inputs and outputs are interchangeable. Depending on the logic level applied to the control input pins, A and B, one RF output port (for example, RF1) is set to on mode, by which an insertion loss path is provided from the input to the output. The other RF output ports (for example, RF2, RF3, and RF4) are then set to off mode, by which the outputs are isolated from the input. When the RF output ports (RF1, RF2, RF3, and RF4) are in isolation mode, they are internally terminated to 50 Ω, and thereby can absorb the applied RF signal. The ideal power-up sequence is as follows: 1. 2. 3. 4. Power up GND. Power up VDD. Power up the digital control inputs. The relative order of the logic control inputs is not important. Powering the logic control inputs before the VDD supply can inadvertently forward bias and damage the internal ESD protection structures. Apply the RF input. Table 7. Switch Mode Operation Digital Control Inputs Signal Mode A Low B Low High Low Low High High High RFC to RFx RF Port 1 is in on mode, providing a low insertion loss path from the RFC port to the RF1 port. The remaining RF ports (RF2, RF3, and RF4) are in off mode; they are isolated from the RFC port and internally terminated to a 50 Ω load. RF Port 2 is in on mode, providing a low insertion loss path from the RFC port to the RF2 port. The remaining RF ports (RF1, RF3, and RF4) are in off mode; they are isolated from the RFC port and internally terminated to a 50 Ω load. RF Port 3 is in on mode, providing a low insertion loss path from the RFC port to the RF3 port. The remaining RF ports (RF1, RF2, and RF4) are in off mode; they are isolated from the RFC port and internally terminated to a 50 Ω load. RF Port 4 is in on mode, providing a low insertion loss path from the RFC port to the RF4 port. The remaining RF ports (RF1, RF2, and RF3) are in off mode; they are isolated from the RFC port and internally terminated to a 50 Ω load. Rev. 0 | Page 11 of 13 HMC7992 Data Sheet APPLICATIONS INFORMATION Generate the evaluation PCB with proper RF circuit design techniques. Signal lines at the RF port must have a 50 Ω impedance, and the package ground leads and backside ground slug must connect directly to the ground plane, as shown in Figure 23. The evaluation board shown in Figure 23 is available from Analog Devices, Inc., upon request. Table 8. Bill of Materials for the EV1HMC7992LP3D1 Evaluation Board Reference Designator J1 to J5 C1 to C5 C8 to C10 C13 R1 to R2 U1 PCB2 Description PCB mount SMA connectors 100 pF capacitors, 0402 package 100 pF capacitors, 0402 package 0.1 μF capacitor, 0402 package 0 Ω resistors, 0402 package HMC7992LP3DE SP4T switch 600-01284-00 evaluation PCB 1 13714-017 Reference this evaluation board number when ordering the complete evaluation board. 2 Circuit board material: Roger 4350 or Arlon 25FR. Figure 23. EV1HMC7992LP3D Evaluation Board Rev. 0 | Page 12 of 13 Data Sheet HMC7992 OUTLINE DIMENSIONS 0.30 0.25 0.20 0.50 BSC 13 PIN 1 INDICATOR 16 1 12 EXPOSED PAD 1.92 1.70 SQ 1.48 9 TOP VIEW 0.95 0.85 0.75 4 5 8 0.20 MIN BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE PKG-000000 *0.35 0.30 0.25 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. *COMPLIANT WITH JEDEC STANDARDS MO-220-VEED-4 WITH THE EXCEPTION OF PACKAGE EDGE TO LEAD EDGE. 01-08-2015-A PIN 1 INDICATOR 3.10 3.00 SQ 2.90 Figure 24. 16-Lead Lead Frame Chip Scale Package [LFCSP] 3 mm × 3 mm Body and 0.85 mm Package Height (CP-16-38) Dimensions shown in millimeters ORDERING GUIDE Model1 HMC7992LP3DE Temperature Range –40°C to +105°C MSL Rating2 MSL3 Package Description 16-Lead Lead Frame Chip Scale Package [LFCSP] Package Option CP-16-38 HMC7992LP3DETR –40°C to +105°C MSL3 16-Lead Lead Frame Chip Scale Package [LFCSP] CP-16-38 EV1HMC7992LP3D Evaluation Board 1 The HMC7992LP3DE and HMC7992LP3DETR are RoHS Compliant Parts. See the Absolute Maximum Ratings section for MSL rating information. 3 4-digit lot number XXXX. 2 ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13714-0-1/16(0) Rev. 0 | Page 13 of 13 Branding3 7992 XXXX 7992 XXXX