LM48860
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LM48860
SNAS398D – JANUARY 2008 – REVISED MAY 2013
Ground-Referenced, Ultra Low Noise, Fixed Gain
Stereo Headphone Amplifier
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FEATURES
DESCRIPTION
•
•
•
•
•
•
The LM48860 is a ground referenced, fixed-gain
audio power amplifier capable of delivering 40mW per
channel of continuous average power into a 16Ω
single-ended load with less than 1% THD+N from a
3V power supply.
1
2
•
•
Fixed Logic Levels with Supply Voltage
Ground Referenced Outputs
High PSRR
Available in Space-Saving DSBGA Package
Ultra Low Current Shutdown Mode
Improved Pop & Click Circuitry Eliminates
Noises During Turn-On and Turn-Off
Transitions
No Output Coupling Capacitors, Snubber
Networks, Bootstrap Capacitors, or GainSetting Resistors Required
Shutdown Either Channel Independently
APPLICATIONS
•
•
•
•
•
Mobile Phones
MP3 Players
PDAs
Portable Electronic Devices
Notebook PCs
KEY SPECIFICATIONS
•
•
•
•
•
PSRR at 217Hz (VDD = 3.0V): 80dB (typ)
Stereo Power Output at VDD = 3V, RL = 16Ω,
THD+N = 1%: 40mW (typ)
Shutdown Current 0.1μA (typ)
Internal Fixed Gain: 1.5V/V (typ)
Operating Voltage: 2.0V to 5.5V
The LM48860 features a new circuit technology that
utilizes a charge pump to generate a negative
reference voltage. This allows the outputs to be
biased about ground, thereby eliminating outputcoupling capacitors typically used with normal singleended loads.
Boomer audio power amplifiers were designed
specifically to provide high quality output power with a
minimal amount of external components. The
LM48860 does not require output coupling capacitors
or bootstrap capacitors, and therefore is ideally suited
for mobile phone and other low voltage applications
where minimal power consumption is a primary
requirement.
The LM48860 features a low-power consumption
shutdown mode selectable for either channel
separately. This is accomplished by driving either the
SD_RC (Shutdown Right Channel) or SD_LC
(Shutdown Left Channel) (or both) pins with logic low,
depending on which channel is desired shutdown.
Additionally, the LM48860 features an internal
thermal shutdown protection mechanism.
The LM48860 contains advanced pop & click circuitry
that eliminates noises which would otherwise occur
during turn-on and turn-off transitions.
The LM48860 has an internal fixed gain of 1.5V/V.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LM48860
SNAS398D – JANUARY 2008 – REVISED MAY 2013
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Typical Application
VDD
+
C5
4.7 PF
C6
0.1 PF ceramic
VDD
1 PF
+
30 k:
20 k:
-
RIN
C1
Ri
ROUT
+
VIN1
Headphone
Jack
SD_LC
Shutdown
Control
SD_RC
Click/Pop
Suppression
CCP+
C4
Charge
Pump
2.2 PF
VIN2
+
CCP-
1 PF
+
20 k:
LIN
C2
-
Ri
VSS(CP)
LOUT
30 k:
SGND
SGND
C3
2.2 PF
Figure 1. Typical Audio Amplifier Application Circuit
Connection Diagram
1
2
RIN
SGND
LIN
ROUT
SD_LC
LOUT
VSS(CP)
SD_RC
VDD
CCP-
PGND
CCP+
A
B
C
D
3
Figure 2. DSBGA - Top View
See YZR0012 Package
2
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PIN DESCRIPTIONS
Pin
Name
A1
RIN
A2
SGND
A3
LIN
Function
Right Channel Input
Signal Ground
Left Channel Input
B1
ROUT
Right Channel Output
B2
SD_LC
Active Low Shutdown, Left Channel
B3
LOUT
Left Channel Output
C1
VSS(CP)
Charge Pump Voltage Output
C2
SD_RC
Active-Low Shutdown, Right Channel
C3
VDD
D1
CCP-
Negative Terminal - Charge Pump Flying Capacitor
D2
PGND
Power Ground
D3
CCP+
Positive Terminal - Charge Pump Flying Capacitor
Supply Voltage
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Supply Voltage
6.0V
−65°C to +150°C
Storage Temperature
Input Voltage
Power Dissipation
-0.3V to VDD
(3)
Internally Limited
ESD Rating (4)
2000V
ESD Rating (5)
200V
Junction Temperature
150°C
Thermal Resistance
θJA (typ) DSBGA
(1)
(2)
(3)
(4)
(5)
59.3°C/W
The Electrical Characteristics tables list ensure specifications under the listed Recommended Operating Conditions except as otherwise
modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not
specified.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower. For the LM48860, see power derating curves for additional information.
Human body model, applicable std. JESD22-A114C.
Machine model, applicable std. JESD22-A115-A.
Operating Ratings
Temperature Range
TMIN ≤ TA ≤ TMAX
−40°C ≤ TA ≤ 85°C
Supply Voltage (VDD)
2.0V ≤ VDD ≤ 5.5V
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Electrical Characteristics VDD = 3V
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(1) (2)
The following specifications apply for VDD = 3V and 16Ω load unless otherwise specified. Limits apply to TA = 25°C.
Symbol
Parameter
Quiescent Power Supply Current
Full Power Mode
IDD
Conditions
LM48860
Typical
VDD = 3.0V,
VIN = 0V, inputs terminated
both channels enabled
4
VDD = 5.0V,
VIN = 0V, inputs terminated
both channels enabled
4.2
(3)
Limit (4)
Units
(Limits)
5.5
mA (max)
mA
SD_LC = SD_RC= GND
0.1
1
µA (max)
ISD
Shutdown Current
SD_LC = SD_RC= GND,
VDD = 5.0V
0.1
1
µA (max)
VOS
Output Offset Voltage
RL = 32Ω, VIN = 0V
0.7
5.5
mV (max)
AV
Voltage Gain
–1.5
V/V
ΔAV
Channel-to-channel Gain
Matching
1
%
RIN
Input Resistance
20
15
25
kΩ (min)
kΩ (max)
THD+N = 1% (max); f = 1kHz,
RL = 16Ω, (two channels in phase)
40
35
mW (min)
THD+N = 1% (max); f = 1kHz,
RL = 32Ω, (two channels in phase)
50
40
mW (min)
PO
Output Power
THD+N
Total Harmonic Distortion + Noise
PO = 20mW, f = 1kHz, RL = 16Ω
(two channels in phase)
0.025
%
PO = 25mW, f = 1kHz, RL = 32Ω
(two channels in phase)
0.014
%
VRIPPLE = 200mVPP, Input Referred
PSRR
Power Supply Rejection Ratio
Full Power Mode
f = 217Hz
80
73
dB (min)
f = 1kHz
75
dB
f = 20kHz
60
dB
105
dB
SNR
Signal-to-Noise Ratio
RL = 32Ω, POUT = 50mW,
f = 1kHz, BW = 20Hz to 22kHz,
A-weighted
VIH
Shutdown Input Voltage High
VDD = 2.0V to 5.5V
1.2
V (min)
VIL
Shutdown Input Voltage Low
VDD = 2.0V to 5.5V
0.45
V (max)
XTALK
Crosstalk
RL = 16Ω, PO = 1.6mW,
f = 1kHz
75
dB
∈OS
Output Noise
A-weighted filter, VIN = 0V
8
μV
ZOUT
Output Impedance
VSD = GND
Input Terminated
Input not terminated
SD_LC = SD_RC = GND
30
30
IL
Input Leakage
(1)
(2)
(3)
(4)
4
±0.1
20
kΩ (min)
kΩ
nA
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating
Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All
voltages are measured with respect to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list ensure specifications under the listed Recommended Operating Conditions except as otherwise
modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not
specified.
Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of
product characterization and are not specified.
Datasheet min/max specification limits are ensured by test or statistical analysis.
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External Components Description
(Figure 1)
Components
Functional Description
1.
C1
Input coupling capacitor which blocks the DC voltage at the amplifier’s input terminals. Also creates a high pass-pass
filter with Ri at fC = 1/(2RiC1). Refer to the section Proper Selection of External Components, for an explanation of how
to determine the value of C1.
2.
C2
Input coupling capacitor which blocks the DC voltage at the amplifier’s input terminals. Also creates a high pass-pass
filter with Ri at fC = 1/(2RiC2). Refer to the Power Supply Bypassing section for an explanation of how to determine the
value of C2.
3.
C3
Output capacitor. Low ESR ceramic capacitor (≤100mΩ)
4.
C4
Flying capacitor. Low ESR ceramic capacitor (≤100mΩ)
5.
C5
Tantalum capacitor. Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply
Bypassing section for information concerning proper placement and selection of the supply bypass capacitor.
6.
C6
Ceramic capacitor. Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply
Bypassing section for information concerning proper placement and selection of the supply bypass capacitor.
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Typical Performance Characteristics
THD+N vs Output Power
VDD = 3V, RL = 16Ω
f = 1kHz, 22kHz BW, one channel enabled
10
1
1
THD+N (%)
THD+N (%)
10
THD+N vs Output Power
VDD = 3V, RL = 16Ω, f = 1kHz
22kHz BW, two channels in phase
0.1
0.1
0.01
10
20
40
60
100
0.01
10
200
30
40 50 60 7080 100
OUTPUT POWER (mW)
OUTPUT POWER (mW)
Figure 3.
Figure 4.
THD+N vs Output Power
VDD = 3V, RL = 32Ω
f = 1kHz, 22kHz BW, one channel enabled
THD+N vs Output Power
VDD = 3V, RL = 32Ω, f = 1kHz
22kHz BW, two channels in phase
10
1
1
THD+N (%)
THD+N (%)
10
0.1
0.01
10
0.1
20
30
0.01
10
40 50 60 70 80 100
OUTPUT POWER (mW)
20
30
40 50 60 7080 100
OUTPUT POWER (mW)
Figure 5.
Figure 6.
THD+N vs Output Power
VDD = 3.6V, RL = 16Ω
f = 1kHz, 22kHz BW, one channel enabled
THD+N vs Output Power
VDD = 3.6V, RL = 16Ω, f = 1kHz
22kHz BW, two channels in phase
10
1
1
THD+N (%)
THD+N (%)
10
0.1
0.01
10
0.1
20
30
40 50 60 7080 100
0.01
10
OUTPUT POWER (mW)
20
30
40 50 60 70 80 100
OUTPUT POWER (mW)
Figure 7.
6
20
Figure 8.
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Typical Performance Characteristics (continued)
THD+N vs Output Power
VDD = 3.6V, RL = 32Ω
f = 1kHz, 22kHz BW, one channel enabled
10
1
1
THD+N (%)
THD+N (%)
10
THD+N vs Output Power
VDD = 3.6V, RL = 32Ω, f = 1kHz
22kHz BW, two channels in phase
0.1
0.01
10
0.1
20
30
0.01
10
40 50 60 70 80 100
OUTPUT POWER (mW)
20
30
40 50 60 70 80 100
OUTPUT POWER (mW)
Figure 9.
Figure 10.
THD+N vs Output Power
VDD = 4.2V, RL = 16Ω
f = 1kHz, 22kHz BW, one channel enabled
THD+N vs Output Power
VDD = 4.2V, RL = 16Ω, f = 1kHz
22kHz BW, two channels in phase
10
1
1
THD+N (%)
THD+N (%)
10
0.1
0.01
10
0.1
20
40
60
100
0.01
10
200
OUTPUT POWER (mW)
20
40
60
100
200
OUTPUT POWER (mW)
Figure 11.
Figure 12.
THD+N vs Output Power
VDD = 4.2V, RL = 32Ω
f = 1kHz, 22kHz BW, one channel enabled
THD+N vs Output Power
VDD = 4.2V, RL = 32Ω, f = 1kHz
22kHz BW, two channels in phase
10
1
1
THD+N (%)
THD+N (%)
10
0.1
0.1
0.01
10
20
30
40 50 60 70 80 100
0.01
10
20
30
40 50 60 70 80 100
OUTPUT POWER (mW)
OUTPUT POWER (mW)
Figure 13.
Figure 14.
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Typical Performance Characteristics (continued)
THD+N vs Frequency
VDD = 3V, RL = 32Ω
PO = 20mW, 22kHz BW
10
10
1
1
THD+N (%)
THD+N (%)
THD+N vs Frequency
VDD = 3V, RL = 16Ω
PO = 20mW, 22kHz BW
0.1
0.1
0.01
0.001
20
0.01
200
2k
0.001
20
20k
FREQUENCY (Hz)
10
Figure 16.
THD+N vs Frequency
VDD = 3.6V, RL = 16Ω
PO = 30mW, 22kHz BW
THD+N vs Frequency
VDD = 3.6V, RL = 32Ω
PO = 30mW, 22kHz BW
10
THD+N (%)
THD+N (%)
0.1
0.01
0.01
200
2k
20k
0.001
20
200
2k
20k
FREQUENCY (Hz)
Figure 17.
Figure 18.
THD+N vs Frequency
VDD = 4.2V, RL = 16Ω
PO = 30mW, 22kHz BW
THD+N vs Frequency
VDD = 4.2V, RL = 32Ω
PO = 30mW, 22kHz BW
10
10
1
1
THD+N (%)
THD+N (%)
FREQUENCY (Hz)
0.1
0.01
0.1
0.01
200
2k
20k
0.001
20
200
2k
20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 19.
8
20k
1
0.1
0.001
20
2k
Figure 15.
1
0.001
20
200
FREQUENCY (Hz)
Figure 20.
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Typical Performance Characteristics (continued)
0
-10
-10
-20
-20
-30
-30
-40
-50
-60
-50
-60
-70
-80
-80
-90
-90
200
2k
-100
20
20k
2k
FREQUENCY (Hz)
Figure 21.
Figure 22.
PSRR vs Frequency
VDD = 3.6V, RL = 16Ω
VRIPPLE = 200mVPP
PSRR vs Frequency
VDD = 3.6V, RL = 32Ω
VRIPPLE = 200mVPP
0
0
-10
-20
-20
-30
-30
-40
-50
-60
-50
-60
-70
-70
-80
-80
-90
-90
-100
20
-100
20
200
2k
20k
-40
20k
200
2k
20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23.
Figure 24.
PSRR vs Frequency
VDD = 4.2V, RL = 16Ω
VRIPPLE = 200mVPP
PSRR vs Frequency
VDD = 4.2V, RL = 32Ω
VRIPPLE = 200mVPP
0
-10
-10
-20
-20
-30
-30
-40
PSRR (dB)
PSRR (dB)
200
FREQUENCY (Hz)
-10
0
PSRR vs Frequency
VDD = 3V, RL = 32Ω
VRIPPLE = 200mVPP
-40
-70
-100
20
PSRR (dB)
PSRR (dB)
0
PSRR (dB)
PSRR (dB)
PSRR vs Frequency
VDD = 3V, RL = 16Ω
VRIPPLE = 200mVPP
-50
-60
-40
-50
-60
-70
-70
-80
-80
-90
-90
-100
20
-100
20
200
2k
20k
FREQUENCY (Hz)
200
2k
20k
FREQUENCY (Hz)
Figure 25.
Figure 26.
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Typical Performance Characteristics (continued)
Output Power vs Supply Voltage
RL = 16Ω, f = 1kHz, 22kHz BW
120
Output Power vs Supply Voltage
RL = 32Ω, f = 1kHz, 22kHz BW
70
THD+N = 10%
OUTPUT POWER (mW)
OUTPUT POWER (mW)
THD+N = 10%
60
100
80
THD+N = 1%
60
40
20
50
THD+N = 1%
40
30
20
10
0
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0
2.0
5.5
2.5
4.5
5.0
5.5
Figure 28.
Power Dissipation vs Output Power
VDD = 3V, RL = 16Ω, f = 1kHz
Power Dissipation vs Output Power
VDD = 3V, RL = 32Ω, f = 1kHz
200
175
250
POWER DISSIPATION (mW)
POWER DISSIPATION (mW)
4.0
Figure 27.
300
200
150
100
50
0
150
125
100
75
50
25
0
10
20
30
40
50
60
0
70
0
OUTPUT POWER/CHANNEL (mW)
10
20
30
40
50
60
70
OUTPUT POWER/ CHANNEL (mW)
Figure 29.
Figure 30.
Power Dissipation vs Output Power
VDD = 5V, RL = 16Ω, f = 1kHz
Power Dissipation vs Output Power
VDD = 5V, RL = 32Ω, f = 1kHz
700
400
600
350
POWER DISSIPATION (mW)
POWER DISSIPATION (mW)
3.5
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
500
400
300
200
100
0
300
250
200
150
100
50
0
20
40
60
80
100
120
OUTPUT POWER/CHANNEL (mW)
0
0
10
20
30
40
50
60
70
80
OUTPUT POWER/CHANNEL (mW)
Figure 31.
10
3.0
Figure 32.
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Typical Performance Characteristics (continued)
Supply Current vs Supply Voltage
VIN = GND, No Load
Power Derating Curve
VDD = 3V, RL = 16Ω
150
AMBIENT TEMPERATURE (°C)
SUPPLY CURRENT (mA)
4.00
3.75
3.50
3.25
3.00
2.0
2.5
3.0
3.5
4.0
4.5
5.0
145
140
135
130
5.5
0
50
200
Figure 34.
Power Derating Curve
VDD = 3V, RL = 32Ω
Power Derating Curve
VDD = 5V, RL = 16Ω
250
300
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
150
Figure 33.
150
145
140
135
100
POWER DISSIPATION (mW)
SUPPLY VOLTAGE (V)
0
140
130
120
110
100
20 40 60 80 100 120 140 160 180 200
0
POWER DISSIPATION (mW)
100
200
300
400
500
600
700
POWER DISSIPATION (mW)
Figure 35.
Figure 36.
Power Derating Curve
VDD = 5V, RL = 32Ω
AMBIENT TEMPERATURE (°C)
150
145
140
135
130
125
0
50
100 150 200 250 300 350 400
POWER DISSIPATION (mW)
Figure 37.
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APPLICATION INFORMATION
SUPPLY VOLTAGE SEQUENCING
It is a good general practice to first apply the supply voltage to a CMOS device before any other signal or supply
on other pins. This is also true for the LM48860 audio amplifier which is a CMOS device.
Before applying any signal to the inputs or shutdown pins of the LM48860, it is important to apply a supply
voltage to the VDD pins. After the device has been powered, signals may be applied to the shutdown pins (see
MICRO POWER SHUTDOWN) and input pins.
ELIMINATING THE OUTPUT COUPLING CAPACITOR
The LM48860 features a low noise inverting charge pump that generates an internal negative supply voltage.
This allows the outputs of the LM48860 to be biased about GND instead of a nominal DC voltage, like traditional
headphone amplifiers. Because there is no DC component, the large DC blocking capacitors (typically 220µF)
are not necessary. The coupling capacitors are replaced by two, small ceramic charge pump capacitors, saving
board space and cost.
Eliminating the output coupling capacitors also improves low frequency response. In traditional headphone
amplifiers, the headphone impedance and the output capacitor form a high pass filter that not only blocks the DC
component of the output, but also attenuates low frequencies, impacting the bass response. Because the
LM48860 does not require the output coupling capacitors, the low frequency response of the device is not
degraded by external components.
In addition to eliminating the output coupling capacitors, the ground referenced output nearly doubles the
available dynamic range of the LM48860 when compared to a traditional headphone amplifier operating from the
same supply voltage.
OUTPUT TRANSIENT ('CLICK AND POPS') ELIMINATED
The LM48860 contains advanced circuitry that virtually eliminates output transients ('clicks and pops'). This
circuitry prevents all traces of transients when the supply voltage is first applied or when the part resumes
operation after coming out of shutdown mode.
AMPLIFIER CONFIGURATION EXPLANATION
As shown in Figure 1, the LM48860 has two internal operational amplifiers. The two amplifiers have internally
configured gain.
Since this is an output ground-referenced amplifier, the LM48860 does not require output coupling capacitors.
POWER DISSIPATION
From the graph (THD+N vs Output Power , VDD = 3V, RL = 16Ω, f = 1kHz, 22kH BW, two channels in phase,
page 6) assuming a 3V power supply and a 16Ω load, the maximum power dissipation point and thus the
maximum package dissipation point is 281mW. The maximum power dissipation point obtained must not be
greater than the power dissipation that results from Equation 1.
PDMAX = (TJMAX - TA) / (θJA)
(1)
For the DSBGA package θ JA = 59.3°C/W. TJMAX = 150°C for the LM48860. Depending on the ambient
temperature, TA, of the system surroundings, Equation 1 can be used to find the maximum internal power
dissipation supported by the IC packaging. If the maximum power dissipation from the graph is greater than that
of Equation 1, then either the supply voltage must be decreased, the load impedance increased or TA reduced
(see power derating curves). For the application of a 5V power supply, with a 16Ω load, the maximum ambient
temperature possible without violating the maximum junction temperature is approximately 110°C provided that
device operation is around the maximum power dissipation point. Power dissipation is a function of output power
and thus, if typical operation is not around the maximum power dissipation point, the ambient temperature may
be increased accordingly.
12
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LM48860
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SNAS398D – JANUARY 2008 – REVISED MAY 2013
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. Applications that employ a 3V power supply typically use a 4.7µF capacitor in parallel with a 0.1µF
ceramic filter capacitor to stabilize the power supply's output, reduce noise on the supply line, and improve the
supply's transient response. Keep the length of leads and traces that connect capacitors between the LM48860's
power supply pin and ground as short as possible.
MICRO POWER SHUTDOWN
The voltage applied to the SD_LC (shutdown left channel) pin and the SD_RC (shutdown right channel) pin
controls the LM48860’s shutdown function. When active, the LM48860’s micropower shutdown feature turns off
the amplifiers’ bias circuitry, reducing the supply current. The trigger point is 0.45V for a logic-low level, and 1.2V
for logic-high level. The low 0.01µA (typ) shutdown current is achieved by applying a voltage that is as near as
ground a possible to the SD_LC/SD_RC pins. A voltage that is higher than ground may increase the shutdown
current. Do not let SD_LC/SD_RC float, connect either to high or low.
SELECTING PROPER EXTERNAL COMPONENTS
Optimizing the LM48860's performance requires properly selecting external components. Though the LM48860
operates well when using external components with wide tolerances, best performance is achieved by optimizing
component values.
Charge Pump Capacitor Selection
Use low ESR (equivalent series resistance) (<100mΩ) ceramic capacitors with an X7R dielectric for best
performance. Low ESR capacitors keep the charge pump output impedance to a minimum, extending the
headroom on the negative supply. Higher ESR capacitors result in reduced output power from the audio
amplifiers.
Charge pump load regulation and output impedance are affected by the value of the flying capacitor (C4). A
larger valued C4 (up to 3.3uF) improves load regulation and minimizes charge pump output resistance. Beyond
3.3uF, the switch-on resistance dominates the output impedance.
The output ripple is affected by the value and ESR of the output capacitor (C3). Larger capacitors reduce output
ripple on the negative power supply. Lower ESR capacitors minimize the output ripple and reduce the output
impedance of the charge pump.
The LM48860 charge pump design is optimized for 2.2uF, low ESR, ceramic, flying and output capacitors.
Input Capacitor Value Selection
Amplifying the lowest audio frequencies requires high value input coupling capacitors (C1 and C2 in Figure 1). A
high value capacitor can be expensive and may compromise space efficiency in portable designs. In many
cases, however, the speakers used in portable systems, whether internal or external, have little ability to
reproduce signals below 150Hz. Applications using speakers with this limited frequency response reap little
improvement by using high value input and output capacitors.
As shown in Figure 1, the internal input resistor, Ri and the input capacitors, C1 and C2, produce a -3dB highpass filter cutoff frequency that is found using Equation 2.
fi-3dB = 1 / 2πRINC
(Hz)
(2)
The value of RIN can be found in the Electrical Characteristics tables.
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13
LM48860
SNAS398D – JANUARY 2008 – REVISED MAY 2013
www.ti.com
Demonstration Board PCB Layout
14
Figure 38. Top Silkscreen
Figure 39. Top Layer
Figure 40. Midlayer 1
Figure 41. Midlayer 2
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Product Folder Links: LM48860
LM48860
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SNAS398D – JANUARY 2008 – REVISED MAY 2013
Figure 42. Bottom Layer
Figure 43. Bottom Silkscreen
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15
LM48860
SNAS398D – JANUARY 2008 – REVISED MAY 2013
www.ti.com
REVISION HISTORY
16
Rev
Date
1.0
01/16/08
Initial release.
1.01
01/29/08
Text edits.
1.02
02/14/08
Fixed typos (x-axis) on few curves.
1.03
10/17/08
Edited the X1 and X2 limits under the
Physical Dimension section.
D
05/02/2013
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Description
Changed layout of National Data Sheet to TI
format.
Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LM48860
PACKAGE OPTION ADDENDUM
www.ti.com
2-May-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LM48860TL/NOPB
ACTIVE
DSBGA
YZR
12
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 84
GJ7
LM48860TLX/NOPB
ACTIVE
DSBGA
YZR
12
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
-40 to 84
GJ7
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
LM48860TL/NOPB
DSBGA
YZR
12
250
178.0
8.4
LM48860TLX/NOPB
DSBGA
YZR
12
3000
178.0
8.4
Pack Materials-Page 1
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1.68
2.13
0.76
4.0
8.0
Q1
1.68
2.13
0.76
4.0
8.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-May-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM48860TL/NOPB
DSBGA
YZR
LM48860TLX/NOPB
DSBGA
YZR
12
250
210.0
185.0
35.0
12
3000
210.0
185.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
YZR0012xxx
0.600±0.075
D
E
TLA12XXX (Rev C)
D: Max = 2.014 mm, Min =1.954 mm
E: Max = 1.514 mm, Min =1.454 mm
4215049/A
NOTES:
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
www.ti.com
12/12
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