AD ADG419 Lc2mos precision mini-dip analog switch Datasheet

LC2MOS Precision
Mini-DIP Analog Switch
ADG419
FEATURES
FUNCTIONAL BLOCK DIAGRAM
44 V supply maximum ratings
VSS to VDD analog signal range
Low on resistance: <35 Ω
Ultralow power dissipation: < 35 μW
Fast transition time: 160 ns maximum
Break-before-make switching action
Plug-in replacement for DG419
D
S2
S1
IN
SWITCH SHOWN FOR A
LOGIC 1 INPUT
07850-001
ADG419
Figure 1.
APPLICATIONS
Precision test equipment
Precision instrumentation
Battery-powered systems
Sample hold systems
GENERAL DESCRIPTION
The ADG419 is a monolithic CMOS SPDT switch. This switch
is designed on an enhanced LC2MOS process that provides low
power dissipation yet gives high switching speed, low on resistance,
and low leakage currents.
The on resistance profile of the ADG419 is very flat over the full
analog input range, ensuring excellent linearity and low distortion.
The part also exhibits high switching speed and high signal
bandwidth. CMOS construction ensures ultralow power
dissipation, making the parts ideally suited for portable and
battery-powered instruments.
Each switch of the ADG419 conducts equally well in both
directions when on and has an input signal range that extends
to the supplies. In the off condition, signal levels up to the
supplies are blocked. The ADG419 exhibits break-before-make
switching action.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
Extended Signal Range.
The ADG419 is fabricated on an enhanced LC2MOS
process, giving an increased signal range that extends to
the supply rails.
Ultralow Power Dissipation.
Low RON.
Single-Supply Operation.
For applications where the analog signal is unipolar, the
ADG419 can be operated from a single rail power supply.
The part is fully specified with a single 12 V power supply
and remains functional with single supplies as low as 5 V.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
ADG419
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
Applications ....................................................................................... 1
ESD Caution...................................................................................5
Functional Block Diagram .............................................................. 1
Pin Configuration and Function Descriptions..............................6
General Description ......................................................................... 1
Typical Performance Characteristics ..............................................7
Product Highlights ........................................................................... 1
Test Circuits ........................................................................................9
Revision History ............................................................................... 2
Terminology .................................................................................... 11
Specifications..................................................................................... 3
Outline Dimensions ....................................................................... 12
Dual Supply ................................................................................... 3
Ordering Guide .......................................................................... 13
Single Supply ................................................................................. 4
REVISION HISTORY
8/09—Rev. B to Rev. C
Updated Format .................................................................. Universal
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 13
Rev. B | Page 2 of 16
ADG419
SPECIFICATIONS
DUAL SUPPLY
VDD = 15 V ± 10%, VSS = −15 V ± 10%, VL = 5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter 1
ANALOG SWITCH
Analog Signal Range
RON
+25°C
B Version
−40°C to
−40°C to
+85°C
+125°C
VSS to VDD
25
35
45
45
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
±0.1
±0.25
±0.1
±5
Drain Off Leakage, ID (Off )
±0.75
±0.4
±0.75
±5
±30
±5
±30
2.4
0.8
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
DYNAMIC CHARACTERISTICS 2
tTRANSITION
Break-Before-Make Time Delay, tD
Off Isolation
Channel-to-Channel Crosstalk
CS (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
ISS
IL
1
2
T Version
−55°C to
+25°C +125°C
160
Test Conditions/Comments
Ω typ
Ω max
VD = ±12.5 V, IS = −10 mA
VDD = +13.5 V, VSS = −13.5 V
VDD = +16.5 V, VSS = −16.5 V
nA typ
VD = ±15.5 V, VS = ∓15.5 V;
see Figure 12
VSS to VDD
25
35
45
±0.1
±15
Unit
±0.25
±0.1
±15
±0.75
±0.4
±0.75
±30
nA max
nA typ
±30
nA max
nA typ
nA max
2.4
0.8
2.4
0.8
V min
V max
±0.005
±0.5
±0.005
±0.5
±0.005
±0.5
μA typ
μA max
200
200
200
ns max
RL = 300 Ω, CL = 35 pF; VS1 = ±10 V,
VS2 = ∓10 V; see Figure 14
RL = 300 Ω, CL = 35 pF;
VS1 = VS2 = ±10 V; see Figure 15
145
30
30
ns typ
5
80
90
6
55
5
80
70
6
55
ns min
dB typ
dB typ
pF typ
pF typ
0.0001
1
0.0001
1
0.0001
1
VD = ±15.5 V, VS = ∓15.5 V;
see Figure 12
2.5
2.5
2.5
2.5
2.5
2.5
0.0001
1
0.0001
1
0.0001
1
Temperature ranges are as follows: B Version: −40°C to +125°C; T Version: −55°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. B | Page 3 of 16
2.5
2.5
2.5
μA typ
μA max
μA typ
μA max
μA typ
μA max
VS = VD = ±15.5 V; see Figure 13
VIN = VINL or VINH
RL = 50 Ω, f = 1 MHz; see Figure 16
RL = 50 Ω, f = 1 MHz; see Figure 17
f = 1 MHz
f = 1 MHz
VDD = +16.5 V, VSS = −16.5 V
VIN = 0 V or 5 V
VL = 5.5 V
ADG419
SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, VL = 5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2.
Parameter 1
ANALOG SWITCH
Analog Signal Range
RON
+25°C
B Version
−40°C to −40°C to
+85°C
+125°C
0 to VDD
40
70
LEAKAGE CURRENT
Source OFF Leakage, IS (Off )
±0.1
±0.25
±0.1
±5
Drain OFF Leakage, ID (Off )
±0.75
±0.4
±0.75
±5
±30
±5
±30
2.4
0.8
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current
IINL or IINH
DYNAMIC CHARACTERISTICS 2
tTRANSITION
Break-Before-Make Time Delay, tD
Off Isolation
Channel-to-Channel Crosstalk
CS (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
IL
1
2
180
0 to VDD
40
60
Channel ON Leakage, ID, IS (On)
T Version
−55°C to
+25°C +125°C
70
±0.1
±15
Unit
V
Ω typ
Ω max
nA typ
±0.25
±0.1
±15
±0.75
±0.4
±0.75
±30
nA max
nA typ
VD = 3 V, 8.5 V, IS = −10 mA
VDD = 10.8 V
VDD = 13.2 V
VD = 12.2 V/1 V, VS = 1 V/12.2 V;
see Figure 12
VD = 12.2 V/1 V, VS = 1 V/12.2 V;
see Figure 12
±30
nA max
nA typ
nA max
2.4
0.8
2.4
0.8
V min
V max
±0.005
±0.5
±0.005
±0.5
±0.005
±0.5
μA typ
μA max
VIN = VINL or VINH
250
250
250
ns max
RL = 300 Ω, CL = 35 pF; VS1 = 0 V/8 V,
VS2 = 8 V/0 V; see Figure 14
RL = 300 Ω, CL = 35 pF;
VS1 = VS2 = 8 V; see Figure 15
RL = 50 Ω, f = 1 MHz; see Figure 16
RL = 50 Ω, f = 1 MHz; see Figure 17
f = 1 MHz
f = 1 MHz
VDD = 13.2 V
VIN = 0 V or 5 V
170
60
60
ns typ
80
90
13
65
80
70
13
65
dB typ
dB typ
pF typ
pF typ
0.0001
1
0.0001
1
Test Conditions/Comments
2.5
2.5
2.5
2.5
0.0001
1
0.0001
1
Temperature ranges are as follows: B Version: −40°C to +125°C; T Version: −55°C to +125°C.
Guaranteed by design, not subject to production test.
Rev. B | Page 4 of 16
2.5
2.5
μA typ
μA max
μA typ
μA max
VS = VD = 12.2 V/1 V; see Figure 13
VL = 5.5 V
ADG419
ABSOLUTE MAXIMUM RATINGS
TA= 25°C unless otherwise noted.
Table 3.
Parameter
VDD to VSS
VDD to GND
VSS to GND
VL to GND
Analog, Digital Inputs1
Continuous Current, S or D
Peak Current, S or D (Pulsed at 1 ms,
10% Duty-Cycle Maximum)
Operating Temperature Range
Industrial (B Version)
Extended (T Version)
Storage Temperature Range
Junction Temperature
CERDIP Package, Power Dissipation
θJA, Thermal Impedance
Lead Temperature, Soldering (10 sec)
PDIP Package, Power Dissipation
θJA, Thermal Impedance
Lead Temperature, Soldering (10 sec)
SOIC Package, Power Dissipation
θJA, Thermal Impedance
MSOP Package, Power Dissipation
θJA, Thermal Impedance
Lead Temperature, Soldering
Vapor Phase (60 sec)
Infrared (15 sec)
Rating
44 V
−0.3 V to +25 V
+0.3 V to −25 V
−0.3 V to VDD + 0.3 V
VSS − 2 V to VDD + 2 V
or 30 mA, whichever
occurs first
30 mA
100 mA
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
−40°C to +125°C
−55°C to +125°C
−65°C to +150°C
150°C
600 mW
110°C/W
300°C
400 mW
100°C/W
260°C
400 mW
155°C/W
315 mW
205°C/W
215°C
220°C
1
Overvoltages at IN, S or D is clamped by internal diodes. Limit current to the
maximum ratings given.
Rev. B | Page 5 of 16
ADG419
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
8
ADG419
S2
VSS
TOP VIEW
GND 3 (Not to Scale) 6 IN
VDD 4
5 VL
7
07850-002
D 1
S1 2
Figure 2. Pin Configuration
Table 4. Pin Function Description
Pin No.
1
2
3
4
5
6
7
Mnemonic
D
S1
GND
VDD
VL
IN
VSS
8
S2
Description
Drain terminal. May be an input or an output.
Source terminal. May be an input or an output.
Ground (0 V) reference.
Most positive power supply potential.
Logic power supply (5 V).
Logic control input.
Most negative power supply potential in dual-supply applications. In single-supply applications, it may be
connected to GND.
Source terminal. May be an input or an output.
Table 5. Truth Table
Logic
0
1
Switch 1
On
Off
Switch 2
Off
On
Rev. B | Page 6 of 16
ADG419
TYPICAL PERFORMANCE CHARACTERISTICS
50
100
TA = 25°C
TA = 25°C
VDD = +5V
VSS = –5V
40
30
60
VDD = +10V
VSS = –10V
RON (Ω)
20
VDD = +12V
VSS = –12V
VDD = 12V
VSS = 0V
40
20
VDD = +15V
VSS = –15V
–10
–5
0
5
10
15
VS, VD (V)
0
07850-003
0
–15
VDD = 15V
VSS = 0V
15
10
Figure 6. RON as a Function of VD (VS), Single-Supply Voltage
50
100
80
30
RON (Ω)
125°C
20
85°C
10
–5
0
5
10
15
VS, VD (V)
0.01
0
25°C
3
6
12
9
Figure 7. RON as a Function of VD (VS) for Different Temperatures
0.006
ID (ON)
VDD = +15V
VSS = –15V
TA = 25°C
85°C
VS, VD (V)
Figure 4. RON as a Function of VD (VS) for Different Temperatures
0.02
125°C
40
0
07850-004
–10
60
20
25°C
0
–15
VDD = 12V
VSS = 0V
VL = 5V
07850-007
VDD = +15V
VSS = –15V
VL = +5V
40
RON (Ω)
5
VS, VD (V)
Figure 3. RON as a Function of VD (VS), Dual-Supply Voltage
VDD = 12V
VSS = 0V
TA = 25°C
0.004
LEAKAGE CURRENT (nA)
IS (OFF)
0
ID (OFF)
–0.01
–0.02
ID (ON)
IS (OFF)
0.002
ID (OFF)
0
–0.002
–0.03
–15
–10
–5
0
5
10
VS, VD (V)
15
07850-005
LEAKAGE CURRENT (nA)
0
07850-006
10
VDD = 10V
VSS = 0V
Figure 5. Leakage Currents as a Function of VS (VD)
–0.004
0
2
4
6
8
10
VS, VD (V)
Figure 8. Leakage Currents as a Function of VS (VD)
Rev. B | Page 7 of 16
12
07850-008
RON (Ω)
VDD = 5V
VSS = 0V
80
ADG419
10mA
200
180
I+, I–
10µA
1µA
IL
SINGLE SUPPLY
VIN = 0V/+5V
140
120
10nA
1nA
100
160
DUAL SUPPLY
VIN = ±5V
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 9. Supply Current (ISUPPLY) vs. Input Switching Frequency
80
6
8
10
12
14
16
SUPPLY VOLTAGE (V)
Figure 10. Transition Time (tTRANSITION) vs. Power Supply Voltage
Rev. B | Page 8 of 16
07850-010
100nA
07850-009
ISUPPLY
100µA
tTRANSITION (ns)
1mA
220
VDD = +15V
VSS = –15V
VL = +5V
ADG419
TEST CIRCUITS
IDS
V1
S
A
07850-011
VS
RON = V1/IDS
ID (OFF)
D
S
A
VS
VD
+15V
+5V
VDD
VL
Figure 13. On Leakage
VS1
VS2
VIN
D
S2
VOUT
RL
300Ω
IN
50%
50%
0V
tTRANSITION
tTRANSITION
CL
35pF
90%
OUTPUT
GND
VSS
90%
07850-014
VIN
–15V
Figure 14. Transition Time, tTRANSITION
VS2
+5V
VDD
VL
S1
D
S2
RL
300Ω
IN
VIN
VOUT
GND
VSS
CL
35pF
3V
ADDRESS
DRIVE (VIN)
0V
tD
VOUT
0.9VO
tD
0.9VO
0.9VO
0.9VO
07850-015
VS1
+15V
–15V
Figure 15. Break-Before-Make Time Delay, tD
Rev. B | Page 9 of 16
A
VD
3V
S1
ID (ON)
VS
Figure 12. Off Leakage
Figure 11. On Resistance
D
07850-013
IS (OFF)
D
07850-012
S
ADG419
+15V
+5V
0.1µF
+15V
VDD
S1
+5V
0.1µF
0.1µF
VL
0.1µF
D
VDD
D
S
VOUT
VOUT
S2
RL
50Ω
RL
50Ω
IN
VIN
GND
GND
VSS
VSS
VIN
0.1µF
–15V
–15V
07850-016
0.1µF
CHANNEL-TO-CHANNEL CROSSTALK = 20 × log | VS/VOUT |
Figure 17. Crosstalk
Figure 16. Off Isolation
Rev. B | Page 10 of 16
07850-017
VS
50Ω
VS
VL
ADG419
TERMINOLOGY
VDD
Most positive power supply potential.
CS (Off)
Off switch source capacitance.
VSS
Most negative power supply potential in dual-supply applications.
In single-supply applications, it may be connected to GND.
CD, CS (On)
On switch capacitance.
VL
Logic power supply (5 V).
GND
Ground (0 V) reference.
S
Source terminal. May be an input or an output.
D
Drain terminal. May be an input or an output.
IN
Logic control input.
RON
Ohmic resistance between D and S.
tTRANSITION
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
tD
Off time or on time measured between the 90% points of both
switches when switching from one address state to the other.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
IS (Off)
Source leakage current with the switch off.
Crosstalk
A measure of unwanted signal that is coupled through from one
channel to another as a result of parasitic capacitance.
ID (Off)
Drain leakage current with the switch off.
Off Isolation
A measure of unwanted signal coupling through an off channel.
ID, IS (On)
Channel leakage current with the switch on.
IDD
Positive supply current.
VD (VS)
Analog voltage on terminals D, S.
ISS
Negative supply current.
Rev. B | Page 11 of 16
ADG419
OUTLINE DIMENSIONS
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
4
0.100 (2.54)
BSC
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 18. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
0.005 (0.13)
MIN
8
0.055 (1.40)
MAX
5
0.310 (7.87)
0.220 (5.59)
1
4
0.100 (2.54) BSC
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.070 (1.78)
0.030 (0.76)
SEATING
PLANE
15°
0°
0.015 (0.38)
0.008 (0.20)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 19. 8-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-8)
Dimensions shown in inches and (millimeters)
Rev. B | Page 12 of 16
070606-A
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
ADG419
3.20
3.00
2.80
8
3.20
3.00
2.80
5.15
4.90
4.65
5
1
4
PIN 1
0.65 BSC
0.95
0.85
0.75
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.80
0.60
0.40
8°
0°
0.23
0.08
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 20. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-A A
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
4.00 (0.1574)
3.80 (0.1497)
Figure 21. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
ADG419BN
ADG419BNZ 1
ADG419BR
ADG419BR-REEL
ADG419BR-REEL7
ADG419BRZ1
ADG419BRZ-REEL1
ADG419BRZ-REEL71
ADG419BRM
ADG419BRM-REEL
ADG419BRM-REEL7
ADG419BRMZ1
ADG419BRMZ-REEL1
ADG419BRMZ-REEL71
ADG419TQ
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−55°C to +125°C
Package Description
8-Lead Plastic Dual In-Line Package [PDIP]
8-Lead Plastic Dual In-Line Package [PDIP]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Ceramic Dual In-Line Package [CERDIP]
Z = RoHS Compliant Part, # denotes that RoHS compliant part is top or bottom marked.
Rev. B | Page 13 of 16
Package Option
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
RM-8
RM-8
RM-8
Q-8
Branding
SBB
SBB
SBB
SBB#
SBB#
SBB#
ADG419
NOTES
Rev. B | Page 14 of 16
ADG419
NOTES
Rev. B | Page 15 of 16
ADG419
NOTES
©2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D07850-0-8/09(B)
Rev. B | Page 16 of 16