MCP73861/2/3/4
Advanced Single or Dual Cell, Fully Integrated Li-Ion /
Li-Polymer Charge Management Controllers
Features
Description
• Linear Charge Management Controllers
- Integrated Pass Transistor
- Integrated Current Sense
- Reverse-Blocking Protection
• High-Accuracy Preset Voltage Regulation: + 0.5%
• Four Selectable Voltage Regulation Options:
- 4.1V, 4.2V – MCP73861/3
- 8.2V, 8.4V – MCP73862/4
• Programmable Charge Current: 1.2A Maximum
• Programmable Safety Charge Timers
• Preconditioning of Deeply Depleted Cells
• Automatic End-of-Charge Control
• Optional Continuous Cell Temperature Monitoring
• Charge Status Output for Direct LED Drive
• Fault Output for Direct LED Drive
• Automatic Power-Down
• Thermal Regulation
• Temperature Range: -40°C to +85°C
• Packaging: 16-Pin, 4 x 4 QFN
16-Pin SOIC
The MCP7386X family of devices are highly advanced
linear charge management controllers for use in spacelimited, cost-sensitive applications. The devices
combine high-accuracy, constant voltage and current
regulation, cell preconditioning, cell temperature
monitoring, advanced safety timers, automatic charge
termination, internal current sensing, reverse-blocking
protection, charge status and fault indication in either a
space-saving 16-pin, 4 x 4 QFN or 16-pin SOIC
package. The MCP7386X provides a complete, fullyfunctional, stand-alone charge management solution
with a minimum number of external components.
Applications
The only difference between the MCP73861/2 and
MCP73863/4, respectively, is the function of the charge
status output (STAT1) when a charge cycle has been
completed. The MCP73861/2 flash the output, while
the MCP73863/4 turn the output off. Refer to
Section 5.2.1 “Charge Status Outputs (STAT1,
STAT2)”.
•
•
•
•
•
•
•
Lithium-Ion/Lithium-Polymer Battery Chargers
Personal Data Assistants (PDAs)
Cellular Telephones
Hand-Held Instruments
Cradle Chargers
Digital Cameras
MP3 Players
The MCP73861/3 is intended for applications utilizing
single-cell Lithium-Ion or Lithium-Polymer battery
packs, while the MCP73862/4 is intended for dual
series cell Lithium-Ion or Lithium-Polymer battery
packs. The MCP73861/3 have two selectable voltageregulation options available (4.1V and 4.2V), for use
with either coke or graphite anodes and operate with an
input voltage range of 4.5V to 12V. The MCP73862/4
have two selectable voltage-regulation options
available (8.2V and 8.4V), for use with coke or graphite
anodes, and operate with an input voltage range of
8.7V to 12V.
The MCP7386X family of devices are fully specified
over the ambient temperature range of -40°C to +85°C.
16-Pin SOIC
VSS2
EN
STAT2
16-Pin QFN
STAT1
Package Types
16 15 14 13
12 VBAT3
VSET 1
VDD2 2
11 VBAT2
EP
17
VDD2 3
10 VBAT1
9 VSS3
© 2008 Microchip Technology Inc.
7
THERM
PROG
6
THREF
5
16 EN
STAT1 2
15 VSS2
VSET 3
14 VBAT3
VDD1 4
13 VBAT2
VDD2 5
12 VBAT1
VSS1 6
8
PROG 7
TIMER
VSS1 4
STAT2 1
THREF 8
11 VSS3
10 TIMER
9 THERM
DS21893D-page 1
MCP73861/2/3/4
Typical Application
1.2A Lithium-Ion Battery Charger
2, 3
5V
4.7µF
1
14
16
15
5
VBAT3 12
10, 11
V
VDD
VSET
4.7 µF
BAT
THREF 6
EN
6.19 kΩ
STAT1 THERM 7
7.32 kΩ
STAT2 TIMER 8
0.1
4, 9, 13
µF
VSS
PROG
+ Single
Lithium-Ion
– Cell
Note: Pin numbers shown are for QFN
package. Please refer to Section 6.0
“Applications” for details.
MCP73861/3
Functional Block Diagram
Direction
Control
VDD1
VBAT1
VDD2
VBAT2
VDD
G = 0.001
4 kΩ
VREF
PROG
90
kΩ
Charge Current
Control Amplifier
+
10 kΩ
+
–
10 kΩ
IREG/12
UVLO
COMPARATOR
VREF
Precondition
Control
Precondition
Comp.
Constant-Voltage/
Recharge Comp.
VUVLO
–
+
EN
Charge_OK
Precon
VBAT3
Power-On
Delay
600 kΩ
(1.65 MΩ )
–
+
–
–
110 k Ω
Charge
Termination
Comparator
+
11 kΩ
VREF
Voltage Control
Amplifier
–
+
1 kΩ
148.42 kΩ Values in ( )
reflect the
MCP73862/4
devices
1.58 kΩ
VREF
300.04 kΩ
Bias and
Reference
Generator
VUVLO
VREF (1.2V)
VSET
10.3 kΩ
(8.58 kΩ)
THREF
100 kΩ
+
–
THERM
50 kΩ
+
–
50 kΩ
TIMER
DS21893D-page 2
Temperature
Comparators
VSS1
VSS2
VSS3
STAT1
Drv Stat 1
Control,
IREG/12 Charge
Charge Timers
And Status Logic
Drv Stat 2
Oscillator
STAT2
Charge_OK
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
1.0
ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
Absolute Maximum Ratings†
VDDN ..............................................................................13.5V
VBATN, VSET, EN, STAT1, STAT2 w.r.t. VSS
.................................................................-0.3 to (VDD + 0.3)V
PROG, THREF, THERM, TIMER w.r.t. VSS ..............-0.3 to 6V
Maximum Junction Temperature, TJ ............ Internally Limited
Storage temperature .....................................-65°C to +150°C
ESD protection on all pins:
Human Body Model (1.5 kΩ in series with 100 pF)....≥ 4 kV
Machine Model (200 pF, No series resistance) ...........300V
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD= [VREG(typ.) + 0.3V] to 12V,
TA = -40°C to +85°C. Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]
Parameters
Sym
Min
Typ
Max
Unit
s
VDD
4.5
—
12
V
MCP73861/3
8.7
—
12
V
MCP73862/4
—
0.17
4
µA
Disabled
—
0.53
4
mA
Operating
4.25
4.5
4.65
V
MCP73861/3
8.45
8.8
9.05
V
MCP73862/4
4.20
4.4
4.55
V
MCP73861/3
8.40
8.7
8.95
V
MCP73862/4
Conditions
Supply Input
Supply Voltage
Supply Current
UVLO Start Threshold
ISS
VSTART
VDD Low-to-High
UVLO Stop Threshold
VSTOP
VDD High-to-Low
Voltage Regulation (Constant-Voltage Mode)
Regulated Output Voltage
VREG
4.079
4.1
4.121
V
MCP73861/3, VSET = VSS
4.179
4.2
4.221
V
MCP73861/3,VSET = VDD
8.159
8.2
8.241
V
MCP73862/4, VSET = VSS
8.358
8.4
8.442
V
MCP73862/4, VSET = VDD
VDD = [VREG(typ.) + 1V],
IOUT = 10 mA
TA = -5°C to +55°C
Line Regulation
|(ΔVBAT/
VBAT)| /ΔVDD
—
0.025
0.25
Load Regulation
|ΔVBAT/VBAT|
—
0.01
0.25
%
IOUT = 10 mA to 150 mA
VDD = [VREG(typ.)+1V]
PSRR
—
60
—
dB
IOUT = 10 mA, 10 Hz to 1 kHz
—
42
—
dB
IOUT = 10 mA, 10 Hz to
10 kHz
—
28
—
dB
IOUT = 10 mA, 10 Hz to 1 MHz
—
0.23
1
µA
VDD < VBAT = VREG(typ.)
Supply Ripple Attenuation
Output Reverse-Leakage
Current
IDISCHARGE
%/V VDD = [VREG(typ.)+1V] to 12V
IOUT = 10 mA
Current Regulation (Fast Charge Constant-Current Mode)
Fast Charge Current
Regulation
IREG
85
100
115
mA
PROG = OPEN
1020
1200
1380
mA
PROG = VSS
425
500
575
mA
PROG = 1.6 kΩ
TA= -5°C to +55°C
© 2008 Microchip Technology Inc.
DS21893D-page 3
MCP73861/2/3/4
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD= [VREG(typ.) + 0.3V] to 12V,
TA = -40°C to +85°C. Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]
Parameters
Sym
Min
Typ
Max
Unit
s
Conditions
Preconditioning Current Regulation (Trickle Charge Constant-Current Mode)
Precondition Current
Regulation
IPREG
5
10
15
mA
60
120
180
mA
PROG = OPEN
PROG = VSS
25
50
75
mA
PROG = 1.6 kΩ
2.70
2.80
2.90
V
MCP73861/3, VSET = VSS
2.75
2.85
2.95
V
MCP73861/3, VSET = VDD
5.40
5.60
5.80
V
MCP73862/4, VSET = VSS
5.50
5.70
5.90
V
MCP73862/4, VSET = VDD
TA=-5°C to +55°C
Precondition Threshold
Voltage
VPTH
VBAT Low-to-High
Charge Termination
Charge Termination
Current
ITERM
6
8.5
11
mA
PROG = OPEN
70
90
120
mA
PROG = VSS
32
41
50
mA
PROG = 1.6 kΩ
TA=-5°C to +55°C
Automatic Recharge
Recharge Threshold
Voltage
VRTH
VREG 300 mV
VREG 200 mV
VREG -100 mV
V
MCP73861/3
VREG 600 mV
VREG 400 mV
VREG 200 mV
V
MCP73862/4
VBAT High-to-Low
Thermistor Reference
Thermistor Reference
Output Voltage
VTHREF
2.475
2.55
2.625
V
TA = 25°C,
VDD = VREG(typ.) + 1V,
ITHREF = 0 mA
Thermistor Reference
Source Current
ITHREF
200
—
—
µA
Thermistor Reference Line
Regulation
|(ΔVTHREF/
VTHREF)|/
ΔVDD
—
0.1
0.25
Thermistor Reference Load
Regulation
|ΔVTHREF/
VTHREF|
0.01
0.10
%/V VDD = [VREG(typ.) + 1V] to
12V
%
ITHREF = 0 mA to 0.20 mA
Thermistor Comparator
VT1
1.18
1.25
1.32
V
VT1HYS
—
-50
—
mV
VT2
0.59
0.62
0.66
V
VT2HYS
—
80
—
mV
IBIAS
—
—
2
µA
8
12
mA
Upper Trip Threshold
Upper Trip Point Hysteresis
Lower Trip Threshold
Lower Trip Point Hysteresis
Input Bias Current
Status Indicator – STAT1, STAT2
Sink Current
ISINK
4
Low Output Voltage
VOL
—
200
400
mV
ISINK = 1 mA
Input Leakage Current
ILK
—
0.01
1
µA
ISINK = 0 mA, VSTAT1,2 = 12V
Input High Voltage Level
VIH
1.4
—
—
V
Input Low Voltage Level
VIL
—
—
0.8
V
Input Leakage Current
ILK
—
0.01
1
µA
Enable Input
DS21893D-page 4
VENABLE = 12V
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD= [VREG(typ.) + 0.3V] to 12V,
TA = -40°C to +85°C. Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]
Sym
Min
Typ
Max
Unit
s
Die Temperature
TSD
—
155
—
°C
Die Temperature
Hysteresis
TSDHYS
—
10
—
°C
Parameters
Conditions
Thermal Shutdown
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD = [VREG (typ.) + 0.3V] to 12V,
TA = -40°C to +85°C. Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]
Parameters
Sym
Min
Typ
Max
Units
tSTART
—
—
5
ms
VDD Low-to-High
tDELAY
—
—
1
ms
VBAT < VPTH to VBAT > VPTH
Current Rise Time Out of
Preconditioning
tRISE
—
—
1
ms
IOUT Rising to 90% of IREG
Fast Charge Safety Timer
Period
tFAST
1.1
1.5
1.9
Hours
CTIMER = 0.1 µF
tPRECON
45
60
75
Minutes
CTIMER = 0.1 µF
tTERM
2.2
3
3.8
Hours
CTIMER = 0.1 µF
Status Output turn-off
tOFF
—
—
200
µs
ISINK = 1 mA to 0 mA
Status Output turn-on
tON
—
—
200
µs
ISINK = 0 mA to 1 mA
UVLO Start Delay
Conditions
Current Regulation
Transition Time Out of
Preconditioning
Preconditioning Current Regulation
Preconditioning Charge Safety
Timer Period
Charge Termination
Elapsed Time Termination
Period
Status Indicators
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD = [VREG (typ.) + 0.3V] to 12V.
Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]
Parameters
Sym
Min
Typ
Max
Units
Conditions
Specified Temperature Range
TA
-40
—
+85
°C
Operating Temperature Range
TJ
-40
—
+125
°C
Storage Temperature Range
TA
-65
—
+150
°C
Thermal Resistance, 16-lead,
4 mm x 4 mm QFN
θJA
—
47
—
°C/W
4-Layer JC51-7 Standard Board,
Natural Convection
Thermal Resistance, 16-lead SOIC
θJA
—
86.1
—
°C/W
4-Layer JC51-7 Standard Board,
Natural Convection
Temperature Ranges
Thermal Package Resistances
© 2008 Microchip Technology Inc.
DS21893D-page 5
MCP73861/2/3/4
NOTES:
DS21893D-page 6
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
4.207
MCP73861/3
VSET = VDD
VDD = 5.2V
4.205
4.203
4.201
4.199
4.197
4.195
4.193
10
100
Battery Regulation Voltage (V)
Battery Regulation Voltage (V)
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
4.207
MCP73861/3
VSET = VDD
IOUT = 10 mA
4.205
4.203
4.201
4.199
4.197
4.195
4.193
4.5
1000
6.0
MCP73861/3
VSET = VDD
IOUT = 1000 mA
4.20
4.10
4.00
3.90
1.60
12.0
MCP73861/3
VSET = VDD
IOUT = 1000 mA
1.40
1.20
1.00
0.80
0.60
0.40
3.80
4.5
6.0
7.5
9.0
10.5
4.5
12.0
6.0
FIGURE 2-2:
Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
4.205
4.203
9.0
10.5
12.0
FIGURE 2-5:
Supply Current (ISS) vs.
Supply Voltage (VDD).
1.00
MCP73861/3
VSET = VDD
IOUT = 10 mA
Supply Current (mA)
4.207
7.5
Supply Voltage (V)
Supply Voltage (V)
Battery Regulation Voltage (V)
10.5
FIGURE 2-4:
Supply Current (ISS) vs.
Charge Current (IOUT).
Supply Current (mA)
Battery Regulation Voltage (V)
FIGURE 2-1:
Battery Regulation Voltage
(VBAT) vs. Charge Current (IOUT).
4.30
9.0
Supply Voltage (V)
Charge Current (mA)
4.40
7.5
4.201
4.199
4.197
4.195
MCP73861/3
VSET = VDD
IOUT = 10 mA
0.90
0.80
0.70
0.60
0.50
0.40
4.193
4.5
6.0
7.5
9.0
10.5
12.0
Supply Voltage (V)
FIGURE 2-3:
Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
© 2008 Microchip Technology Inc.
4.5
6.0
7.5
9.0
10.5
12.0
Supply Voltage (V)
FIGURE 2-6:
Supply Current (ISS) vs.
Supply Voltage (VDD).
DS21893D-page 7
MCP73861/2/3/4
Typical Performance Curves (Continued)
+85°C
0.30
+25°C
0.25
0.20
-40°C
0.15
0.10
0.05
MCP73861/3
VSET = VDD
IOUT = 10 mA
1.40
1.20
1.00
0.80
0.60
100 125 150 175 200
Therm. Bias Current (µA)
FIGURE 2-9:
Thermistor Reference
Voltage (VTHREF) vs. Thermistor Bias Current
(ITHREF).
DS21893D-page 8
80
70
60
50
40
80
70
60
2.500
80
75
70
50
60
25
50
2.500
2.505
40
2.505
2.510
-20
2.510
2.515
MCP73861/3
VSET = VDD
ITHREF = 100 µA
-30
2.515
2.520
-40
MCP73861/3
VSET = VDD
0
FIGURE 2-11:
Battery Regulation Voltage
(VBAT) vs. Ambient Temperature (TA).
Therm. Reference Voltage (V)
Therm. Reference Voltage (V)
2.520
50
Ambient Temperature (°C)
Supply Voltage (V)
FIGURE 2-8:
Thermistor Reference
Voltage (VTHREF) vs. Supply Voltage (VDD).
40
4.193
12.0
30
10.5
20
9.0
4.195
30
7.5
4.197
10
6.0
4.199
20
2.500
4.201
10
2.510
4.203
-20
2.520
MCP73861/3
VSET = VDD
IOUT = 10 mA
4.205
-30
2.530
4.207
-40
MCP73861/3
VSET = VDD
ITHREF = 100 µA
4.5
FIGURE 2-10:
Supply Current (ISS) vs.
Ambient Temperature (TA).
Battery Regulation Voltage (V)
Therm. Reference Voltage (V)
FIGURE 2-7:
Output Leakage Current
(IDISCHARGE) vs. Battery Regulation Voltage
(VBAT).
2.540
30
Ambient Temperature (°C)
Battery Regulation Voltage (V)
2.550
20
4.4
0
4.0
10
3.6
0
3.2
0
2.8
-10
2.4
-40
2.0
-10
0.40
0.00
-10
0.35
1.60
MCP73861/3
VSET = VDD
VDD = VSS
-20
0.40
-30
0.45
Supply Current (mA)
Output Leakage Current (µA)
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
Ambient Temperature (°C)
FIGURE 2-12:
Thermistor Reference
Voltage (VTHREF) vs. Ambient Temperature (TA).
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
Typical Performance Curves (Continued)
8.407
1.00
MCP73862/4
VSET = VDD
VDD = 9.4V
8.405
8.403
Supply Current (mA)
Battery Regulation Voltage (V)
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
8.401
8.399
8.397
8.395
0.90
MCP73862/4
VSET = VDD
VDD = 9.4V
0.80
0.70
0.60
0.50
0.40
8.393
10
100
10
1000
100
Charge Current (mA)
Charge Current (mA)
FIGURE 2-16:
Supply Current (ISS) vs.
Charge Current (IOUT).
8.407
1.60
8.405
1.40
8.401
Supply Current (mA)
Battery Regulation Voltage (V)
FIGURE 2-13:
Battery Regulation Voltage
(VBAT) vs. Charge Currentt(IOUT).
8.403
MCP73862/4
VSET = VDD
IOUT = 1000 mA
8.399
8.397
8.395
8.393
10.0
MCP73862/4
VSET = VDD
IOUT = 1000 mA
1.20
1.00
0.80
0.60
0.40
10.4
10.8
11.2
11.6
9.0
12.0
9.5
10.5
11.0
11.5
12.0
FIGURE 2-17:
Supply Current (ISS) vs.
Supply Voltage (VDD).
1.00
MCP73862/4
VSET = VDD
IOUT = 10 mA
Supply Current (mA)
Battery Regulation Voltage (V)
FIGURE 2-14:
Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
8.410
10.0
Supply Voltage (V)
Supply Voltage (V)
8.412
1000
8.408
8.406
8.404
8.402
8.400
0.90
MCP73862/4
VSET = VDD
IOUT = 10 mA
0.80
0.70
0.60
0.50
0.40
8.398
9.0
9.5
10.0
10.5
11.0
11.5
12.0
Supply Voltage (V)
FIGURE 2-15:
Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
© 2008 Microchip Technology Inc.
9.0
9.5
10.0
10.5
11.0
11.5
12.0
Supply Voltage (V)
FIGURE 2-18:
Supply Current (ISS) vs.
Supply Voltage (VDD).
DS21893D-page 9
MCP73861/2/3/4
Typical Performance Curves (Continued)
0.45
1.60
MCP73862/4
VSET = VDD
VDD = VSS
0.40
0.35
+85°C
0.30
+25°C
0.25
0.20
-40°C
0.15
0.10
0.05
Supply Current (mA)
MCP73862/4
VSET = VDD
IOUT = 10 mA
1.40
1.20
1.00
0.80
0.60
75
100 125 150 175 200
Thermistor Bias Current (µA)
FIGURE 2-21:
Thermistor Reference
Voltage (VTHREF) vs. Thermistor Bias Current
(ITHREF).
DS21893D-page 10
80
70
60
50
40
80
70
60
50
40
2.530
80
50
70
25
2.534
60
0
2.538
50
2.540
2.542
40
2.542
2.546
-20
2.544
MCP73862/4
VSET = VDD
ITHREF = 100 µA
-30
2.546
2.550
-40
MCP73862/4
VSET = VDD
2.548
FIGURE 2-23:
Battery Regulation Voltage
(VBAT) vs. Ambient Temperature (TA).
Therm. Reference Voltage (V)
Therm. Reference Voltage (V)
2.550
30
Ambient Temperature (°C)
Supply Voltage (V)
FIGURE 2-20:
Thermistor Reference
Voltage (VTHREF) vs. Supply Voltage (VDD).
30
8.386
12.0
30
11.5
20
11.0
8.390
10
10.5
8.394
20
10.0
8.398
10
9.5
8.402
0
2.530
8.406
0
2.540
MCP73862/4
VSET = VDD
IOUT = 10 mA
8.410
-30
2.550
8.414
-40
MCP73862/4
VSET = VDD
ITHREF = 100 µA
9.0
FIGURE 2-22:
Supply Current (ISS) vs.
Ambient Temperature (TA).
Battery Regulation Voltage (V)
Therm. Reference Voltage (V)
FIGURE 2-19:
Output Leakage Current
(IDISCHARGE) vs. Battery Regulation Voltage
(VBAT).
2.560
20
Ambient Temperature (°C)
Battery Regulation Voltage (V)
2.570
0
8.8
10
8.0
-10
7.2
-10
6.4
-10
5.6
-20
4.8
-20
4.0
-30
0.40
0.00
-40
Output Leakage Current (µA)
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
Ambient Temperature (°C)
FIGURE 2-24:
Thermistor Reference
Voltage (VTHREF) vs. Ambient Temperature (TA).
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
Typical Performance Curves (Continued)
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
VDD
VDD
VBAT
VBAT
MCP73861
VDD Stepped from 5.2V to 6.2V
IOUT = 500 mA
COUT = 10 µF, X7R, Ceramic
MCP73861
VDD Stepped from 5.2V to 6.2V
IOUT = 10 mA
COUT = 10 µF, X7R, Ceramic
FIGURE 2-25:
Line Transient Response.
MCP73861
VDD 5.2V
COUT = 10 µF, X7R, Ceramic
FIGURE 2-28:
MCP73861
VDD 5.2V
COUT = 10 µF, X7R, Ceramic
VBAT
100 mA
Line Transient Response.
IOUT
500 mA
10 mA
FIGURE 2-26:
Attenuation (dB)
-20
-30
Load Transient Response.
FIGURE 2-29:
-10
-40
-50
-60
-20
-30
-40
MCP73861
VDD = 5.2V
VAC = 100 mVp-p
IOUT = 100 mA
COUT = 10 μF, X7R, Ceramic
-50
-60
-70
-70
0.1
1
10
100
1000
-80
0.01
Power Supply Ripple
© 2008 Microchip Technology Inc.
0.1
1
10
100
1000
Frequency (kHz)
Frequency (kHz)
FIGURE 2-27:
Rejection.
Load Transient Response.
0
MCP73861
VDD = 5.2V
VAC = 100 mVp-p
IOUT = 10 mA
COUT = 10 μF, Ceramic
-80
0.01
IOUT
10 mA
Attenuation (dB)
0
-10
VBAT
FIGURE 2-30:
Rejection.
Power Supply Ripple
DS21893D-page 11
MCP73861/2/3/4
Typical Performance Curves (Continued)
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
800
600
400
200
499
497
495
FIGURE 2-31:
Charge Current (IOUT) vs.
Programming Resistor (RPROG).
80
70
60
50
40
30
20
0
0
10
536
-10
1.6k
-20
493
4.8k
Programming Resistor ()
DS21893D-page 12
501
-30
0
OPEN
MCP73861/2/3/4
VSET = VDD
RPROG = 1.6 k
503
-40
1000
505
MCP73861/2/3/4
VSET = VDD
Charge Current (μA)
Charge Current (mA)
1200
Ambient Temperature (°C)
FIGURE 2-32:
Charge Current (IOUT) vs.
Ambient Temperature (TA).
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
3.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 3.1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP73861/2/3/4
Symbol
Function
QFN
SOIC
1
3
VSET
Voltage Regulation Selection
2
4
VDD1
Battery Management Input Supply
3
5
VDD2
Battery Management Input Supply
4
6
VSS1
Battery Management 0V Reference
5
7
PROG
6
8
THREF
Cell Temperature Sensor Bias
7
9
THERM
Cell Temperature Sensor Input
8
10
TIMER
Timer Set
9
11
VSS3
Battery Management 0V Reference
10
12
VBAT1
Battery Charge Control Output
3.1
Current Regulation Set
11
13
VBAT2
Battery Charge Control Output
12
14
VBAT3
Battery Voltage Sense
13
15
VSS2
Battery Management 0V Reference
14
16
EN
15
1
STAT2
Fault Status Output
16
2
STAT1
Charge Status Output
17
–
EP
Logic Enable
Exposed Pad; Battery Management 0V Reference
Voltage Regulation Selection
(VSET)
MCP73861/3: Connect VSET to VSS for 4.1V regulation
voltage, connect to VDD for 4.2V regulation voltage.
MCP73862/4: Connect VSET to VSS for 8.2V regulation
voltage, connect to VDD for 8.4V regulation voltage.
3.2
Battery Management Input Supply
(VDD2, VDD1)
A supply voltage of [VREG (typ.) + 0.3V] to 12V is
recommended. Bypass to VSS with a minimum of
4.7 µF.
3.3
Battery Management 0V Reference
(VSS1, VSS2, VSS3)
3.5
Cell Temperature Sensor Bias
(THREF)
THREF is a voltage reference to bias external
thermistor for continuous cell temperature monitoring
and prequalification.
3.6
Cell Temperature Sensor Input
(THERM)
THERM is an input for an external thermistor for continuous cell-temperature monitoring and prequalification.
Connect to THREF/3 to disable temperature sensing.
3.7
Timer Set
All safety timers are scaled by CTIMER/0.1 µF.
Connect to negative terminal of battery and input
supply.
3.8
3.4
Connect to positive terminal of battery. Drain terminal
of internal P-channel MOSFET pass transistor. Bypass
to VSS with a minimum of 4.7 µF to ensure loop stability
when the battery is disconnected.
Current Regulation Set (PROG)
Preconditioning, fast and termination currents are
scaled by placing a resistor from PROG to VSS.
© 2008 Microchip Technology Inc.
Battery Charge Control Output
(VBAT1, VBAT2)
DS21893D-page 13
MCP73861/2/3/4
3.9
Battery Voltage Sense (VBAT3)
VBAT3 is a voltage sense input. Connect to positive
terminal of battery. A precision internal resistor divider
regulates the final voltage on this pin to VREG.
3.10
Logic Enable (EN)
EN is an input to force charge termination, initiate
charge, clear faults or disable automatic recharge.
3.11
Fault Status Output (STAT2)
STAT2 is a current-limited, open-drain drive for direct
connection to a LED for charge status indication.
Alternatively, a pull-up resistor can be applied for
interfacing to a host microcontroller.
DS21893D-page 14
3.12
Charge Status Output (STAT1)
STAT1 is a current-limited, open-drain drive for direct
connection to a LED for charge status indication.
Alternatively, a pull-up resistor can be applied for
interfacing to a host microcontroller.
3.13
Exposed Pad (EP)
There is an internal electrical connection between the
exposed thermal pad and VSS. The EP must be
connected to the same potential as the VSS pin on the
Printed Circuit Board (PCB).
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
DEVICE OVERVIEW
The MCP7386X family of devices are highly advanced
linear charge management controllers. Refer to the
functional block diagram. Figure 4-2 depicts the
operational flow algorithm from charge initiation to
completion and automatic recharge.
4.1
Charge Qualification and
Preconditioning
Upon insertion of a battery, or application of an external
supply, the MCP7386X family of devices automatically
performs a series of safety checks to qualify the
charge. The input source voltage must be above the
Undervoltage Lockout (UVLO) threshold, the enable
pin must be above the logic-high level and the cell
temperature must be within the upper and lower
thresholds. The qualification parameters are
continuously monitored. Deviation beyond the limits
automatically suspends or terminates the charge cycle.
The input voltage must deviate below the UVLO stop
threshold for at least one clock period to be considered
valid.
Once the qualification parameters have been met, the
MCP7386X initiates a charge cycle. The charge status
output is pulled low throughout the charge cycle (see
Table 5-1 for charge status outputs). If the battery
voltage is below the preconditioning threshold (VPTH),
the MCP7386X preconditions the battery with a tricklecharge. The preconditioning current is set to approximately 10% of the fast charge regulation current. The
preconditioning trickle-charge safely replenishes
deeply depleted cells and minimizes heat dissipation
during the initial charge cycle. If the battery voltage has
not exceeded the preconditioning threshold before the
preconditioning timer has expired, a fault is indicated
and the charge cycle is terminated.
4.2
4.4
Constant Voltage Regulation
When the battery voltage reaches the regulation
voltage (VREG), constant voltage regulation begins.
The MCP7386X monitors the battery voltage at the
VBAT pin. This input is tied directly to the positive
terminal of the battery. The MCP7386X selects the
voltage regulation value based on the state of VSET.
© 2008 Microchip Technology Inc.
Charge Cycle Completion and
Automatic Re-Charge
The MCP7386X monitors the charging current during
the Constant-voltage regulation mode. The charge
cycle is considered complete when the charge current
has diminished below approximately 8% of the
regulation current (IREG), or the elapsed timer has
expired.
The MCP7386X automatically begins a new charge
cycle when the battery voltage falls below the recharge
threshold (VRTH), assuming all the qualification
parameters are met.
4.5
Thermal Regulation
The MCP7386X family limits the charge current based
on the die temperature. Thermal regulation optimizes
the charge cycle time while maintaining device reliability. If thermal regulation is entered, the timer is automatically slowed down to ensure that a charge cycle will
not terminate prematurely. Figure 4-1 depicts the
thermal regulation profile.
1400
Constant Current Regulation –
Fast Charge
Preconditioning ends, and fast charging begins, when
the battery voltage exceeds the preconditioning threshold. Fast charge regulates to a constant current (IREG),
which is set via an external resistor connected to the
PROG pin. Fast charge continues until the battery
voltage reaches the regulation voltage (VREG), or the
fast charge timer expires; in which case, a fault is
indicated and the charge cycle is terminated.
4.3
With VSET tied to VSS, the MCP73861/3 and
MCP73862/4 regulate to 4.1V and 8.2V, respectively.
With VSET tied to VDD, the MCP73861/3 and
MCP73862/4 regulate to 4.2V and 8.4V, respectively.
Maximum Charge Current (mA)
4.0
1200
1000
800
Maximum
Minimum
600
400
200
0
0
20
40
60
80
100
120
140
Die Temperature (° C)
FIGURE 4-1:
Typical Maximum Charge
Current vs. Die Temperature.
4.6
Thermal Shutdown
The MCP7386X family suspends charge if the die
temperature exceeds 155°C. Charging will resume
when the die temperature has cooled by approximately
10°C. The thermal shutdown is a secondary safety
feature in the event that there is a failure within the
thermal regulation circuitry.
DS21893D-page 15
FIGURE 4-2:
DS21893D-page 16
Yes
Yes
Yes
VDD < VUVLO
or EN Low
Yes
Yes
Note 2
Note 1
Note 1
No
STAT1 = Off
STAT2 = On
Fault
Charge Current = 0
Reset Safety Timer
No
Yes
STAT1 = Off
STAT2 = Flashing
Safety Timer Suspended
Charge Current = 0
Temperature OK
No
Safety Timer
Expired
No
VBAT > VPTH
No
The charge current will be scaled based on the
die temperature during thermal regulation. Refer
to Section 4.5, “Thermal Regulation”, for
details.
Note 2:
Preconditioning Mode
Charge Current = IPREG
Reset Safety Timer
The qualification parameters are continuously
monitored throughout the charge cycle. Refer to
Section 4.1, “Charge Qualification and
Preconditioning”, for details.
Note 1:
Yes
Yes
STAT1 = On
STAT2 = Off
Yes
Yes
VDD < VUVLO
VBAT < VRTH
or EN Low
No
STAT1 = Flashing
(MCP73861/2)
STAT1 = Off
(MCP73863/4)
STAT2 = Off
(All Devices)
Charge Termination
Charge Current = 0
Reset Safety Timer
No
STAT1 = Flashing
Safety Timer Suspended
Charge Current = 0
Temperature OK
No
IOUT < ITERM
Elapsed Timer
Expired
Constant-Voltage Mode
Output Voltage = VREG
No
STAT1 = Off
STAT2 = Flashing
Charge Current = 0
No
STAT1 = Off
STAT2 = Off
No
STAT1 = Off
STAT2 = Flashing
Safety Timer Suspended
Charge Current = 0
Temperature OK
No
Safety Timer
Expired
No
VBAT = VREG
Constant-Current Mode
Charge Current = IREG
Reset Safety Timer
Yes
VBAT > VPTH
Yes
Temperature OK
Yes
VDD > VUVLO
EN High
Initialize
MCP73861/2/3/4
Operational Flow Algorithm.
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
5.0
DETAILED DESCRIPTION
5.1
Analog Circuitry
5.1.1
BATTERY MANAGEMENT INPUT
SUPPLY (VDD1, VDD2)
Figure 6-1 depicts a typical application circuit with
connection of the THERM input. The resistor values of
RT1 and RT2 are calculated with the following
equations.
For NTC thermistors:
2 × R COLD × R HOT
R T1 = ---------------------------------------------R COLD – R HOT
The VDD input is the input supply to the MCP7386X.
The MCP7386X automatically enters a Power-down
mode if the voltage on the VDD input falls below the
UVLO voltage (VSTOP). This feature prevents draining
the battery pack when the VDD supply is not present.
5.1.2
PROG INPUT
Fast charge current regulation can be scaled by placing
a programming resistor (RPROG) from the PROG input
to VSS. Connecting the PROG input to VSS allows for a
maximum fast charge current of 1.2A, typically. The
minimum fast charge current is 100 mA, set by letting
the PROG input float. The following formula calculates
the value for RPROG:
13.2 – 11 × I REG
R PROG = ---------------------------------------12 × I REG – 1.2
Where:
IREG = the desired fast charge current in amps.
RPROG = measured in kΩ.
The preconditioning trickle-charge current and the
charge termination current are scaled to approximately
10% and 8% of IREG, respectively.
5.1.3
CELL TEMPERATURE SENSOR
BIAS (THREF)
A 2.5V voltage reference is provided to bias an external
thermistor for continuous cell temperature monitoring
and prequalification. A ratio metric window comparison
is performed at threshold levels of VTHREF/2 and
VTHREF/4.
5.1.4
CELL TEMPERATURE SENSOR
INPUT (THERM)
The
MCP73861/2/3/4
continuously
monitors
temperature by comparing the voltage between the
THERM input and VSS with the upper and lower
temperature thresholds. A negative or positive
temperature coefficient, NTC or PTC thermistor and an
external voltage-divider typically develop this voltage.
The temperature sensing circuit has its own reference
to which it performs a ratio metric comparison.
Therefore, it is immune to fluctuations in the supply
input (VDD). The temperature-sensing circuit is
removed from the system when VDD is not applied,
eliminating additional discharge of the battery pack.
© 2008 Microchip Technology Inc.
2 × R COLD × R HOT
R T2 = ---------------------------------------------R COLD – 3 × R HOT
For PTC thermistors:
2 × R COLD × R HOT
R T1 = ---------------------------------------------R HOT – R COLD
2 × R COLD × R HOT
R T2 = ---------------------------------------------R HOT – 3 × R COLD
Where:
RCOLD and RHOT are the thermistor
resistance values at the temperature window
of interest.
Applying a voltage equal to VTHREF/3 to the THERM
input disables temperature monitoring.
5.1.5
TIMER SET INPUT (TIMER)
The TIMER input programs the period of the safety
timers by placing a timing capacitor (CTIMER) between
the TIMER input pin and VSS. Three safety timers are
programmed via the timing capacitor.
The preconditioning safety timer period:
C TIMER
t PRECON = ------------------- × 1.0Hour s
0.1 μ F
The fast charge safety timer period:
C TIMER
t FAST = ------------------- × 1.5Hours
0.1 μ F
The elapsed time termination period:
C TIMER
t TERM = ------------------- × 3.0Hours
0.1 μ F
The preconditioning timer starts after qualification and
resets when the charge cycle transitions to the fast
charge, Constant-current mode. The fast charge timer
and the elapsed timer start once the MCP7386X
transitions from preconditioning. The fast charge timer
resets when the charge cycle transitions to the
Constant-voltage mode. The elapsed timer will expire
and terminate the charge if the sensed current does not
diminish below the termination threshold.
During thermal regulation, the timer is slowed down
proportional to the charge current.
DS21893D-page 17
MCP73861/2/3/4
5.1.6
BATTERY VOLTAGE SENSE (VBAT3)
The MCP7386X monitors the battery voltage at the
VBAT3 pin. This input is tied directly to the positive
terminal of the battery pack.
5.1.7
BATTERY CHARGE CONTROL
OUTPUT (VBAT1, VBAT2)
The battery charge control output is the drain terminal
of an internal P-channel MOSFET. The MCP7386X
provides constant current and voltage regulation to the
battery pack by controlling this MOSFET in the linear
region. The battery charge control output should be
connected to the positive terminal of the battery pack.
5.2
Digital Circuitry
5.2.1
CHARGE STATUS OUTPUTS
(STAT1, STAT2)
Two status outputs provide information on the state of
charge. The current-limited, open-drain outputs can be
used to illuminate external LEDs. Optionally, a pull-up
resistor can be used on the output for communication
with a host microcontroller. Table 5-1 summarizes the
state of the status outputs during a charge cycle.
TABLE 5-1:
CHARGE
CYCLE STAT1
STATUS OUTPUTS (NOTE)
STAT1
STAT2
Qualification
Off
Off
Preconditioning
On
Off
ConstantCurrent Fast
Charge
On
Off
ConstantVoltage
On
Off
Charge
Complete
Flashing (1 Hz,
50% duty cycle)
(MCP73861/2)
Off
(MCP73863/4)
During a fault condition, the STAT1 status output will be
off and the STAT2 status output will be on. To recover
from a fault condition, the input voltage must be
removed and then reapplied, or the enable input (EN)
must be de-asserted to a logic-low, then asserted to a
logic-high.
When the voltage on the THERM input is outside the
preset window, the charge cycle will not start, or will be
suspended. The charge cycle is not terminated and
recovery is automatic. The charge cycle will resume (or
start) once the THERM input is valid and all other
qualification parameters are met. During an invalid
THERM condition, the STAT1 status output will be off
and the STAT2 status output will flash.
5.2.2
VSET INPUT
The VSET input selects the regulated output voltage of
the MCP7386X. With VSET tied to VSS, the MCP73861/
3 and MCP73862/4 regulate to 4.1V and 8.2V,
respectively. With VSET tied to VDD, the MCP73861/3
and MCP73862/4 regulate to 4.2V and 8.4V,
respectively.
5.2.3
LOGIC ENABLE (EN)
The logic enable input pin (EN) can be used to
terminate a charge at any time during the charge cycle,
as well as to initiate a charge cycle or initiate a recharge
cycle.
Applying a logic-high input signal to the EN pin, or tying
it to the input source, enables the device. Applying a
logic-low input signal disables the device and
terminates a charge cycle. When disabled, the device’s
supply current is reduced to 0.17 µA, typically.
Off
(All Devices)
Fault
Off
On
THERM Invalid
Off
Flashing (1 Hz,
50% duty cycle)
Disabled –
Sleep mode
Off
Off
Input Voltage
Disconnected
Off
Off
Note:
The flashing rate (1 Hz) is based off a timer capacitor
(CTIMER) of 0.1 µF. The rate will vary based on the
value of the timer capacitor.
Off state: Open-drain is high-impedance
On state: Open-drain can sink current
typically 7 mA
Flashing: Toggles between off state and
on state
DS21893D-page 18
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
6.0
APPLICATIONS
Figure 6-1 depicts a typical stand-alone application
circuit, while Figures 6-2 and 6-3 depict the
accompanying charge profile
The MCP7386X is designed to operate in conjunction
with a host microcontroller or in stand-alone
applications. The MCP7386X provides the preferred
charge algorithm for Lithium-Ion and Lithium-Polymer
cells Constant-current followed by Constant-voltage.
STAT1
16
15
EN VSS2
14 13
VSET
1
12
VBAT3
VDD1
2
11
VBAT2
VDD2
3
10
VBAT1
VSS1
4
9
VSS3
MCP73861
6
THREF
5
PROG
RPROG
7
+ Single
– Lithium-Ion
Cell
8
TIMER
CTIMER
THERM
Unregulated
Wall Cube
STAT2
.
RT1
RT2
FIGURE 6-1:
Typical Application Circuit.
Preconditioning
Mode
Constant-Current
Mode
Constant-Voltage
Mode
Regulation
Voltage
(VREG)
Regulation
Current
(IREG)
Charge
Voltage
Transition
Threshold
(VPTH)
Precondition
Current
(IPREG)
Charge
Current
Termination
Current
(ITERM)
Precondition
Safety Timer
Fast Charge
Safety Timer
Elapsed Time
Termination Timer
FIGURE 6-2:
Typical Charge Profile.
© 2008 Microchip Technology Inc.
DS21893D-page 19
MCP73861/2/3/4
Preconditioning
Mode
Constant-Current
Mode
Constant-Voltage
Mode
Regulation
Voltage
(VREG)
Regulation
Current
(IREG)
Charge
Voltage
Transition
Threshold
(VPTH)
Precondition
Current
(IPREG)
Termination
Current
(ITERM)
Charge
Current
Precondition
Safety Timer
Fast Charge
Safety Timer
Elapsed Time
Termination Timer
FIGURE 6-3:
6.1
Typical Charge Profile in Thermal Regulation.
Application Circuit Design
Due to the low efficiency of linear charging, the most
important factors are thermal design and cost, which
are a direct function of the input voltage, output current
and thermal impedance between the battery charger
and the ambient cooling air. The worst-case situation is
when the device has transitioned from the
Preconditioning mode to the Constant-current mode. In
this situation, the battery charger has to dissipate the
maximum power. A trade-off must be made between
the charge current, cost and thermal requirements of
the charger.
6.1.1
COMPONENT SELECTION
Selection of the external components in Figure 6-1 is
crucial to the integrity and reliability of the charging
system. The following discussion is intended as a guide
for the component selection process.
6.1.1.1
Current Programming Resistor
(RPROG)
1200 mA is the maximum charge current obtainable
from the MCP7386X. For this situation, the PROG input
should be connected directly to VSS.
6.1.1.2
Thermal Considerations
The worst-case power dissipation in the battery charger occurs when the input voltage is at the maximum
and the device has transitioned from the
Preconditioning mode to the Constant-current mode. In
this case, the power dissipation is:
PowerDissipation = ( V
DDMAX
–V
PTHMIN
)×I
REGMAX
Where:
VDDMAX
=
the maximum input voltage
IREGMAX
=
the maximum fast charge current
VPTHMIN
=
the minimum transition threshold
voltage
The preferred fast charge current for Lithium-Ion cells
is at the 1C rate, with an absolute maximum current at
the 2C rate. For example, a 500 mAh battery pack has
a preferred fast charge current of 500 mA. Charging at
this rate provides the shortest charge cycle times
without degradation to the battery pack performance or
life.
DS21893D-page 20
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
Power dissipation with a 5V, ±10% input voltage source
is:
PowerDissipation = ( 5.5V – 2.7V ) × 575mA = 1.61W
With the battery charger mounted on a 1 in2 pad of
1 oz. copper, the junction temperature rise is 60°C,
approximately. This would allow for a maximum
operating ambient temperature of 50°C before thermal
regulation is entered.
6.1.1.3
6.2
PCB Layout Issues
For optimum voltage regulation, place the battery pack
as close as possible to the device’s VBAT and VSS pins,
recommended to minimize voltage drops along the
high current-carrying PCB traces.
If the PCB layout is used as a heatsink, adding many
vias in the heatsink pad can help conduct more heat to
the backplane of the PCB, thus reducing the maximum
junction temperature.
External Capacitors
The MCP7386X is stable with or without a battery load.
In order to maintain good AC stability in the Constantvoltage mode, a minimum capacitance of 4.7 µF is
recommended to bypass the VBAT pin to VSS. This
capacitance provides compensation when there is no
battery load. In addition, the battery and
interconnections appear inductive at high frequencies.
These elements are in the control feedback loop during
Constant-voltage mode. Therefore, the bypass
capacitance may be necessary to compensate for the
inductive nature of the battery pack.
Virtually any good quality output filter capacitor can be
used, independent of the capacitor’s minimum
Effective Series Resistance (ESR) value. The actual
value of the capacitor (and its associated ESR)
depends on the output load current. A 4.7 µF ceramic,
tantalum or aluminum electrolytic capacitor at the
output is usually sufficient to ensure stability for up to a
1A output current.
6.1.1.4
Reverse-Blocking Protection
The MCP7386X provides protection from a faulted or
shorted input, or from a reversed-polarity input source.
Without the protection, a faulted or shorted input would
discharge the battery pack through the body diode of
the internal pass transistor.
6.1.1.5
Enable Interface
In the stand-alone configuration, the enable pin is
generally tied to the input voltage. The MCP7386X
automatically enters a Low-power mode when voltage
on the VDD input falls below the UVLO voltage (VSTOP),
reducing the battery drain current to 0.23 µA, typically.
6.1.1.6
Charge Status Interface
Two status outputs provide information on the state of
charge. The current-limited, open-drain outputs can be
used to illuminate external LEDs. Refer to Table 5-1 for
a summary of the state of the status outputs during a
charge cycle.
© 2008 Microchip Technology Inc.
DS21893D-page 21
MCP73861/2/3/4
NOTES:
DS21893D-page 22
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
7.0
PACKAGING INFORMATION
7.1
Package Marking Information
Example:
16-Lead QFN
73861
XXXXX
I/ML
0831
XXXXXX
XXXXXX
YWWNNN
256
16-Lead SOIC (150 mil)
XXXXXXXXXXXXX
XXXXXXXXXXXXX
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example:
MCP73861
e3
I/SL^^
0831256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2008 Microchip Technology Inc.
DS21893D-page 23
MCP73861/2/3/4
&
!! "# $%
3& '!&" & +
&& 244***' '4
# * !( + ! !
& +
% & & # &
D2
D
EXPOSED
PAD
e
E
E2
2
2
1
b
1
TOP VIEW
K
N
N
NOTE 1
L
BOTTOM VIEW
A3
A
A1
5&!
' !6'&!
7"') %!
66--
7
7
:/01
& #%%
/
1& &+ !!
,
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9
:
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8
6 &
-$ ! # #6 &
-3
01
/
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01
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/
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1& &6 &
6
,
/
1& & & -$ ! # #
=
>
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!" # $% &" ' ()"&'"!&) & #*&& & # +
!! *! " & #
, ' ! #& -./
012 0 !' ! & $ & " !**&"&& !
-32 % ' !("!" *&"&& (%%' & " ! !
>
* 1 0
DS21893D-page 24
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
&
3& '!&" & +
&& 244***' '4
© 2008 Microchip Technology Inc.
# * !( + ! !
& +
% & & # &
DS21893D-page 25
MCP73861/2/3/4
&
'! ( ) ' **+ , !! "# $'(-.%
3& '!&" & +
&& 244***' '4
# * !( + ! !
& +
% & & # &
D
N
E
E1
NOTE 1
1
3
2
e
b
h
α
h
L
β
A1
L1
5&!
' !6'&!
7"') %!
66--
7
7
+ !!
& #%%?
8
<#&
# # +
8
9
01
; &
# # +
78
:
&
8
c
φ
A2
A
>
>
/
>
>
>
/
<#&
6 &
/
:01
-
,01
01
1 '% @ & A
/
>
/
3&6 &
6
>
3& &
6
3& I
B
>
B
6
#+ !!
>
/
6
#<#&
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>
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# %& D
/B
>
/B
# %& 0&&'
E
/B
>
/B
&
!" # $% &" ' ()"&'"!&) & #*&& & # ? % &1 & !&
, ' !! #-#&"# '#% ! &"!!#% ! &"!!! & $ #/''
' ! #& -./
012 0 !' ! & $ & " !**&"&& !
-32 % ' !("!" *&"&& (%%' & " ! !
!# * 1 0
DS21893D-page 26
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
&
3& '!&" & +
&& 244***' '4
© 2008 Microchip Technology Inc.
# * !( + ! !
& +
% & & # &
DS21893D-page 27
MCP73861/2/3/4
NOTES:
DS21893D-page 28
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
APPENDIX A:
REVISION HISTORY
Revision D (December 2008)
The following is the list of modifications:
1.
Updated package outline diagrams.
Revision C (August 2005)
The following is the list of modifications:
1.
2.
1.
Added MCP73863 and MCP73864 devices
throughout data sheet.
Added Appendix A: Revision History.
Updated QFN and SOIC package diagrams.
Revision B (December 2004)
The following is the list of modifications:
1.
Added SOIC package throughout data sheet.
Revision A (June 2004)
• Original Release of this Document.
© 2008 Microchip Technology Inc.
DS21893D-page 29
MCP73861/2/3/4
NOTES:
DS21893D-page 30
© 2008 Microchip Technology Inc.
MCP73861/2/3/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
X
/XX
Device
Temperature
Range
Package
Device
MCP73861:
MCP73861T:
MCP73862:
MCP73862T:
MCP73863:
MCP73863T:
MCP73864:
MCP73864T:
Temperature Range
I
Package
ML
+85°C
a)
b)
Single-Cell Charge Controller with
Temperature Monitor
Single-Cell Charge Controller with
Temperature Monitor, Tape and Reel
Dual Series Cells Charge Controller with
Temperature Monitor
Dual Series Cells Charge Controller with
Temperature Monitor, Tape and Reel
Single-cell Charge Controller with
Temperature Monitor
Single-Cell Charge Controller with
Temperature Monitor, Tape and Reel
Dual Series Cells Charge Controller with
Temperature Monitor
Dual Series Cells Charge Controller with
Temperature Monitor, Tape and Reel
= -40°C to
Examples:
c)
d)
a)
b)
c)
d)
= Plastic Quad Flat No Lead, 4x4 mm Body (QFN),
16-lead
= Plastic Small Outline, 150 mm Body (SOIC),
16-lead
b)
c)
d)
a)
b)
c)
d)
© 2008 Microchip Technology Inc.
Single-Cell Controller
16LD-QFN package.
MCP73861T-I/ML: Tape and Reel,
Single-Cell Controller
16LD-QFN package.
MCP73861-I/SL:
Single-Cell Controller
16LD-SOIC package.
MCP73861T-I/SL: Tape and Reel,
Single-Cell Controller
16LD-SOIC package.
MCP73862-I/ML:
Dual-Cell Controller
16LD-QFN package.
MCP73862T-I/ML: Tape and Reel,
Dual-Cell Controller
16LD-QFN package.
MCP73862-I/SL:
Dual-Cell Controller
16LD-SOIC package.
MCP73862T-I/SL: Tape and Reel,
Dual-Cell Controller
16LD-SOIC package.
(Industrial)
a)
SL
MCP73861-I/ML:
MCP73863-I/ML:
Single-Cell Controller
16LD-QFN package.
MCP73863T-I/ML: Tape and Reel,
Single-Cell Controller
16LD-QFN package.
MCP73863-I/SL:
Single-Cell Controller
16LD-SOIC package.
MCP73863T-I/SL: Tape and Reel,
Single-Cell Controller
16LD-SOIC package.
MCP73864-I/ML:
Dual-Cell Controller
16LD-QFN package.
MCP73864T-I/ML: Tape and Reel,
Dual-Cell Controller
16LD-QFN package.
MCP73864-I/SL:
Dual-Cell Controller
16LD-SOIC package.
MCP73864T-I/SL: Tape and Reel,
Dual-Cell Controller
16LD-SOIC package.
DS21893D-page 31
MCP73861/2/3/4
NOTES:
DS21893D-page 32
© 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,
PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2008, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2008 Microchip Technology Inc.
DS21893D-page 33
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-4182-8400
Fax: 91-80-4182-8422
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Pune
Tel: 91-20-2566-1512
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Tel: 86-592-2388138
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Taiwan - Taipei
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Tel: 86-756-3210040
Fax: 86-756-3210049
01/02/08
DS21893D-page 34
© 2008 Microchip Technology Inc.