19-2325; Rev 5; 12/05 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits The MAX6715–MAX6729 are ultra-low-voltage microprocessor (µP) supervisory circuits designed to monitor two or three system power-supply voltages. These devices assert a system reset if any monitored supply falls below its factorytrimmed or adjustable threshold and maintain reset for a minimum timeout period after all supplies rise above their thresholds. The integrated dual/triple supervisory circuits significantly improve system reliability and reduce size compared to separate ICs or discrete components. These devices monitor primary supply voltages (VCC1) from 1.8V to 5.0V and secondary supply voltages (VCC2) from 0.9V to 3.3V with factory-trimmed reset threshold voltage options (see Reset Voltage Threshold Suffix Guide). An externally adjustable RSTIN input option allows customers to monitor a third supply voltage down to 0.62V. These devices are guaranteed to be in the correct reset output logic state when either VCC1 or VCC2 remains greater than 0.8V. A variety of push-pull or open-drain reset outputs along with watchdog input, manual reset input, and power-fail input/output features are available (see Selector Guide). Select reset timeout periods from 1.1ms to 1120ms (min) (see Reset Timeout Period Suffix Guide). The MAX6715–MAX6729 are available in small 5, 6, and 8-pin SOT23 packages and operate over the -40°C to +85°C temperature range. Features ♦ VCC1 (primary supply) Reset Threshold Voltages from 1.58V to 4.63V ♦ VCC2 (secondary supply) Reset Threshold Voltages from 0.79V to 3.08V ♦ Externally Adjustable RSTIN Threshold for Auxiliary/Triple-Voltage Monitoring (0.62V internal reference) ♦ Watchdog Timer Option 35s (min) Long Startup Period 1.12s (min) Normal Timeout Period ♦ Manual Reset Input Option ♦ Power-Fail Input/Power-Fail Output Option (Push-Pull and Open-Drain Active-Low) ♦ Guaranteed Reset Valid Down to VCC1 or VCC2 = 0.8V ♦ Reset Output Logic Options ♦ Immune to Short VCC Transients ♦ Low Supply Current 14µA (typ) at 3.6V ♦ Small 5, 6, and 8-Pin SOT23 Packages Ordering Information Applications Multivoltage Systems Telecom/Networking Equipment TEMP RANGE PIN-PACKAGE MAX6715UT_ _D_ -T PART -40°C to +85°C 6 SOT23-6 Computers/Servers Portable/Battery-Operated Equipment MAX6716UT_ _D_ -T -40°C to +85°C 6 SOT23-6 MAX6717UK_ _D_ -T -40°C to +85°C 5 SOT23-5 Industrial Equipment Printer/Fax Set-Top Boxes MAX6718UK_ _D_ -T -40°C to +85°C 5 SOT23-5 MAX6719UT_ _D_ -T -40°C to +85°C 6 SOT23-6 MAX6720UT_ _D_ -T -40°C to +85°C 6 SOT23-6 Typical Operating Circuit UNREGULATED DC IN OUT2 DC/DC CONVERTER OUT1 1.8V VCC1 VCC2 R1 R2 PUSHBUTTON SWITCH RST RESET RSTIN/PFI WDI I/O MR PFO NMI MAX67_ _ 0.9V I/O CORE SUPPLY SUPPLY Note: The first “_ _” are placeholders for the threshold voltage levels of the devices. Desired threshold levels are set by the part number suffix found in the Reset Voltage Threshold Suffix Guide. The “_” after the D is a placeholder for the reset timeout delay time. Desired delay time is set using the timeout period suffix found in the Reset Timeout Period Suffix Guide. For example the MAX6716UTLTD3-T is a dual-voltage supervisor VTH1 = 4.625V, VTH2 = 3.075V, and 210ms (typ) timeout period. Devices are available in both leaded and lead-free packaging. Specify lead-free by replacing "-T" with "+T" when ordering. µP Ordering Information continued at end of data sheet. Pin Configurations and Selector Guide appear at end of data sheet. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6715–MAX6729 General Description MAX6715–MAX6729 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits ABSOLUTE MAXIMUM RATINGS Terminal Voltage (with respect to GND) VCC1, VCC2 ..........................................................-0.3V to +6V Open-Drain RST, RST1, RST2, PFO, RST ................-0.3V to +6V Push-Pull RST, RST1, PFO, RST...............-0.3V to (VCC1 + 0.3V) Push-Pull RST2 .........................................-0.3V to (VCC2 + 0.3V) RSTIN, PFI, MR, WDI ................................................-0.3V to +6V Input Current/Output Current (all pins) ...............................20mA Continuous Power Dissipation (TA = +70°C) 5-Pin SOT23-5 (derate 7.1mW/°C above +70°C) ........571mW 6-Pin SOT23-6 (derate 8.7mW/°C above +70°C) ........696mW 8-Pin SOT23-8 (derate 8.9mW/°C above +70°C) ........714mW Operating Temperature Range ...........................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Junction Temperature ......................................................+150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC1 = VCC2 = 0.8V to 5.5V, GND = 0, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER Supply Voltage SYMBOL ICC1 Supply Current ICC2 VCC1 Reset Threshold VCC2 Reset Threshold CONDITIONS VCC VTH1 VTH2 2 VHYST TYP 0.8 MAX UNITS 5.5 V VCC1 < 5.5V, all I/O pins open 15 VCC1 < 3.6V, all I/O pins open 10 28 VCC2 < 3.6V, all I/O pins open 4 11 VCC2 < 2.75V, all I/O pins open 3 9 39 L (falling) 4.500 4.625 4.750 M (falling) 4.250 4.375 4.500 T (falling) 3.000 3.075 3.150 S (falling) 2.850 2.925 3.000 R (falling) 2.550 2.625 2.700 Z (falling) 2.250 2.313 2.375 Y (falling) 2.125 2.188 2.250 W (falling) 1.620 1.665 1.710 V (falling) 1.530 1.575 1.620 T (falling) 3.000 3.075 3.150 S (falling) 2.850 2.925 3.000 R (falling) 2.550 2.625 2.700 Z (falling) 2.250 2.313 2.375 Y (falling) 2.125 2.188 2.250 W (falling) 1.620 1.665 1.710 V (falling) 1.530 1.575 1.620 I (falling) 1.350 1.388 1.425 H (falling) 1.275 1.313 1.350 G (falling) 1.080 1.110 1.140 F (falling) 1.020 1.050 1.080 E (falling) 0.810 0.833 0.855 D (falling) 0.765 0.788 0.810 Reset Threshold Tempco Reset Threshold Hysteresis MIN Referenced to VTH typical µA V V 20 ppm/°C 0.5 % _______________________________________________________________________________________ Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits (VCC1 = VCC2 = 0.8V to 5.5V, GND = 0, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER VCC to Reset Output Delay SYMBOL tRD CONDITIONS tRP TYP VCC1 = (VTH1 + 100mV) to (VTH1 - 100mV) or VCC2 = (VTH2 + 75mV) to (VTH2 - 75mV) D1 Reset Timeout Period MIN MAX 20 UNITS µs 1.1 1.65 2.2 D2 8.8 13.2 17.6 D3 140 210 280 D5 280 420 560 D6 560 840 1120 D4 1120 1680 2240 626.5 ms ADJUSTABLE RESET COMPARATOR INPUT (MAX6719/MAX6720/MAX6723–MAX6727) RSTIN Input Threshold VRSTIN 611 RSTIN Input Current IRSTIN -25 RSTIN Hysteresis RSTIN to Reset Output Delay tRSTIND VRSTIN to (VRSTIN - 30mV) 642 mV +25 nA 3 mV 22 µs POWER-FAIL INPUT (MAX6728/MAX6729) PFI Input Threshold PFI Input Current VPFI 611 IPFI -25 PFI Hysteresis VPFH PFI to PFO Delay tDPF 626.5 (VPFI + 30mV) to (VPFI - 30mV) 642 +25 mV nA 3 mV 2 µs MANUAL RESET INPUT (MAX6715–MAX6722/MAX6725–MAX6729) 0.3 ✕ VCC1 VIL MR Input Voltage 0.7 ✕ VCC1 VIH MR Minimum Pulse Width 1 MR Glitch Rejection MR to Reset Delay tMR MR Pullup Resistance V µs 100 ns 200 ns 25 50 80 35 54 72 1.12 1.68 2.24 kΩ WATCHDOG INPUT (MAX6721–MAX6729) Watchdog Timeout Period tWD First watchdog period after reset timeout period Normal mode WDI Pulse Width WDI Input Voltage WDI Input Current tWDI (Note 2) 50 0.7 ✕ VCC1 VIH IWDI ns 0.3 ✕ VCC1 VIL WDI = 0 or VCC1 -1 s +1 V µA _______________________________________________________________________________________ 3 MAX6715–MAX6729 ELECTRICAL CHARACTERISTICS (continued) MAX6715–MAX6729 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits ELECTRICAL CHARACTERISTICS (continued) (VCC1 = VCC2 = 0.8V to 5.5V, GND = 0, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS RESET/POWER-FAIL OUTPUTS RST/RST1/RST2/PFO Output LOW (Push-Pull or Open-Drain) RST/RST1/PFO Output HIGH (Push-Pull Only) RST2 Output HIGH (Push-Pull Only) RST Output HIGH (Push-Pull Only) VOL VOH VOH VOH VCC1 or VCC2 ≥ 0.8V, ISINK = 1µA, output asserted 0.3 VCC1 or VCC2 ≥ 1.0V, ISINK = 50µA, output asserted 0.3 VCC1 or VCC2 ≥ 1.2V, ISINK = 100µA, output asserted 0.3 VCC1 or VCC2 ≥ 2.7V, ISINK = 1.2mA, output asserted 0.3 VCC1 or VCC2 ≥ 4.5V, ISINK = 3.2mA, output asserted 0.4 VCC1 ≥ 1.8V, ISOURCE = 200µA, output not asserted 0.8 ✕ VCC1 VCC1 ≥ 2.7V, ISOURCE = 500µA, output not asserted 0.8 ✕ VCC1 VCC1 ≥ 4.5V, ISOURCE = 800µA, output not asserted 0.8 ✕ VCC1 VCC2 ≥ 1.8V, ISOURCE = 200µA, output not asserted 0.8 ✕ VCC2 VCC2 ≥ 2.7V, ISOURCE = 500µA, output not asserted 0.8 ✕ VCC2 VCC2 ≥ 4.5V, ISOURCE = 800µA, output not asserted 0.8 ✕ VCC2 VCC1 ≥ 1.0V, ISOURCE = 1µA, reset asserted 0.8 ✕ VCC1 VCC1 ≥ 1.8V, ISOURCE = 150µA, reset asserted 0.8 ✕ VCC1 VCC1 ≥ 2.7V, ISOURCE = 500µA, reset asserted 0.8 ✕ VCC1 VCC1 ≥ 4.5V, ISOURCE = 800µA, reset asserted 0.8 ✕ VCC1 V V V V VCC1 or VCC2 ≥ 1.8V, ISINK = 500µA, reset not asserted 0.3 VCC1 or VCC2 ≥ 2.7V, ISINK = 1.2mA, reset not asserted 0.3 VCC1 or VCC2 ≥ 4.5V, ISINK = 3.2mA, reset not asserted 0.4 RST/RST1/RST2/PFO Output Open-Drain Leakage Current Output not asserted 0.5 µA RST Output Open-Drain Leakage Current Output asserted 0.5 µA RST Output LOW (Push-Pull or Open Drain) VOL Note 1: Devices tested at +25°C. Overtemperature limits are guaranteed by design and not production tested. Note 2: Parameter guaranteed by design. 4 _______________________________________________________________________________________ V Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits ICC1 12 10 8 6 ICC2 4 10 8 ICC1 6 16 14 12 8 -15 10 35 60 85 ICC1 6 4 ICC2 ICC2 2 0 -40 TOTAL 10 2 0 0 -40 -15 10 35 60 85 -40 -15 10 35 60 85 TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C) SUPPLY CURRENT vs. TEMPERATURE VCC1 = 1.8V, VCC2 = 1.2V NORMALIZED RESET/WATCHDOG TIMEOUT PERIOD vs. TEMPERATURE MAXIMUM VCC TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE 12 10 TOTAL 8 6 ICC1 4 2 ICC2 1.005 1.004 1.003 1.002 1.001 1.000 0.999 0 10,000 RESET OCCURS ABOVE THIS LINE 1000 0.998 -15 10 35 60 85 -15 10 35 60 85 TEMPERATURE (°C) TEMPERATURE (°C) NORMALIZED VCC RESET THRESHOLD vs. TEMPERATURE RESET INPUT AND POWER-FAIL INPUT THRESHOLD vs. TEMPERATURE 1.003 630 THRESHOLD (mV) 1.002 1.001 1.000 0.999 10 100 1000 VCC TO RESET DELAY vs. TEMPERATURE 629 628 627 0.998 54 100mV OVERDRIVE 53 52 51 50 49 48 47 46 626 0.997 1 RESET THRESHOLD OVERDRIVE (mV) 631 MAX6715-29 toc07 1.004 100 10 -40 VCC TO RESET DELAY (µs) -40 MAX6715-29 toc06 1.006 MAXIMUM VCC TRANSIENT DURATION (µs) 14 1.007 MAX6715-29 toc05 16 RESET/WATCHDOG PERIOD MAX6715-29 toc04 18 SUPPLY CURRENT (µA) TOTAL 12 4 2 RESET THRESHOLD 14 18 MAX6715-29 toc03 16 MAX6715-29 toc09 14 MAX6715-29 toc02 TOTAL 18 SUPPLY CURRENT vs. TEMPERATURE VCC1 = 2.5V, VCC2 = 1.8V MAX6715-29 toc08 SUPPLY CURRENT (µA) 16 SUPPLY CURRENT (µA) MAX6715-29 toc01 18 SUPPLY CURRENT vs. TEMPERATURE VCC1 = 3.3V, VCC2 = 2.5V SUPPLY CURRENT (µA) SUPPLY CURRENT vs. TEMPERATURE VCC1 = 5V, VCC2 = 3.3V 45 625 0.996 -40 -15 10 35 TEMPERATURE (°C) 60 85 44 -40 -15 10 35 TEMPERATURE (°C) 60 85 -40 -15 10 35 60 85 TEMPERATURE (°C) _______________________________________________________________________________________ 5 MAX6715–MAX6729 Typical Operating Characteristics (VCC1 = 5V, VCC2 = 3.3V, TA = +25°C, unless otherwise noted.) Typical Operating Characteristics (continued) (VCC1 = 5V, VCC2 = 3.3V, TA = +25°C, unless otherwise noted.) RESET INPUT TO RESET OUTPUT DELAY vs. TEMPERATURE POWER-FAIL INPUT TO POWER-FAIL OUTPUT DELAY vs. TEMPERATURE MR TO RESET OUTPUT DELAY 24.0 23.8 23.6 23.4 23.2 2.4 MAX6715-29 toc11 24.2 30mV OVERDRIVE RSTIN TO RESET DELAY (µs) 30mV OVERDRIVE MAX6715-29 toc10 MAX6715-29 toc12 24.4 RSTIN TO RESET DELAY (µs) MAX6715–MAX6729 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits VMR 2V/div 2.3 0 2.2 VRST 2V/div 2.1 23.0 0 22.8 2.0 -40 -15 10 35 60 85 -40 TEMPERATURE (°C) -15 10 35 60 50ns/div 85 TEMPERATURE (°C) Pin Description PIN MAX6715/ MAX6717/ MAX6719/ MAX6721/ MAX6723/ MAX6725/ MAX6728/ NAME MAX6727 MAX6716 MAX6718 MAX6720 MAX6722 MAX6724 MAX6726 MAX6729 1 6 1 1 1 1 1 1, 4 1 RST/ RST1 FUNCTION Active-Low Reset Output, Open-Drain or Push-Pull. RST/RST1 changes from high to low when VCC1 or VCC2 drops below the selected reset thresholds, RSTIN is below threshold, MR is pulled low, or the watchdog triggers a reset. RST/RST1 remains low for the reset timeout period after VCC1/ VCC2/RSTIN exceed the device reset thresholds, MR goes low to high, or the watchdog triggers a reset. Open-drain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC1. _______________________________________________________________________________________ Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits PIN MAX6715/ MAX6717/ MAX6719/ MAX6721/ MAX6723/ MAX6725/ MAX6728/ NAME MAX6727 MAX6716 MAX6718 MAX6720 MAX6722 MAX6724 MAX6726 MAX6729 FUNCTION 5 — — — — — — — RST2 Active-Low Reset Output, Open-Drain or Push-Pull. RST2 changes from high to low when VCC1 or VCC2 drops below the selected reset thresholds or MR is pulled low. RST2 remains low for the reset timeout period after VCC1/VCC2 exceed the device reset thresholds or MR goes low to high. Open-drain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC2. 2 2 2 2 2 2 2 2 GND Ground 3 3 3 3 — 5 5 5 MR 4 4 4 4 4 6 6 6 VCC2 6 5 6 6 6 8 8 8 VCC1 Active-Low Manual Reset Input. Internal 50kΩ pullup to VCC1. Pull low to force a reset. Reset remains active as long as MR is low and for the reset timeout period after MR goes high. Leave unconnected or connect to VCC1 if unused. Secondary Supply Voltage Input. Powers the device when it is above VCC1 and input for secondary reset threshold monitor. Primary Supply Voltage Input. Powers the device when it is above VCC2 and input for primary reset threshold monitor. _______________________________________________________________________________________ 7 MAX6715–MAX6729 Pin Description (continued) MAX6715–MAX6729 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits Pin Description (continued) PIN MAX6715/ MAX6717/ MAX6719/ MAX6721/ MAX6723/ MAX6725/ MAX6728/ NAME MAX6727 MAX6716 MAX6718 MAX6720 MAX6722 MAX6724 MAX6726 MAX6729 — — — 8 — — — — 5 — 5 — — 3 5 — 3 7 — 3 7 — 3 — 7 FUNCTION WDI Watchdog Input. If WDI remains high or low for longer than the watchdog timeout period, the internal watchdog timer runs out and the reset output asserts for the reset timeout period. The internal watchdog timer clears whenever a reset is asserted or WDI sees a rising or falling edge. The watchdog has a long timeout period (35s min) after each reset event and a short timeout period (1.12s min) after the first valid WDI transition. RSTIN Undervoltage Reset Comparator Input. Highimpedance input for adjustable reset monitor. The reset output is asserted when RSTIN falls below the 0.626V internal reference voltage. Set the monitored voltage reset threshold with an external resistor-divider network. Connect RSTIN to VCC1 or VCC2 if not used. PFI Power-Fail Voltage Monitor Input. Highimpedance input for internal power-fail monitor comparator. Connect PFI to an external resistordivider network to set the power-fail threshold voltage (0.626V typical internal reference voltage). Connect to GND, VCC1, or VCC2 if not used. _______________________________________________________________________________________ Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits PIN MAX6715/ MAX6717/ MAX6719/ MAX6721/ MAX6723/ MAX6725/ MAX6728/ NAME MAX6727 MAX6716 MAX6718 MAX6720 MAX6722 MAX6724 MAX6726 MAX6729 — — — — — — — — — — Detailed Description Supply Voltages The MAX6715–MAX6729 microprocessor (µP) supervisory circuits maintain system integrity by alerting the µP to fault conditions. These ICs are optimized for systems that monitor two or three supply voltages. The outputreset state is guaranteed to remain valid while either VCC1 or VCC2 is above 0.8V. Threshold Levels Input voltage threshold level combinations are indicated by a two-letter code in the Reset Voltage Threshold — 4 — — 4 — FUNCTION PFO Active-Low Power-Fail Monitor Output, OpenDrain or Push-Pull. PFO is asserted low when PFI is less than 0.626V. PFO deasserts without a reset timeout period. Opendrain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC1. RST Active-High Reset Output, Open-Drain or Push-Pull. RST changes from low to high when VCC1 or VCC2 drops below selected reset thresholds, RSTIN is below threshold, MR is pulled low, or the watchdog triggers a reset. RST remains HIGH for the reset timeout period after VCC1/ VCC 2/RSTIN exceed the device reset thresholds, MR goes low to high, or the watchdog triggers a reset. Open-drain outputs require an external pullup resistor. Push-pull outputs are referenced to VCC1. Suffix Guide (Table 1). Contact factory for availability of other voltage threshold combinations. Reset Outputs The MAX6715–MAX6729 provides an active-low reset output (RST) and the MAX6725/MAX6726 provides both an active-high (RST) and an active-low reset output (RST). RST, RST, RST1, and RST2 are asserted when the voltage at either VCC1 or VCC2 falls below the voltage threshold level, RSTIN drops below threshold, or MR is pulled low. Once reset is asserted it stays low for the reset timeout period (see Table 2). If V CC1, VCC2, or RSTIN goes below the reset threshold before the reset timeout period is completed, the internal timer _______________________________________________________________________________________ 9 MAX6715–MAX6729 Pin Description (continued) MAX6715–MAX6729 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits restarts. The MAX6715/MAX6717/MAX6719/MAX6721/ MAX6723/MAX6725/MAX6727/MAX6728 contain opendrain reset outputs, while the MAX6716/MAX6718/ MAX6720/MAX6722/MAX6724/MAX6726/MAX6729 contain push-pull reset outputs. The MAX6727 provides two separate open-drain RST outputs driven by the same internal logic. R1 RSTIN Manual Reset Input Many microprocessor-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic low on MR asserts the reset output. Reset remains asserted while MR is low and for the reset timeout period (tRP) after MR returns high. This input has an internal 50kΩ pullup resistor to VCC1 and can be left unconnected if not used. MR can be driven with TTL or CMOS logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manual reset function; external debounce circuitry is not required. If MR is driven from long cables or if the device is used in a noisy environment, connect a 0.1µF capacitor from MR to GND to provide additional noise immunity. Adjustable Input Voltage The MAX6719/MAX6720 and MAX6723–MAX6727 provide an additional input to monitor a third system voltage. The threshold voltage at RSTIN is typically 626mV. Connect a resistor-divider network to the circuit as shown in Figure 1 to establish an externally controlled threshold voltage, VEXT_TH. MAX6719/ MAX6720/ MAX6723– MAX6727 VEXT_TH R2 GND Figure 1. Monitoring a Third Voltage when processor activity fails. After each reset event (VCC power-up/brownout, manual reset, or watchdog reset), there is a long initial watchdog period of 35s minimum. The long watchdog period mode provides an extended time for the system to power-up and fully initialize all µP and system components before assuming responsibility for routine watchdog updates. The normal watchdog timeout period (1.12s min) begins after the first transition on WDI before the conclusion of the long initial watchdog period (Figure 2). During the normal operating mode, the supervisor will issue a reset pulse for the reset timeout period if the µP does not update the WDI with a valid transition (high-tolow or low-to-high) within the standard timeout period (1.12s min). VEXT_TH = 626mV((R1 + R2)/R2) Low leakage current at RSTIN allows the use of largevalued resistors resulting in reduced power consumption of the system. Power-Fail Comparator PFI is the noninverting input to a comparator. If PFI is less than VPFI (626.5mV), PFO goes low. Common uses for the power-fail comparator include monitoring preregulated input of the power supply (such as a battery) or Watchdog Input The watchdog monitors µP activity through the watchdog input (WDI). To use the watchdog function, connect WDI to a bus line or µP I/O line. When WDI remains high or low for longer than the watchdog timeout period, the reset output asserts. The MAX6721–MAX6729 include a dual-mode watchdog timer to monitor µP activity. The flexible timeout architecture provides a long period initial watchdog mode, allowing complicated systems to complete lengthy boots, and a short period normal watchdog mode, allowing the supervisor to provide quick alerts VTH VCC tWDI-NORMAL 1.12s MAX tWDI-STARTUP 35s MAX WDI 1.12s MAX RESET tRP Figure 2. Normal Watchdog Startup Sequence 10 ______________________________________________________________________________________ Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits RESET TO OTHER SYSTEM COMPONENTS VCC1 VCC2 VIN MAX6728/ MAX6729 R1 VTRIP = VPFI PFI ( R1R2+ R2 ) MAX6715– MAX6729 PFO µP 4.7kΩ VCC2 R2 RST RESET VCC1 GND GND GND B VCC MAX6728/ MAX6729 R1 PFI Figure 4. Interfacing to µPs with Bidirectional Reset I/O PFO [ ( VTRIP = R2 (VPFI) ) 1 + 1 - VCC R1 R2 R1 ] VPFI = 626.5mV R2 VIN GND Figure 3. Using Power-Fail Input to Monitor an Additional Power-Supply a) VIN is Positive b) VIN is Negative providing an early power-fail warning so software can conduct an orderly system shutdown. It can also be used to monitor supplies other than VCC1 or VCC2 by setting the power-fail threshold with a resistor-divider, as shown in Figure 3. PFI is the input to the power-fail comparator. The typical comparator delay is 2µs from PFI to PFO. Connect PFI to ground of VCC1 if unused. Ensuring a Valid Reset Output Down to VCC = 0 The MAX6715–MAX6729 are guaranteed to operate properly down to V CC = 0.8V. In applications that require valid reset levels down to VCC = 0 use a pulldown resistor at RST to ground. The resistor value used is not critical, but it must be large enough not to load the reset output when VCC is above the reset threshold. For most applications, 100kΩ is adequate. This configuration does not work for the open-drain outputs of the MAX6715/MAX6717/MAX6719/MAX6721/MAX6723/ MAX6725/MAX6727/MAX6728. For push-pull, activehigh RST output connect the external resistor as a pullup from RST to VCC1. Applications Information Interfacing to µPs with Bidirectional Reset Pins Most microprocessors with bidirectional reset pins can interface directly to open-drain RST output options. Systems simultaneously requiring a push-pull RST output and a bidirectional reset interface can be in logic contention. To prevent contention, connect a 4.7kΩ resistor between RST and the µP’s reset I/O port as shown in Figure 4. Adding Hysteresis to the Power-Fail Comparator The power-fail comparator has a typical input hysteresis of 3mV. This is sufficient for most applications where a power-supply line is being monitored through an external voltage-divider (see the Power-Fail Comparator section). If additional noise margin is desired, connect a resistor between PFO and PFI as shown in Figure 5. Select the values of R1, R2, and R3 so PFI sees VPFI (626mV) when VEXT falls to its power-fail trip point (VFAIL) and when VIN rises to its power-good trip point (VGOOD). The hysteresis window extends between the specified VFAIL and VGOOD thresholds. R3 adds the additional hysteresis by sinking current from the R1/R2 divider network when PFO is logic low and sourcing current into the network when PFO is logic high. R3 is typically an order of magnitude greater than R1 or R2. The current through R2 should be at least 2.5µA to ensure that the 25nA (max) PFI input current does not significantly shift the trip points. Therefore, R2 < VPFI/2.5µA < 248kΩ for most applications. R3 will provide additional hysteresis for PFO push-pull (VOH = VCC1) or open-drain (VOH = VPULLUP) applications. ______________________________________________________________________________________ 11 MAX6715–MAX6729 A MAX6715–MAX6729 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits R3 START A VIN VEXT VGOOD VFAIL PFO MAX6728/ MAX6729 SET WDI HIGH R1 PFI PROGRAM CODE PFO R2 GND VGOOD = DESIRED VEXT GOOD VOLTAGE THRESHOLD VFAIL = DESIRED VEXT FAIL VOLTAGE THRESHOLD VOH = VCC1 (FOR PUSH-PULL PFO) R2 = 200kΩ (FOR > 2.5µA R2 CURRENT) R1 = R2 ((VGOOD - VPFI) - (VPFI)(VGOOD - VFAIL) / VOH) / VPFI R3 = (R1 x VOH) / (VGOOD - VFAIL) Figure 5. Adding Hysteresis to Power-Fail for Push-Pull PFO Monitoring an Additional Power Supply These µP supervisors can monitor either positive or negative supplies using a resistor voltage-divider to PFI. PFO can be used to generate an interrupt to the µP or cause reset to assert (Figure 3). Monitoring a Negative Voltage The power-fail comparator can be used to monitor a negative supply voltage using the circuit shown in Figure 3. When the negative supply is valid, PFO is low. When the negative supply voltage drops, PFO goes high. The circuit’s accuracy is affected by the PFI threshold tolerance, VCC, R1, and R2. Negative-Going VCC Transients The MAX6715–MAX6729 supervisors are relatively immune to short-duration negative-going VCC transients (glitches). It is usually undesirable to reset the µP when V CC experiences only small glitches. The Typical Operating Characteristics show Maximum Transient Duration vs. Reset Threshold Overdrive, for which reset pulses are not generated. The graph was produced using negative-going VCC pulses, starting above VTH and ending below the reset threshold by the magnitude indicated (reset threshold overdrive). The graph shows the maximum pulse width that a negative-going VCC transient may typically have without causing a reset pulse to be issued. As the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. A 0.1µF bypass capacitor mounted close to the VCC pin provides additional transient immunity. SUBROUTINE OR PROGRAM LOOP SET WDI LOW HANG IN SUBROUTINE SUBROUTINE COMPLETED RETURN Figure 6. Watchdog Flow Diagram watchdog timer to closely monitor software execution. This technique avoids a “stuck” loop where the watchdog timer continues to be reset within the loop, keeping the watchdog from timing out. Figure 6 shows an example flow diagram where the I/O driving the watchdog input is set high at the beginning of the program, set low at the beginning of every subroutine or loop, then set high again when the program returns to the beginning. If the program should “hang” in any subroutine, the I/O is continually set low and the watchdog timer is allowed to time out, causing a reset or interrupt to be issued. Chip Information TRANSISTOR COUNT: 1072 PROCESS: BiCMOS Watchdog Software Considerations Setting and resetting the watchdog input at different points in the program, rather than “pulsing” the watchdog input high-low-high or low-high-low, helps the 12 ______________________________________________________________________________________ Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits VCC1 VCC1 MR MR PULLUP VCC1 VCC1 VCC2 VREF RESET TIMEOUT PERIOD VCC2 RST RESET OUTPUT DRIVER RST RSTIN/PFI PFO VCC1 VREF VCC1 WATCHDOG TIMER WDI VREF/2 ______________________________________________________________________________________ 13 MAX6715–MAX6729 Functional Diagram Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits MAX6715–MAX6729 Selector Guide PART NUMBER NUMBER OF VOLTAGE MONITORS OPENDRAIN RESET OPENDRAIN RESET PUSHPULL RESET PUSHPULL RESET MANUAL RESET WATCHDOG INPUT POWERFAIL INPUT/ OUTPUT MAX6715 2 2 — — — √ — — MAX6716 2 — — 2 — √ — — MAX6717 2 1 — — — √ — — MAX6718 2 — — 1 — √ — — MAX6719 3 1 — — — √ — — MAX6720 3 — — 1 — √ — — MAX6721 2 1 — — — √ √ — MAX6722 2 — — 1 — √ √ — MAX6723 3 1 — — — — √ — MAX6724 3 — — 1 — — √ — MAX6725 3 1 1 — — √ √ — MAX6726 3 — — 1 1 √ √ — MAX6727 3 2 — — — √ √ — MAX6728 3 1 — — — √ √ √ (open drain) MAX6729 3 — — 1 — √ √ √ (push-pull) Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE MAX6721UT_ _D_ -T -40°C to +85°C 6 SOT23-6 MAX6722UT_ _D_ -T -40°C to +85°C 6 SOT23-6 MAX6723UT_ _D_ -T -40°C to +85°C 6 SOT23-6 MAX6724UT_ _D_ -T -40°C to +85°C 6 SOT23-6 MAX6725KA_ _D_ -T -40°C to +85°C 8 SOT23-8 MAX6726KA_ _D_ -T -40°C to +85°C 8 SOT23-8 MAX6727KA_ _D_ -T -40°C to +85°C 8 SOT23-8 MAX6728KA_ _D_ -T -40°C to +85°C 8 SOT23-8 MAX6729KA_ _D_ -T -40°C to +85°C 8 SOT23-8 Note: The first “_ _” are placeholders for the threshold voltage levels of the devices. Desired threshold levels are set by the part number suffix found in the Reset Voltage Threshold Suffix Guide. The “_” after the D is a placeholder for the reset timeout delay time. Desired delay time is set using the timeout period suffix found in the Reset Timeout Period Suffix Guide. For example the MAX6716UTLTD3-T is a dual-voltage supervisor VTH1 = 4.625V, VTH2 = 3.075V, and 210ms (typ) timeout period. Devices are available in both leaded and lead-free packaging. Specify lead-free by replacing "-T" with "+T" when ordering. 14 ______________________________________________________________________________________ Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits Table 2. Reset Timeout Period Suffix Guide ACTIVE TIMEOUT PERIOD PART NUMBER SUFFIX (_ _) VCC1 NOMINAL VOLTAGE THRESHOLD (V) VCC2 NOMINAL VOLTAGE THRESHOLD (V) TIMEOUT PERIOD SUFFIX MIN [ms] D1 1.1 2.2 LT 4.625 3.075 D2 8.8 17.6 280 MAX [ms] MS 4.375 2.925 D3 140 MR 4.375 2.625 D5 280 560 TZ 3.075 2.313 D6 560 1120 SY 2.925 2.188 D4 1120 2240 RY 2.625 2.188 TW 3.075 1.665 SV 2.925 1.575 RV 2.625 1.575 TI 3.075 1.388 SH 2.925 1.313 RH 2.625 1.313 TG 3.075 1.110 SF 2.925 1.050 RF 2.625 1.050 TE 3.075 0.833 SD 2.925 0.788 RD 2.625 0.788 ZW 2.313 1.665 YV 2.188 1.575 ZI 2.313 1.388 YH 2.188 1.313 ZG 2.313 1.110 YF 2.188 1.050 ZE 2.313 0.833 YD 2.188 0.788 WI 1.665 1.388 VH 1.575 1.313 WG 1.665 1.110 VF 1.575 1.050 WE 1.665 0.833 VD 1.575 0.788 MAX6715–MAX6729 Table 1. Reset Voltage Threshold Suffix Guide** **Standard versions are shown in bold and are available in a D3 timeout option only. Standard versions require 2,500 piece order increments and are typically held in sample stock. There is a 10,000 order increment on nonstandard versions. Other threshold voltages may be available, contact factory for availability. ______________________________________________________________________________________ 15 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits MAX6715–MAX6729 Pin Configurations TOP VIEW RST1 1 GND 2 MAX6715/ MAX6716 MR 3 6 VCC1 RST 1 5 RST2 GND 2 4 VCC2 MR 3 SOT23 VCC1 MAX6717/ MAX6718 MAX6721/ MAX6722 MR 3 6 VCC1 RST 1 5 WDI GND 2 4 VCC2 WDI 3 SOT23 MAX6719/ MAX6720 GND 2 VCC2 4 MR 3 MAX6723/ MAX6724 6 VCC1 5 RSTIN 4 VCC2 RST 1 GND 2 1 GND 2 8 VCC1 RST 1 7 RSTIN GND 2 6 VCC2 WDI RST 4 5 MR PFO 4 SOT23 5 RSTIN 4 VCC2 WDI 3 RST 4 SOT23 3 WDI VCC1 MAX6725/ MAX6726 SOT23 RST 6 SOT23 MAX6727 16 RST 1 SOT23 RST 1 GND 2 5 3 MAX6728/ MAX6729 8 VCC1 7 PFI 6 VCC2 5 MR SOT23 ______________________________________________________________________________________ 8 VCC1 7 RSTIN 6 VCC2 5 MR Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits SOT-23 5L .EPS PACKAGE OUTLINE, SOT-23, 5L 21-0057 E 1 1 ______________________________________________________________________________________ 17 MAX6715–MAX6729 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 6LSOT.EPS MAX6715–MAX6729 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits PACKAGE OUTLINE, SOT 6L BODY 21-0058 18 ______________________________________________________________________________________ G 1 1 Dual/Triple Ultra-Low-Voltage SOT23 µP Supervisory Circuits CL E MIN MAX A A1 A2 0.90 0.00 0.90 1.45 0.15 1.30 b 0.28 0.45 C D E 0.09 2.80 2.60 0.20 3.00 3.00 SYMBOL e CL CL E1 E1 1.50 L 0.30 L2 e PIN 1 I.D. DOT (SEE NOTE 6) SOT23, 8L .EPS SEE DETAIL "A" b 1.75 0.60 0.25 BSC. 0.65 BSC. 1.95 REF. 0∞ 8∞ e1 0 e1 D C CL L2 A A2 GAUGE PLANE A1 SEATING PLANE C 0 L NOTE: 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF HEEL OF THE LEAD PARALLEL TO SEATING PLANE C. 3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR. 4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING. DETAIL "A" 5. COPLANARITY 4 MILS. MAX. 6. PIN 1 I.D. DOT IS 0.3 MM ÿ MIN. LOCATED ABOVE PIN 1. 7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP. 8. MEETS JEDEC MO178. PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, SOT-23, 8L BODY APPROVAL DOCUMENT CONTROL NO. 21-0078 REV. D 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc. MAX6715–MAX6729 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)