Preliminary Revised October 2001 FSLV34X245 32-Bit Bus Switch (Preliminary) General Description Features The Fairchild Switch FSLV34X245 provides 32-bits of highspeed CMOS bus switching in a standard 245 pin-out. The low On Resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. ■ 5Ω switch connection between two ports The device is organized as an 32-bit switch. When OE is LOW, the switch is ON and Port A is connected to Port B. When OE is HIGH, the switch is OPEN and a High-Impedance state exists between the two ports. ■ Low Power-Off leakage currents ■ Minimal propagation delay through the switch ■ Low lCC ■ Zero bounce in flow-through mode ■ 32-bit version of FSLV3245 ■ Packaged in “slim line” 80-lead package Ordering Code: Order Number Package Number FSLV34X245QSP MQA80A Package Description 80-Lead, QVSOP, JEDEC MO-154, 0.150" Wide Connection Diagram Logic Diagram Pin Descriptions Pin Name Description OE Bus Switch Enable A Bus A B Bus B NC No Connect Truth Table © 2001 Fairchild Semiconductor Corporation DS500018 Input OE Function L Connect H Disconnect www.fairchildsemi.com FSLV34X245 32-Bit Bus Switch (Preliminary) October 2001 FSLV34X245 Preliminary Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 3) Supply Voltage (VCC ) −0.5V to +4.6V DC Switch Voltage (VS) −0.5V to +4.6V Power Supply Operating (VCC) DC Input Voltage (VIN) (Note 2) −0.5V to +4.6V Control Input Voltage 0V to 3.6V Switch Input Voltage 0V to 3.6V Output Voltage (VOUT) 0V to 3.6V DC Input Diode Current (lIK) VIN < 0V −50 mA DC Output (IOUT ) Sink Current 128 mA +/− 100 mA DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) 3.0V to 3.6V Input Rise and Fall Time (tr, tf) −65°C to +150 °C Switch Control Input 0 ns/V to 4 ns/V Switch I/O 0 ns/V to DC Free Air Operating Temperature (TA) −40 °C to +85 °C Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter VIK Clamp Diode Voltage VIH HIGH Level Input Voltage VIL II LOW Level Input Voltage Input Leakage Current VCC (V) TA = −40 °C to +85 °C Min Typ (Note 4) 3.0 2.7 - 3.6 2.0 2.3 - 2.7 1.7 Max Units −1.2 V Conditions IIN = −18 mA V 2.7 - 3.6 0.8 2.3 - 2.7 0.7 3.6 ±1.0 µA 0 ≤ VIN ≤ 3.6V 0 10 µA VIN = 3.6V 0 ±10.0 µA 0 ≤ A, B ≤ VCC ±1 µA 0.0V ≤ A, B ≤ 3.6V 7 Ω VIN = 0V, IIN = 64 mA V IOFF OFF-STATE Leakage Current IOZ OFF-STATE Leakage 3.6 RON Switch On Resistance 3.0 (Note 5) 3.0 5 7 Ω VIN = 0V, IIN = 30 mA 3.0 10 15 Ω VIN = 2.4V, IIN = 15 mA 20 Ω VIN = 3.0V, IIN = 15 mA 5 3.0 2.3 5 8 Ω VIN = 0.0V, IIN = 64 mA 2.3 5 8 Ω VIN = 0.0V, IIN = 30 mA 2.3 10 15 Ω VIN = 1.7V, IIN = 15 mA 2.3 20 Ω VIN = 2.3V, IIN = 15 mA ICC Quiescent Supply Current 3.6 3 µA VIN = VCC or GND, IOUT = 0 ∆ ICC Increase in ICC per Input 3.6 300 µA One Input at 3.0V Other Inputs at VCC or GND Note 4: Typical values are at VCC = 3.3V and T A = +25°C Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B) pins. www.fairchildsemi.com 2 Preliminary TA = −40°C to +85°C RU = RD = 500Ω Symbol Parameter VCC = 3.3 ± 3.0V VCC = 2.5V ± 0.2V CL = 50 pF CL = 30 pF Min tPHL, tPLH Propagation Delay Bus to Bus (Note 6) tPZH, tPZL Output Enable Time Max Min 4.5 Figure Number Conditions Max 0.25 1.0 Units 1.0 0.15 ns 4.8 ns VI = OPEN Figures 1, 2 VCC = 3.3V, VI = 6V for tPZL VI = GND for tPZH VCC = 2.5V, VI = 2 x VCC for tPZL Figures 1, 2 VI = GND for tPZH tPHZ, tPLZ Output Disable Time 1.0 4.5 1.0 4.8 ns VCC = 3.3V, VI = 6V for tPLZ VI = GND for tPHZ VCC = 2.5V, VI = 2 x VCC for tPLZ Figures 1, 2 VI = GND for tPHZ Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance). Capacitance Symbol (Note 7) Parameter Typ Max Units Conditions CIN Control Pin Input Capacitance 3 6 pF VCC = 3.3V CI/O OFF Input/Output Capacitance “OFF - State” 7 14 pF VCC, OE = 3.3V Note 7: TA = +25°C, f = 1 Mhz, Capacitance is characterized but not tested. 3 www.fairchildsemi.com FSLV34X245 AC Electrical Characteristics FSLV34X245 Preliminary AC Loading and Waveforms Note: CL includes load and stray capacitance Note: Input PRR = 1.0 MHz, tW = 500 ns Test Switch tPD Open tPLZ/tPZL VI tPHZ/tPZH GND FIGURE 1. AC Test Circuit VCC Symbol 3.3V ± 0.3V 2.5V ± 0.2V VMI 1.5V VCC/2 VMO 1.5V VCC/2 VMVO 0.3V 0.15V VI 6.0V 2 x VCC VCCV 3.0 VCC tr/tf 2 ns 2.5 ns FIGURE 2. AC Waveforms www.fairchildsemi.com 4 Preliminary FSLV34X245 32-Bit Bus Switch (Preliminary) Physical Dimensions inches (millimeters) unless otherwise noted 80-Lead, QVSOP, JEDEC MO-154, 0.150" Wide Package Number MQA80A Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com