TI1 LP5990 Micropower 200ma cmos low dropout voltage regulator Datasheet

LP5990
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SNVS438B – APRIL 2007 – REVISED DECEMBER 2007
LP5990 Micropower 200mA CMOS Low Dropout Voltage Regulator
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FEATURES
1
•
•
•
2
•
•
•
•
•
•
Operation from 2.2V to 5.5V input
±1% accuracy over temp range
Output voltage from 0.8V to 3.6V in 50mV
increments
30 μA Quiescent current (enabled)
10nA Quiescent current (disabled)
160mV dropout at 200mA load
60 μVRMSOutput voltage noise
60 μs start-up time
500μs shut-down time
•
•
•
•
PSRR 55 dB at 10 kHz
Stable with 0402 1.0µF ceramic capacitors
Logic controlled enable
Thermal–overload and short–circuit protection
APPLICATIONS
•
•
Cellular phones
Hand–held information appliances
DESCRIPTION
The LP5990 regulator is designed to meet the requirements of portable, battery-powered systems providing an
accurate output voltage, low noise and low quiescent current.
The LP5990 will provide a 1.8V output from a low input voltage of 2.2V and can provide 200mA to an external
load.
When switched into shutdown mode via a logic signal at the enable pin, the power consumption is reduced to
virtually
zero.
Fast shut-down is achieved by the push pull architecture.
The LP5990 is designed to be stable with space saving 0402 ceramic capacitors as small as 1µF, this gives an
overall solution size of < 2.5mm 2.
Performance is specified for a -40°C to 125°C junction temperature range.
The device is available in micro SMD Package (0.4mm pitch) and is available with
1.2V,1.3V,1.8V,2.8V,3.0V,3.3V and 3.6V outputs.Lower voltage options down to 0.8V are available on request.
For all other output voltage options please contact your local NSC sales office.
Package
4-Bump micro SMD,0.4mm pitch
(lead free)
866 µm x 917 µm
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
LP5990
SNVS438B – APRIL 2007 – REVISED DECEMBER 2007
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Typical Application Circuit
VIN
VIN
VOUT
VOUT
1.0 µF
CIN
LP5990
1.0 µF
COUT
VEN
VEN
GND
Capacitor Case
Size = 0402
GND
Connection Diagrams
Figure 1. 4-Bump Thin micro SMD Package, 0.4mm pitch
NS Package Number TMD04
VIN
VEN
VEN
VIN
B2
A2
A2
B2
X
B1
A1
GND
VOUT
Bottom View
A1
GND
B1
VOUT
Top View
Top Marking
The actual physical placement of the package marking will vary from part to part.
Pin Functions
Pin Descriptions
Pin No.
Symbol
Name and Function
micro SMD
A2
VEN
Enable input; disables the regulator when ≤ 0.35V. Enables the regulator when ≥ 1.0V.
A1
GND
Common ground.
B1
VOUT
Output voltage. A 1.0 μF Low ESR capacitor should be connected to this Pin. Connect
this output to the load circuit.
B2
VIN
Input voltage supply. A 1.0 µF capacitor should be connected at this input.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Absolute Maximum Ratings
(1) (2)
VIN Pin: Input Voltage
-0.3 to 6.0V
VOUT Pin: Output Voltage
-0.3 to (VIN + 0.3V) to 6.0V (max)
VEN Pin: Enable Input Voltage
Continuous Power Dissipation
-0.3 to 6.0V (max)
(3)
Internally Limited
Junction Temperature (TJMAX)
150°C
Storage Temperature Range
-65 to 150°C
Maximum Lead Temperature (Soldering, 10 sec.)
ESD Rating
260°C
(4)
Human Body Model
2 kV
Machine Model
(1)
200V
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed
performance limits and associated test conditions, see the Electrical Characteristics tables.
All voltages are with respect to the potential at the GND pin.
Internal thermal shutdown circuitry protects the device from permanent damage.
The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin. MIL-STD-883 3015.7
(2)
(3)
(4)
Operating Ratings
(1)
,
(2)
VIN: Input Voltage Range
2.2V to 5.5V
VEN: Enable Voltage Range
0 to 5.5V (max)
Recommended Load Current
0 to 200 mA
(3)
Junction Temperature Range (TJ)
-40°C to +125°C
Ambient Temperature Range (TA)
-40°C to +85°C
(3)
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed
performance limits and associated test conditions, see the Electrical Characteristics tables.
All voltages are with respect to the potential at the GND pin.
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). See applications section.
(2)
(3)
Thermal Properties
Junction to Ambient Thermal Resistance θJA (1)
JEDEC Board (microSMD)
(2)
100.6°C/W
4L Cellphone Board (microSMD)
(1)
(2)
174.8°C/W
Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power
dissipation exists, special care must be paid to thermal dissipation issues in board design.
Detailed description of the board can be found in JESD51-7
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LP5990
SNVS438B – APRIL 2007 – REVISED DECEMBER 2007
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Electrical Characteristics
Limits in standard typeface are for TA = 25°C. Limits in boldface type apply over the full operating junction temperature range
(-40°C ≤ TJ ≤ +125°C). Unless otherwise noted, specifications apply to the LP5990 Typical Application Circuit (pg. 1) with: VIN
= VOUT (NOM) + 1.0V, or 2.2V, whichever is higher. VEN = 1.0V, CIN = COUT = 1.0 μF, IOUT = 1.0 mA. (1), (2)
Symbol
Parameter
Conditions
VIN
Input Voltage
ΔVOUT
Output Voltage Tolerance
VIN = (VOUT(NOM) + 1.0V) to 5.5V
Line Regulation
VIN = (VOUT(NOM) + 1.0V) to 5.5V, IOUT = 1
mA
Load Regulation
IOUT = 1 mA to 200 mA
ILOAD
Quiescent Current
(4)
V
−1
1
%
1
VEN = 1.0V, IOUT = 0 mA
30
VEN = 1.0V, IOUT = 200 mA
35
VEN = <0.35V (Disabled)
0.01
IOUT = 200 mA
160
ISC
Short Circuit Current Limit
PSRR
Power Supply Rejection Ratio
f = 10 kHz, IOUT = 200 mA
55
en
Output Noise Voltage
BW = 10 Hz to 100
kHz, VIN = 4.2V, IOUT =
1 mA
V OUT = 1.8V
60
V OUT = 2.8V
85
TSHUTDOWN
(1)
(2)
(3)
(4)
(5)
(6)
(7)
4
Thermal Shutdown
15
mV
mA
Dropout Voltage (5)
(7)
mV
200
(6)
Units
5.5
VDO
(7)
Max
0
Maximum Output Current
IQ
Typ
2.2
5
(3)
Load Current
Min
600
Temperature
160
Hysteresis
20
75
µA
250
mV
mA
dB
μVRMS
°C
All voltages are with respect to the potential at the GND pin.
Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the
most likely norm.
The device maintains a stable, regulated output voltage without a load current.
Quiescent current is defined here as the difference in current between the input voltage source and the load at VOUT.
Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its
nominal value. This parameter only applies to output voltages above 2.8V.
Short Circuit Current is measured with VOUT pulled to 0V.
This specification is guaranteed by design.
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Electrical Characteristics (continued).
Limits in standard typeface are for TA = 25°C. Limits in boldface type apply over the full operating junction temperature range
(-40°C ≤ TJ ≤ +125°C). Unless otherwise noted, specifications apply to the LP5990 Typical Application Circuit (pg. 1) with: VIN
= VOUT (NOM) + 1.0V, or 2.2V, whichever is higher. VEN = 1.0V, CIN = COUT = 1.0 μF, IOUT = 1.0 mA. (1), (2)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
0.35
V
Enable Input Thresholds
VIL
Low Input Threshold (VEN)
VIN = 2.2V to 5.5V
VIH
High Input Threshold (VEN)
VIN = 2.2V to 5.5V
IEN
Input Current at VEN Pin
VEN = 5.5V and VIN = 5.5V
2
VEN = 0.0V and VIN = 5.5V
0.001
(3)
1.0
V
5
μA
Transient Characteristics
ΔVOUT
Line Transient
Trise = Tfall = 30μs. ΔVIN = 600 mV
Load Transient
IOUT = 1 mA to 200 mA in 1 μs
–50
IOUT = 200 mA to 1 mA in 1 μs
50
(4)
(4)
4
mV
mV
TON
Turn on Time
To 98% of VOUT(NOM)
60
μs
TOFF
Turn off Time from Enable
100mV of V OUT(NOM)I OUT= 0mA
500
μs
(1)
(2)
(3)
(4)
All voltages are with respect to the potential at the GND pin.
Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the
most likely norm.
There is a 3 MΩ resistor between VEN and ground on the device.
This specification is guaranteed by design.
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LP5990
SNVS438B – APRIL 2007 – REVISED DECEMBER 2007
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Output & Input Capacitor, Recommended Specifications (1)
Symbol
Parameter
CIN
Input Capacitance
COUT
Output Capacitance
ESR
Output/Input Capacitance
(1)
6
Conditions
Min
Nom
Capacitance for stability
0.3
1.0
0.3
1.0
5
Max
Units
µF
10
500
mΩ
The minimum capacitance should be greater than 0.3 µF over the full range of operating conditions. The capacitor tolerance should be
30% or better over the full temperature range. The full range of operating conditions for the capacitor in the application should be
considered during device selection to ensure this minimum capacitance specification is met. X7R capacitors are recommended however
capacitor types X5R, Y5V and Z5U may be used with consideration of the application and conditions.
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Typical Performance Characteristics.
Unless otherwise specified,CIN = COUT = 1.0µF, VIN = VOUT(NOM) + 1.0V, VEN = 1.0V, IOUT = 1mA , T A = 25°C.
Output Voltage Change vs Temperature
Ground Current vs Load Current
Ground Current vs V IN.I LOAD= 1mA
Ground Current vs VIN. I LOAD = 200mA
Dropout Voltage
Load Transient Response VOUT = 2.8V
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LP5990
SNVS438B – APRIL 2007 – REVISED DECEMBER 2007
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Typical Performance Characteristics (continued).
Unless otherwise specified,CIN = COUT = 1.0µF, VIN = VOUT(NOM) + 1.0V, VEN = 1.0V, IOUT = 1mA , T A = 25°C.
8
Load Transient Response. VOUT = 2.8V
Short Circuit Current
Line Transient Response
Line Transient Response
Start-up Time
Shutdown Characteristics
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Typical Performance Characteristics (continued).
Unless otherwise specified,CIN = COUT = 1.0µF, VIN = VOUT(NOM) + 1.0V, VEN = 1.0V, IOUT = 1mA , T A = 25°C.
Power Supply Rejection ratio
Output Noise Density
Application Hints
POWER DISSIPATION AND DEVICE OPERATION
The permissible power dissipation for any package is a measure of the capability of the device to pass heat from
the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus the power
dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces
between the die and ambient air. As stated in (1) of the electrical characteristics, the allowable power dissipation
for the device in a given package can be calculated using the equation:
(TJMAX - TA)
PD =
TJA
(1)
The actual power dissipation across the device can be represented by the following equation:
PD = (VIN – VOUT) x IOUT
(2)
This establishes the relationship between the power dissipation allowed due to thermal consideration, the voltage
drop across the device, and the continuous current capability of the device. These two equations should be used
to determine the optimum operating conditions for the device in the application.
EXTERNAL CAPACITORS
Like any low-dropout regulator, the LP5990 requires external capacitors for regulator stability. The LP5990 is
specifically designed for portable applications requiring minimum board space and smallest components. These
capacitors must be correctly selected for good performance.
INPUT CAPACITOR
An input capacitor is required for stability. The input capacitor should be at least equal to or greater than the
output capacitor. It is recommended that a 1.0 µF capacitor be connected between the LP5990 input pin and
ground.
This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean
analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input.
(1)
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP =
125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the
part/package in the application (θJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX). See applications section.
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LP5990
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Important: To ensure stable operation it is essential that good PCB practices are employed to minimize ground
impedance and keep input inductance low. If these conditions cannot be met, or if long leads are to be used to
connect the battery or other power source to the LP5990, then it is recommended to increase the input capacitor
to at least 2.2µF. Also, tantalum capacitors can suffer catastrophic failures due to surge current when connected
to a low-impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at
the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application.
There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and
temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain
0.3 μF over the entire operating temperature range.
OUTPUT CAPACITOR
The LP5990 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor
(dielectric types X5R or X7R) 1.0 μF, and with ESR between 5 mΩ to 500 mΩ, is suitable in the LP5990
application circuit.
Other ceramic capacitors such as Y5V and Z5U are less suitable owing to their inferior temperature
characteristics. (See section in Capacitor Characteristics).
For this device the output capacitor should be connected between the VOUT pin and a good ground connection
and should be mounted within 1 cm of the device.
It may also be possible to use tantalum or film capacitors at the device output, VOUT, but these are not as
attractive for reasons of size and cost (see the section Capacitor Characteristics).
The output capacitor must meet the requirement for the minimum value of capacitance (0.3μF) and have an ESR
value that is within the range 5 mΩ to 500 mΩ for stability.
CAPACITOR CHARACTERISTICS
The LP5990 is designed to work with ceramic capacitors on the input and output to take advantage of the
benefits they offer. For capacitance values in the range of 1.0 μF to 4.7 μF, ceramic capacitors are the smallest,
least expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise.
The ESR of a typical 1.0 μF ceramic capacitor is in the range of 20 mΩ to 40 mΩ, which easily meets the ESR
requirement for stability for the LP5990
For both input and output capacitors careful interpretation of the capacitor specification is required to ensure
correct device operation. The capacitor value can change greatly depending on the conditions of operation and
capacitor type.
In particular the output capacitor selection should take account of all the capacitor parameters to ensure that the
specification is met within the application.Capacitance value can vary with DC bias conditions as well as
temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging.
The capacitor parameters are also dependant on particular case size with smaller sizes giving poorer
performance figures in general. As an example Figure 2 shows a typical graph showing a comparison of
capacitor case sizes in a Capacitance versus DC Bias plot. As shown in the graph, as a result of the DC Bias
condition, the capacitance value may drop below the minimum capacitance value given in the recommended
capacitor table (0.3µF in this case). Note that the graph shows the capacitance out of spec for the 0402 case
size capacitor at higher bias voltages. It is therefore recommend that the capacitor manufacturer's specifications
for the nominal value capacitor are consulted for all conditions as some capacitors may not be suited in the
application.
The temperature performance of ceramic capacitors varies by type and manufacturer. Most large value ceramic
capacitors (≥2.2 µF) are manufactured with Z5U or Y5V temperature characteristics, which results in the
capacitance dropping by more than 50% as the temperature goes from 25°C to 85°C.
A better choice for temperature coefficient in a ceramic capacitor is X7R. This type of capacitor is the most stable
and holds the capacitance within ±15% over the temperature range. Tantalum capacitors are less desirable than
ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance
and voltage ratings in the 0.47 μF to 4.7 μF range.
10
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CAP VALUE (% OF NOM. 1 µF)
Another important consideration is that tantalum capacitors have higher ESR values than equivalent size
ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the
stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic
capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about
2:1 as the temperature goes from 25°C down to −40°C, so some guard band must be allowed.
0603, 10V, X5R
100%
80%
60%
0402, 6.3V, X5R
40%
20%
_0
1.0
3.0
_
DC Bias (V)
2.0_
4.0
_
5.0
_
Figure 2.
NO-LOAD STABILITY
The LP5990 will remain stable and in regulation with no external load.
ENABLE CONTROL
The LP5990 may be switched ON or OFF by a logic input at the ENABLE pin, VEN . A high voltage at this pin will
turn the device on. When the enable pin is low, the regulator output is off and the device typically consumes 3
nA. If the application does not require the shutdown feature, the VEN pin should be tied to VIN to keep the
regulator output permanently on.
The signal source used to drive the VEN input must be able to swing above and below the specified turn-on/off
voltage thresholds listed in the Electrical Characteristics section under VIL and VIH.
micro SMD MOUNTING
The micro SMD package requires specific mounting techniques, which are detailed in National Semiconductor
Application Note AN-1112.
For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the
micro SMD device.
micro SMD LIGHT SENSITIVITY
Exposing the micro SMD device to direct light may cause incorrect operation of the device. Light sources such as
halogen lamps can affect electrical performance if they are situated in proximity to the device.
Light with wavelengths in the red and infra-red part of the spectrum have the most detrimental effect thus the
fluorescent lighting used inside most buildings has very little effect on performance.
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PACKAGE OPTION ADDENDUM
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17-Nov-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Samples
(3)
(Requires Login)
LP5990TM-1.2/NOPB
ACTIVE
DSBGA
YFQ
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TM-1.3/NOPB
ACTIVE
DSBGA
YFQ
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TM-1.8/NOPB
ACTIVE
DSBGA
YFQ
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TM-2.8/NOPB
ACTIVE
DSBGA
YFQ
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TM-3.0/NOPB
ACTIVE
DSBGA
YFQ
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TM-3.3/NOPB
ACTIVE
DSBGA
YFQ
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TM-3.6/NOPB
ACTIVE
DSBGA
YFQ
4
250
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TMX-1.2/NOPB
ACTIVE
DSBGA
YFQ
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TMX-1.3/NOPB
ACTIVE
DSBGA
YFQ
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TMX-1.8/NOPB
ACTIVE
DSBGA
YFQ
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TMX-2.8/NOPB
ACTIVE
DSBGA
YFQ
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TMX-3.0/NOPB
ACTIVE
DSBGA
YFQ
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TMX-3.3/NOPB
ACTIVE
DSBGA
YFQ
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
LP5990TMX-3.6/NOPB
ACTIVE
DSBGA
YFQ
4
3000
Green (RoHS
& no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
17-Nov-2012
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Nov-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
LP5990TM-1.2/NOPB
DSBGA
YFQ
4
250
178.0
8.4
LP5990TM-1.3/NOPB
DSBGA
YFQ
4
250
178.0
LP5990TM-1.8/NOPB
DSBGA
YFQ
4
250
178.0
LP5990TM-2.8/NOPB
DSBGA
YFQ
4
250
LP5990TM-3.0/NOPB
DSBGA
YFQ
4
LP5990TM-3.3/NOPB
DSBGA
YFQ
LP5990TM-3.6/NOPB
DSBGA
YFQ
LP5990TMX-1.2/NOPB
DSBGA
LP5990TMX-1.3/NOPB
LP5990TMX-1.8/NOPB
0.92
0.99
0.7
4.0
8.0
Q1
8.4
0.92
0.99
0.7
4.0
8.0
Q1
8.4
0.92
0.99
0.7
4.0
8.0
Q1
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
250
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
4
250
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
4
250
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
YFQ
4
3000
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
DSBGA
YFQ
4
3000
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
DSBGA
YFQ
4
3000
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
LP5990TMX-2.8/NOPB
DSBGA
YFQ
4
3000
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
LP5990TMX-3.0/NOPB
DSBGA
YFQ
4
3000
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
LP5990TMX-3.3/NOPB
DSBGA
YFQ
4
3000
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
LP5990TMX-3.6/NOPB
DSBGA
YFQ
4
3000
178.0
8.4
0.92
0.99
0.7
4.0
8.0
Q1
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Nov-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LP5990TM-1.2/NOPB
DSBGA
YFQ
4
250
203.0
190.0
41.0
LP5990TM-1.3/NOPB
DSBGA
YFQ
4
250
203.0
190.0
41.0
LP5990TM-1.8/NOPB
DSBGA
YFQ
4
250
203.0
190.0
41.0
LP5990TM-2.8/NOPB
DSBGA
YFQ
4
250
203.0
190.0
41.0
LP5990TM-3.0/NOPB
DSBGA
YFQ
4
250
203.0
190.0
41.0
LP5990TM-3.3/NOPB
DSBGA
YFQ
4
250
203.0
190.0
41.0
LP5990TM-3.6/NOPB
DSBGA
YFQ
4
250
203.0
190.0
41.0
LP5990TMX-1.2/NOPB
DSBGA
YFQ
4
3000
206.0
191.0
90.0
LP5990TMX-1.3/NOPB
DSBGA
YFQ
4
3000
206.0
191.0
90.0
LP5990TMX-1.8/NOPB
DSBGA
YFQ
4
3000
206.0
191.0
90.0
LP5990TMX-2.8/NOPB
DSBGA
YFQ
4
3000
206.0
191.0
90.0
LP5990TMX-3.0/NOPB
DSBGA
YFQ
4
3000
206.0
191.0
90.0
LP5990TMX-3.3/NOPB
DSBGA
YFQ
4
3000
206.0
191.0
90.0
LP5990TMX-3.6/NOPB
DSBGA
YFQ
4
3000
206.0
191.0
90.0
Pack Materials-Page 2
MECHANICAL DATA
YFQ0004xxx
D
0.600±0.075
E
TMD04XXX (Rev A)
D: Max = 0.956 mm, Min =0.856 mm
E: Max = 0.922 mm, Min =0.822 mm
4215073/A
NOTES:
A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
www.ti.com
12/12
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Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
National Semiconductor (TI):
LP5990UMX-1.8/NOPB LP5990UMX-2.5/NOPB
Texas Instruments:
LP5990TM-1.8EV LP5990TM-2.8EV LP5990TMX-1.2/NOPB LP5990TMX-1.3/NOPB LP5990TMX-1.8/NOPB
LP5990TMX-2.8/NOPB LP5990TMX-3.0/NOPB LP5990TMX-3.3/NOPB LP5990TMX-3.6/NOPB