CY62136V MoBL® 2-Mbit (128K x 16) Static RAM This is ideal for providing More Battery Life™ (MoBL®) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE HIGH). The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). Features • High speed — 55 ns • Temperature Ranges — Industrial: –40°C to 85°C — Automotive: –40°C to 125°C • Wide voltage range — 2.7V – 3.6V Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16). • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected • CMOS for optimum speed/power • Available in a Pb-free and non Pb-free 44-pin TSOP Type II (forward pinout) and 48-ball FBGA packages Functional Description[1] The CY62136V is a high-performance CMOS static RAM organized as 128K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the Truth Table at the back of this data sheet for a complete description of read and write modes. Logic Block Diagram SENSE AMPS ROW DECODER DATA IN DRIVERS A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 128K x 16 RAM Array I/O0 – I/O7 I/O8 – I/O15 BHE WE CE OE BLE A14 A15 A16 A12 A13 A11 COLUMN DECODER Note: 1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05087 Rev. *D • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised July 19, 2006 CY62136V MoBL® Product Portfolio Power Dissipation (Industrial) VCC Range (V) Product CY62136VLL Min. 2.7 [2] Typ. 3.0 Operating, ICC (mA) Standby, ISB2 (µA) Maximum Typ.[2] Maximum 7 20 1 15 Industrial 7 15 1 15 Automotive 7 20 1 20 Max. Speed Grades Typ. 3.6 55 Industrial 70 [2] Pin Configurations[3, 4 ] TSOP II (Forward) Top View A4 A3 A2 A1 A0 CE I/O 0 I/O 1 I/O 2 I/O 3 VCC VSS I/O 4 I/O 5 I/O 6 I/O 7 WE A 16 A 15 A 14 A 13 A12 1 44 2 3 43 42 4 41 40 39 38 5 6 7 8 9 10 11 12 37 36 35 34 33 32 31 30 29 28 27 13 14 15 16 17 18 19 20 21 22 26 25 24 23 A5 A6 A7 OE BHE BLE I/O 15 I/O 14 I/O 13 I/O 12 VSS VCC I/O 11 I/O 10 I/O 9 I/O 8 NC A8 A9 A 10 A 11 NC 48-ball FBGA Top View 1 2 3 4 5 6 BLE OE A0 A1 A2 NC A I/O8 BHE A3 A4 CE I/O0 B I/O9 I/O10 A5 A6 I/O1 I/O2 C VSS I/O11 NC A7 I/O3 Vccq D VCC I/O12 DNU A16 I/O4 Vssq E I/O14 I/O13 A14 A15 I/O5 I/O6 F I/O15 NC A12 A13 WE I/O7 G NC A8 A9 A10 A11 NC H Notes: 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC Typ, TA = 25°C. 3. NC pins are not connected on the die. 4. E3 (DNU) pin have to be left floating or tied to VSS to ensure proper operation. Document #: 38-05087 Rev. *D Page 2 of 13 CY62136V MoBL® Pin Definitions Pin Number 1–5, 18–22, 24–27, 42–45 Type Input Description A0–A16. Address Inputs 7–10, 13–16, 29–32, 35–38 Input/Output I/O0–I/O15. Data lines. Used as input or output lines depending on operation 23 No Connect NC. This pin is not connected to the die 17 Input/Control WE. When selected LOW, a WRITE is conducted. When selected HIGH, a READ is conducted 6 Input/Control CE. When LOW, selects the chip. When HIGH, deselects the chip 40, 39 Input/Control BHE, BLE. BHE = LOW selects higher order byte WRITEs or READs on the SRAM BLE = LOW selects lower order byte WRITEs or READs on the SRAM 41 Input/Control OE. Output Enable. Controls the direction of the I/O pins. When LOW, the I/O pins behave as outputs. When deasserted HIGH, I/O pins are Tri-stated, and act as input data pins 12, 34 Ground 11, 33 Power Supply VCC. Power supply for the device Document #: 38-05087 Rev. *D VSS. Ground for the device Page 3 of 13 CY62136V MoBL® Maximum Ratings Output Current into Outputs (LOW)............................ 20 mA (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Static Discharge Voltage........................................... > 2001V (per MIL-STD-883, Method 3015) Latch-up Current..................................................... > 200 mA Operating Range Supply Voltage to Ground Potential ............... –0.5V to +4.6V DC Voltage Applied to Outputs in High-Z State[5] ....................................–0.5V to VCC + 0.5V Range Ambient Temperature [TA][7] VCC Industrial −40°C to +85°C 2.7V to 3.6V Automotive −40°C to +125°C DC Input Voltage[5] .................................–0.5V to VCC + 0.5V Electrical Characteristics Over the Operating Range CY62136V-55 Parameter Description VOH Output HIGH Voltage IOH = −1.0 mA VCC = 2.7V VOL Output LOW Voltage IOL = 2.1 mA VCC = 2.7V VIH Input HIGH Voltage VCC = 3.6V 2.2 VIL Input LOW Voltage VCC = 2.7V –0.5 0.8 IIX Input Leakage Current GND < VI < VCC –1 +1 2.4 2.4 ICC Output Leakage Current Industrial GND < VO < VCC, Output Disabled VCC Operating Supply f = fMax = 1/tRC, Current f = 1 MHz, V 0.4 VCC + 2.2 0.5V Automotive IOZ CY62136V-70 Min. Typ.[2] Max. Min. Typ.[2] Max. Unit Test Conditions Industrial –1 +1 Automotive VCC = 3.6V, Industrial IOUT = 0 mA, Automotive CMOS Levels ISB1 Automatic CE CE > VCC−0.3V, Power-down Current— VIN > VCC−0.3V or VIN < 0.3V, f = fMax CMOS Inputs ISB2 Automatic CE CE > VCC−0.3V VCC = 3.6V Industrial Power-down Current— VIN > VCC−0.3V or Automotive CMOS Inputs VIN < 0.3V, f = 0 7 –0.5 VCC + 0.5V V 0.8 V –1 +1 µA +10 µA –1 +1 µA –10 +10 µA 7 15 mA 7 20 mA 1 2 mA 100 µA 1 15 µA 1 20 2 100 1 V –10 20 1 0.4 15 Capacitance[6] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions Max. Unit 6 pF 8 pF TA = 25°C, f = 1 MHz, VCC = VCC(typ) Thermal Resistance[6] Parameter Description ΘJA Thermal Resistance (Junction to Ambient) ΘJC Thermal Resistance (Junction to Case) Test Conditions FBGA TSOPII Unit Still Air, soldered on a 4.25 x 1.125 inch, 2-layer printed circuit board 41.17 60 °C/W 11.74 22 °C/W Notes: 5. VIL(min) = –2.0V for pulse durations less than 20 ns. 6. Tested initially and after any design or process changes that may affect these parameters. 7. TA is the “Instant-On” case temperature. Document #: 38-05087 Rev. *D Page 4 of 13 CY62136V MoBL® AC Test Loads and Waveforms R1 R1 ALL INPUT PULSES VCC VCC VCC Typ OUTPUT OUTPUT R2 30 pF GND R2 5 pF Rise Time: 1 V/ns INCLUDING JIG AND SCOPE INCLUDING JIG AND SCOPE 90% 10% 90% 10% Fall Time: 1 V/ns (c) (b) (a) Equivalent to: THEVENIN EQUIVALENT RTH OUTPUT V Parameters 3.0V Unit R1 1105 Ohms R2 1550 Ohms RTH 645 Ohms VTH 1.75 Volts Data Retention Characteristics (Over the Operating Range) Parameter Conditions[9] Description Typ.[2] Min. 1.0 Max. Unit 3.6 V 7.5 µA VDR VCC for Data Retention ICCDR Data Retention Current tCDR[6] Chip Deselect to Data Retention Time 0 ns tR[8] Operation Recovery Time 70 ns VCC = 1.0V, CE > VCC − 0.3V, VIN > VCC − 0.3V or VIN < 0.3V, No input may exceed VCC + 0.3V 0.5 Data Retention Waveform DATA RETENTION MODE VCC VCC(min.) tCDR VDR > 1.0 V VCC(min.) tR CE Notes: 8. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 µs or stable at VCC(min) > 100 µs. 9. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to VCC(typ.), and output loading of the specified IOL/IOH and 30 pF load capacitance. Document #: 38-05087 Rev. *D Page 5 of 13 CY62136V MoBL® Switching Characteristics Over the Operating Range [9] 55 ns Parameter Description Min. 70 ns Max. Min. Max. Unit Read Cycle tRC Read Cycle Time 55 tAA Address to Data Valid tOHA Data Hold from Address Change tACE CE LOW to Data Valid 55 70 ns tDOE OE LOW to Data Valid 25 35 ns tLZOE OE LOW to Low-Z[10] 55 10 OE HIGH to tLZCE CE LOW to Low-Z[10] 70 10 ns 25 10 ns ns tHZCE CE HIGH to tPU CE LOW to Power-up tPD CE HIGH to Power-down 55 70 ns tDBE BLE/BHE LOW to Data Valid 25 35 ns Low-Z[10, 11] tLZBE BLE/BHE LOW to tHZBE BLE/BHE HIGH to High-Z[12] Write 25 ns ns 5 25 High-Z[10, 11] ns 10 5 High-Z[10, 11] tHZOE 70 0 25 0 5 ns 5 25 ns ns 25 ns Cycle[12, 13] tWC Write Cycle Time 55 70 ns tSCE CE LOW to Write End 45 60 ns tAW Address Set-up to Write End 45 60 ns tHA Address Hold from Write End 0 0 ns tSA Address Set-up to Write Start 0 0 ns tPWE WE Pulse Width 40 50 ns tBW BLE/BHE LOW to Write End 50 60 ns tSD Data Set-up to Write End 25 30 ns tHD Data Hold from Write End 0 0 ns High-Z[10, 11] tHZWE WE LOW to tLZWE WE HIGH to Low-Z[10] 20 5 25 10 ns ns Notes: 10. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 11. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage. 12. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 13. The minimum write cycle time for write cycle 3 (WE controlled, OE LOW) is the sum of tHZWE and tSD. Document #: 38-05087 Rev. *D Page 6 of 13 CY62136V MoBL® Switching Waveforms Read Cycle No. 1 (Address Transition Controlled)[14, 15] tRC ADDRESS tOHA DATA OUT tAA PREVIOUS DATA VALID DATA VALID Read Cycle No. 2 (OE Controlled)[15, 16] ADDRESS tRC CE tPD tHZCE tACE OE ttLZOE LZOE BHE/BLE tHZOE tDOE tHZBE tDBE tLZBE HIGH IMPEDANCE DATA OUT HIGH IMPEDANCE DATA VALID tLZCE tPU VCC SUPPLY CURRENT ICC 50% 50% ISB Notes: 14. Device is continuously selected. OE, CE = VIL. 15. WE is HIGH for read cycle. 16. Address valid prior to or coincident with CE transition LOW. Document #: 38-05087 Rev. *D Page 7 of 13 CY62136V MoBL® Switching Waveforms (continued) Write Cycle No. 1 (WE Controlled)[12, 17, 18] tWC ADDRESS CE tAW tHA tSA WE tPWE tBW BHE/BLE OE tSD DATA I/O NOTE 19 tHD DATAIN VALID tHZOE Write Cycle No. 2 (CE Controlled)[12, 17, 18] tWC ADDRESS tSCE CE tSA tAW tHA tPWE WE tBW BHE/BLE OE tSD DATA I/O tHD DATAIN VALID NOTE 19 tHZOE Notes: 17. Data I/O is high impedance if OE = VIH 18. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 19. During this period, the I/Os are in output state and input signals should not be applied. Document #: 38-05087 Rev. *D Page 8 of 13 CY62136V MoBL® Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW)[13, 18] tWC ADDRESS CE tAW tHA tBW BHE/BLE tSA WE tSD DATA I/O tHD DATAIN VALID NOTE 19 tLZWE tHZWE Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)[19] tWC ADDRESS CE tAW tHA tBW BHE/BLE tSA WE tSD DATA I/O NOTE 19 tHZWE Document #: 38-05087 Rev. *D tHD DATAIN VALID tLZWE Page 9 of 13 CY62136V MoBL® Typical DC and AC Characteristics Normalized Operating Current vs. Supply Voltage 1.4 Standby Current vs. Supply Voltage 35 MoBL 30 1.2 MoBL 0.8 ICC 25 ISB (µA) 1.0 0.6 20 15 10 0.4 5 0.2 0 0.0 1.7 2.2 2.7 3.2 SUPPLY VOLTAGE (V) 3.7 1.0 2.7 2.8 3.7 1.9 SUPPLY VOLTAGE (V) Access Time vs. Supply Voltage 80 MoBL 70 60 TAA (ns) 50 40 30 20 10 1.0 3.7 2.7 2.8 1.9 SUPPLY VOLTAGE (V) Truth Table CE WE OE BHE BLE H X X X X High-Z Deselect/Power-down Standby (ISB) L H L L L Data Out (I/O0–I/O15) Read Active (ICC) L H L H L High Z (I/O8–I/O15); Data Out (I/O0–I/O7) Read Active (ICC) L H L L H Data Out (I/O8–I/O15); High Z (I/O0–I/O7) Read Active (ICC) L L X L L Data In (I/O0–I/O15) Write Active (ICC) L L X H L High Z (I/O8–I/O15); Data In (I/O0–I/O7) Write Active (ICC) L L X L H Data in (I/O8–I/O15); High Z (I/O0–I/O7) Write Active (ICC) L H L H H High-Z Deselect/Output Disabled Active (ICC) L H H L L High-Z Deselect/Output Disabled Active (ICC) L H H H L High-Z Deselect/Output Disabled Active (ICC) L H H L H High-Z Deselect/Output Disabled Active (ICC) Document #: 38-05087 Rev. *D Inputs/Outputs Mode Power Page 10 of 13 CY62136V MoBL® Ordering Information Speed (ns) 55 Package Diagram Ordering Code CY62136VLL-55BAI 51-85096 48-ball Fine-Pitch Ball Grid Array (7 x 7 x 1.2 mm) CY62136VLL-55ZI 51-85087 44-pin TSOP II CY62136VLL-55ZXI 70 Operating Range Package Type Industrial 44-pin TSOP II (Pb-free) CY62136VLL-70BAI 51-85096 48-ball Fine-Pitch Ball Grid Array (7 x 7 x 1.2 mm) CY62136VLL-70ZI 51-85087 44-pin TSOP II CY62136VLL-70ZXI 44-pin TSOP II (Pb-free) CY62136VLL-70ZSE 44-pin TSOP II CY62136VLL-70ZSXE 44-pin TSOP II (Pb-free) Industrial Automotive Please contact your local Cypress sales representative for availability of these parts Package Diagrams 48-ball FBGA (7 x 7 x 1.2 mm) (51-85096) BOTTOM VIEW TOP VIEW PIN 1 CORNER Ø0.05 M C PIN 1 CORNER (LASER MARK) Ø0.25 M C A B Ø0.30±0.05(48X) 1 2 3 4 5 6 6 4 3 2 1 C C F G D E F 2.625 E 0.75 B 5.25 A B 7.00±0.10 A D 7.00±0.10 5 G H H A A 1.875 0.75 B 7.00±0.10 3.75 7.00±0.10 0.15(4X) 0.10 C 0.21±0.05 0.53±0.05 0.25 C B 51-85096-*F 0.36 SEATING PLANE C Document #: 38-05087 Rev. *D 1.20 MAX. Page 11 of 13 CY62136V MoBL® Package Diagrams (continued) 44-pin TSOP II (51-85087) 51-85087-*A MoBL is a registered trademark, and More Battery Life is a trademark, of Cypress Semiconductor Corporation. All product and company names mentioned in this document are the products of their respective holders. Document #: 38-05087 Rev. *D Page 12 of 13 © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY62136V MoBL® Document History Page Document Title: CY62136V MoBL® 2-Mbit (128K x 16) Static RAM Document Number: 38-05087 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 107347 05/25/01 SZV Changed from Spec #: 38-00728 to 38-05087 *A 116509 09/04/02 GBI Added footnote 1 Added SL power bin Deleted fBGA package; replacement fBGA package available in CY62136CV30 *B 269729 See ECN SYT Added Automotive Information for 70-ns Speed Bin. Added Footnotes # 3 and # 6. Corrected Typo in Electrical Characteristics for ICC(Max)-55 ns from 15 to 20 mA. Added SL row for ISB2 in the Electrical Characteristics table. Changed Package Name from Z44 to ZS44. Replaced ‘Z’ with ‘ZS’ in the Ordering Code. *C 344595 See ECN SYT Added Lead-Free Package on page# 9 Changed Package Name from ZS44 to Z44 for the 44 TSOP II Package Replaced ‘ZS’ with ‘Z’ in the Ordering Code for Industrial *D 486789 See ECN VKN Changed address of Cypress Semiconductor Corporation on Page# 1 from “3901 North First Street” to “198 Champion Court”. Added FBGA Package for Industrial Operating range. Removed SL Power bin. Updated Ordering Information table. Document #: 38-05087 Rev. *D Page 13 of 13