AUIRFR120Z AUIRFU120Z AUTOMOTIVE GRADE Features Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free, RoHS Compliant Automotive Qualified * VDSS RDS(on) Package Type AUIRFU120Z I-Pak AUIRFR120Z D-Pak typ. 150m max. 190m 8.7A ID D D Description Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications. Base part number 100V G S G I-Pak AUIRFU120Z D-Pak AUIRFR120Z G Gate D Drain Standard Pack Form Quantity Tube 75 Tube 75 Tape and Reel Left 3000 S D S Source Orderable Part Number AUIRFU120Z AUIRFR120Z AUIRFR120ZTRL Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified. Symbol Parameter ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 8.7 ID @ TC = 100°C IDM PD @TC = 25°C Continuous Drain Current, VGS @ 10V Pulsed Drain Current Maximum Power Dissipation 6.1 35 35 VGS EAS EAS (Tested) IAR EAR TJ TSTG Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) Single Pulse Avalanche Energy Tested Value Avalanche Current Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Thermal Resistance Symbol RJC RJA RJA Parameter Junction-to-Case Junction-to-Ambient ( PCB Mount) Junction-to-Ambient Max. Units A W 0.23 ± 20 18 20 See Fig.15,16, 12a, 12b W/°C V mJ A mJ -55 to + 175 °C 300 Typ. Max. Units ––– ––– ––– 4.28 50 110 °C/W HEXFET® is a registered trademark of Infineon. *Qualification standards can be found at www.infineon.com 1 2015-10-12 AUIRFR/U120Z Static @ TJ = 25°C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Trans conductance IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. Typ. Max. Units Conditions 100 ––– ––– V VGS = 0V, ID = 250µA ––– 0.084 ––– V/°C Reference to 25°C, ID = 1mA ––– 150 190 m VGS = 10V, ID = 5.2A 2.0 ––– 4.0 V VDS = VGS, ID = 250µA 16 ––– ––– S VDS = 25V, ID = 5.2A ––– ––– 20 VDS = 100 V, VGS = 0V µA ––– ––– 250 VDS = 100V,VGS = 0V,TJ =125°C ––– ––– 200 VGS = 20V nA ––– ––– -200 VGS = -20V Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Qg Qgs Qgd td(on) tr td(off) tf Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time ––– ––– ––– ––– ––– ––– ––– 6.9 1.6 3.1 8.3 26 27 23 10 ––– ––– ––– ––– ––– ––– LD Internal Drain Inductance ––– 4.5 ––– LS Internal Source Inductance ––– 7.5 ––– ––– ––– ––– ––– ––– ––– 310 41 24 150 26 57 ––– ––– ––– ––– ––– ––– Min. Typ. Max. Units ––– ––– 8.7 ––– ––– 35 ––– ––– ––– ––– 24 23 1.3 36 35 Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Output Capacitance Coss Coss Output Capacitance Effective Output Capacitance Coss eff. Diode Characteristics Parameter Continuous Source Current IS (Body Diode) Pulsed Source Current ISM (Body Diode) VSD Diode Forward Voltage Reverse Recovery Time trr Qrr Reverse Recovery Charge ton Forward Turn-On Time ID = 5.2A nC VDS = 80V VGS = 10V VDD = 50V ID = 5.2A ns RG = 53 VGS = 10V Between lead, 6mm (0.25in.) nH from package and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz pF VGS = 0V, VDS = 1.0V ƒ = 1.0MHz VGS = 0V, VDS = 80V ƒ = 1.0MHz VGS = 0V, VDS = 0V to 80V Conditions MOSFET symbol showing the A integral reverse p-n junction diode. V TJ = 25°C,IS = 5.2A,VGS = 0V ns TJ = 25°C ,IF = 5.2A, VDD = 50V nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11) Limited by TJmax , starting TJ = 25°C, L = 1.29mH, RG = 25, IAS = 5.2A, VGS =10V. Part not recommended for use above this value. Pulse width 1.0ms; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population. 100% tested to this value in production. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994 2 2015-10-12 AUIRFR/U120Z 10 100 VGS TOP 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 1 4.5V 0.1 60µs PULSE WIDTH Tj = 25°C 1 10 10 4.5V 1 60µs PULSE WIDTH Tj = 175°C 0.1 0.01 0.1 0 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 0.1 0 100 100 100 100 Fig. 2 Typical Output Characteristics Fig. 1 Typical Output Characteristics 100.0 12 Gfs, Forward Transconductance (S) ID, Drain-to-Source Current ) 10 VDS, Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) T J = 175°C 10.0 1.0 T J = 25°C VDS = 25V 60µs PULSE WIDTH 0.1 4.0 5.0 6.0 7.0 8.0 VGS, Gate-to-Source Voltage (V) Fig. 3 Typical Transfer Characteristics 3 1 T J = 175°C 10 8 T J = 25°C 6 4 2 VDS = 10V 380µs PULSE WIDTH 0 0 2 4 6 8 ID, Drain-to-Source Current (A) Fig. 4 Typical Forward Transconductance Vs. Drain Current 2015-10-12 AUIRFR/U120Z 500 ID= 5.2A VGS, Gate-to-Source Voltage (V) 400 C, Capacitance (pF) 20 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = C gd Coss = Cds + Cgd Ciss 300 200 100 Coss Crss 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 0 1 10 0 100 Fig 5. Typical Capacitance vs. Drain-to-Source Voltage 4 6 8 10 Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 1000 ID, Drain-to-Source Current (A) 100.0 ISD, Reverse Drain Current (A) 2 QG Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) OPERATION IN THIS AREA LIMITED BY R DS (on) 100 10.0 T J = 175°C 1.0 T J = 25°C 10 100µsec 1 VGS = 0V 0.1 0.1 0.0 0.5 1.0 VSD , Source-toDrain Voltage (V) Fig. 7 Typical Source-to-Drain Diode Forward Voltage 4 VDS= 80V VDS= 50V VDS= 20V 1.5 Tc = 25°C Tj = 175°C Single Pulse 1 1msec 10msec 10 100 1000 VDS , Drain-toSource Voltage (V) Fig 8. Maximum Safe Operating Area 2015-10-12 AUIRFR/U120Z 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) 10 ID , Drain Current (A) 8 6 4 2 ID = 5.2A VGS = 10V 2.5 2.0 1.5 1.0 0.5 0 25 50 75 100 125 150 -60 -40 -20 175 0 20 40 60 80 100 120 140 160 180 T J , Junction Temperature (°C) T J , Junction Temperature (°C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10. Normalized On-Resistance Vs. Temperature Thermal Response ( Z thJC ) 10 D = 0.50 1 0.20 0.10 J 0.05 0.1 0.02 0.01 R1 R1 J 1 R2 R2 R3 R3 C 1 2 2 3 C Ri (°C/W) i (sec) 0.33747 0.000053 1.793 0.000125 2.150 0.000474 3 Ci= iRi Ci= iRi Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc SINGLE PULSE ( THERMAL RESPONSE ) 0.01 1E-006 1E-005 0.0001 0.001 0.01 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 2015-10-12 AUIRFR/U120Z 15V + V - DD IAS 20V 0.01 tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp A EAS, Single Pulse Avalanche Energy (mJ) D.U.T RG 80 DRIVER L VDS ID 0.9A 1.2 BOTTOM 5.2A TOP 60 40 20 0 25 50 75 100 125 150 175 Starting T J, Junction Temperature (°C) Fig 12c. Maximum Avalanche Energy vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms 5.0 Id Vgs Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 13a. Gate Charge Waveform VGS(th) Gate threshold Voltage (V) Vds 4.0 ID = 250µA 3.0 2.0 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( °C ) Fig 14. Threshold Voltage Vs. Temperature Fig 13b. Gate Charge Test Circuit 6 2015-10-12 AUIRFR/U120Z 10 Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax Avalanche Current (A) 0.01 0.05 1 0.10 0.1 0.01 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 tav (sec) Fig 15. Typical Avalanche Current Vs.Pulsewidth EAR , Avalanche Energy (mJ) 20 Notes on Repetitive Avalanche Curves , Figures 15, 16: TOP Single Pulse BOTTOM 1% Duty Cycle ID = 5.2A 16 (For further info, see AN-1005 at www.infineon.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as Tjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 12 8 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 4 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) 175 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figures 13) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2T/ [1.3·BV·Zth] Fig 16. Maximum Avalanche Energy Vs. Temperature 7 EAS (AR) = PD (ave)·tav 2015-10-12 AUIRFR/U120Z Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs Fig 18a. Switching Time Test Circuit 8 Fig 18b. Switching Time Waveforms 2015-10-12 AUIRFR/U120Z D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches)) D-Pak (TO-252AA) Part Marking Information Part Number AUFR120Z YWWA IR Logo XX Date Code Y= Year WW= Work Week XX Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 2015-10-12 AUIRFR/U120Z I-Pak (TO-251AA) Package Outline (Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information Part Number AUFU120Z YWWA IR Logo XX Date Code Y= Year WW= Work Week XX Lot Code Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 10 2015-10-12 AUIRFR/U120Z D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches)) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION TRL 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 11 2015-10-12 AUIRFR/U120Z Qualification Information Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model Charged Device Model RoHS Compliant Automotive (per AEC-Q101) Comments: This part number(s) passed Automotive qualification. Infineon’s Industrial and Consumer qualification level is granted by extension of the higher Automotive level. D-Pak MSL1 I-Pak Class M1B (+/- 100V)† AEC-Q101-002 Class H0 (+/- 100V)† AEC-Q101-001 Class C5 (+/- 2000V)† AEC-Q101-005 Yes † Highest passing voltage. Revision History Date 10/12/2015 Comments Updated datasheet with corporate template Corrected ordering table on page 1. Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved. 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