Data Sheet No. PD60182-I
IR2156(S) & (PbF)
BALLAST CONTROL IC
• Programmable dead time
• DC bus under-voltage reset
• Shutdown pin with hysteresis
• Internal 15.6V zener clamp diode on Vcc
• Micropower startup (150µA)
• Latch immunity and ESD protection
• Also available LEAD-FREE (PbF)
Features
•
•
•
•
•
•
Ballast control and half-bridge driver in one IC
Programmable preheat frequency
Programmable preheat time
Internal ignition ramp
Programmable over-current threshold
Programmable run frequency
Packages
Description
The IR2156 incorporates a high voltage half-bridge
gate driver with a programmable oscillator and state
diagram to form a complete ballast control IC. The
IR2156 features include programmable preheat and
run frequencies, programmable preheat time, programmable dead-time, and programmable over-current protection. Comprehensive protection features such as
protection from failure of a lamp to strike,filament failures, as well as an automatic restart function, have
been included in the design. The IR2156 is available in
both 14 lead PDIP and 14 lead SOIC packages.
14 Lead SOIC
(narrow body)
14 Lead PDIP
CFL Application Diagram
R BUS
D RECT1
R SUPPLY
L
L FILTE
R
F1
D BOOT
NC
1
14
VCC
VDC
3
RT
4
RPH
RT
5
RPH
13
IR2156
2
CVCC2 CVCC1
12
11
10
CT
9
7
8
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R
LRES
N
C BOOT
M2
CCP
CS
COM
C CPH
C FILTE
M1
VS
R1
SD
6
CPH
CT C VDC
HO
LO
C ELCAP1
D CP2
VB
CCS
RCS
C SNUB
CRES
C ELCAP1
D CP1
D RECT2
1
IR2156(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
VB
High side floating supply voltage
-0.3
625
VS
High side floating supply offset voltage
VB - 25
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VLO
Low side output voltage
-0.3
VCC + 0.3
IOMAX
Maximum allowable output current (HO, LO)
due to external power transistor miller effect
-500
500
VVDC
VDC pin voltage
-0.3
VCC + 0.3
VCT
CT pin voltage
-0.3
VCC + 0.3
ICPH
CPH pin current
-5
5
IRPH
RPH pin current
-5
5
VRPH
RPH pin voltage
mA
V
VCC + 0.3
mA
-0.3
VCC + 0.3
V
IRT
RT pin current
-5
5
mA
VRT
RT pin voltage
-0.3
VCC + 0.3
VCS
Current sense pin voltage
-0.3
5.5
ICS
Current sense pin current
-5
5
ISD
Shutdown pin current
-5
5
ICC
Supply current (note 1)
-20
20
dV/dt
PD
RthJA
Allowable offset voltage slew rate
-50
50
Package power dissipation @ TA ≤ +25°C
(14 pin PDIP)
—
1.70
PD = (TJMAX-TA)/RthJA
(14 pin SOIC)
—
1.00
(14 pin PDIP)
—
70
(14 pin SOIC)
—
120
Thermal resistance, junction to ambient
TJ
Junction temperature
-55
150
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
Note 1:
2
V
V
mA
V/ns
W
o
C/W
o
C
This IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown
voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source
greater than the VCLAMP specified in the Electrical Characteristics section.
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IR2156(S)&(PbF)
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
Definition
Min.
Max.
VCC - 0.7
VCLAMP
Minimum required VBS voltage for proper HO functionality
5
VCC
VS
Steady state high side floating supply offset voltage
-1
600
VCC
Supply voltage
VCCUV+
VCLAMP
ICC
Supply current
note 2
CT
CT lead capacitance
ISD
Shutdown lead current
ICS
Current sense lead current
-1
1
TJ
Junction temperature
-40
125
ISDLK
SD pin leakage current (@VSD=6V)
—
125
ICSLK
CS pin leakage current (@VCS=3V)
—
25
High side floating supply voltage
V Bs
VBSMIN
Note 2:
220
-1
Units
V
10
mA
—
pF
1
mA
o
C
µA
Enough current should be supplied into the VCC lead to keep the internal 15.6V zener clamp diode on this lead
regulating its voltage, VCLAMP.
Electrical Characteristics
VCC = VBS = VBIAS = 14V +/- 0.25V, VVDC = Open, RT = 39.0kΩ, RPH = 100.0kΩ, CT = 470 pF, VCPH = 0.0V, VCS = 0.0V,
VSD = 0.0V, CLO, HO = 1000pF, TA = 25oC unless otherwise specified.
Symbol Definition
Min.
Typ.
Max.
10.5
11.5
12.5
9.5
10.5
Units Test Conditions
Supply Characteristics
VCCUV+
VCC supply undervoltage positive going
threshold
VCCUV-
VCC supply undervoltage negative going
threshold
VCC supply undervoltage lockout hysteresis
UVLO mode quiescent current
Fault-mode quiescent current
1.5
50
—
2.0
120
200
3.0
200
470
IQCC
Quiescent VCC supply current
—
1.0
1.5
IQCC50K
VCC supply current, f = 50kHz
—
1.0
1.5
VCLAMP
VCC zener clamp voltage
14.5
15.6
16.5
-5
—
—
0
30
—
VUVHYS
IQCCUV
IQCCFLT
8.5
V CC rising from 0V
V
µA
mA
V
VCC falling from 14V
VCC = 11V
SD = 5.1V, or
CS > 1.3V
CT connected toCOM
VCC =14V,RT=15kΩ
RT = 15kΩ
CT = 470 pF
ICC = 5mA
Floating Supply Characteristics
IQBS0
IQBS1
ILK
Quiescent VBS supply current
Quiescent VBS supply current
Offset supply leakage current
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5
50
50
µA
µA
VHO = VS (CT = 0V)
VHO = VB (CT = 14V)
VB = VS = 600V
3
IR2156(S) & (PbF)
Electrical Characteristics
VCC = VBS = VBIAS = 14V +/- 0.25V, VVDC = Open, RT = 39.0kΩ, RPH = 100.0kΩ, CT = 470 pF, VCPH = 0.0V, VCS = 0.0V,
VSD = 0.0V, CLO, HO = 1000pF, TA = 25oC unless otherwise specified.
Symbol Definition
Min.
Typ.
Max.
Units
28
30
32
37.6
40
43.9
KHz
%
Test Conditions
Oscillator, Ballast Control, I/O Characteristics
f osc
Oscillator frequency
kHz
f osc
Oscillator frequency
d
VCT+
VCTVCTFLT
Oscillator duty cycle
Upper CT ramp voltage threshold
Lower CT ramp voltage threshold
Fault-mode CT pin voltage
—
—
—
—
50
8.3
4.8
0
—
—
—
—
mV
tDLO
tDHO
RDT
LO output deadtime
HO output deadtime
Internal deadtime resistor
—
—
—
2.0
2.0
3
—
—
—
usec
usec
KΩ
V
RT=33.0kΩ, VVDC= 5V
VCPH = Open
(Guaranteed by design)
RT=40k, RPH = 100K
CT = 470pF
VCC = 14V
SD > 5.1V or CS >1.3V
only CT CAP should
beconnected to CT
Preheat Characteristics
ICPH
CPH pin charging current
3.6
4.3
5.2
µA
VCPHFLT
Fault-mode CPH pin voltage
—
0
—
mV
SD > 5.1V or CS >1.3V
—
—
0.1
0
—
—
µA
mV
CT = 10V
SD > 5.1V or CS >1.3V
—
—
0.1
0
—
—
µA
mV
CT = 10V
SD > 5.1V or CS >1.3V
VCPH=10V,CT=10V,
VDC=5V
RPH Characteristics
IRPHLK
VRPHFLT
Open circuit RPH pin leakage current
Fault-mode RPH pin voltage
RT Characteristics
IRTLK
VRTFLT
Open circuit RT pin leakage current
Fault-mode RT pin voltage
Protection Characteristics
VSDTH+
VSDHYS
VCSTH
tCS
VCSPW
Rising shutdown pin threshold voltage
Shutdown pin threshold hysteresis
Over-current sense threshold voltage
Over-current sense propogation delay
Over-current sense minimum pulse width
—
—
1.1
—
—
5.1
450
1.25
160
135
RVDC
DC bus sensing resistor
7.5
10
10.3
10.9
—
—
—
—
0
0
110
55
VCPH-VDC CPH to VDC offset voltage
—
—
1.44
—
—
V
mV
V
nsec
nsec
14
kΩ
11.4
V
Delay from CS to LO
VCS pulse amplitude
= VCSTH+100mV
VCPH>12V, VCT=0V
VDC= 7V
VCPH=open,VVDC=0V
Gate Driver Output Characteristics
VOL
VOH
tr
Low-level output voltage
High-level output voltage
Turn-on rise time
tf
Turn-off fall time
4
105
100
150
100
mV
Io = 0
VBIAS - Vo, Io = 0
ns
CLO = CHO =1nF
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IR2156(S)&(PbF)
Block Diagram
Vcc
S1
R
RT
VB
S2
40K
Driver
Logic
R
CT
VTH
RDT
2.5K
HighSide
Driver
Comp 1
Soft
Start
R
T
Q
R
Q
HO
VS
S3
S4
S6
R
RPH
R
ICPH
LowSide
Driver
Schmitt 1
CPH
5.1V
5.1V
S
RVDC
VDC
LO
Fault
Logic
Q
R1
10K
R2 Q
CS
1.3V
Comp 3
SD
5.1V
Comp 2
COM
UnderVoltage
Detect
Lead Assignments & Definitions
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5
IR2156(S) & (PbF)
State Diagram
Power Turned On
UVLO Mode
1
/2-Bridge Off
IQCC ≅ 120µA
CPH = 0V
CT = 0V (Oscillator Off)
CS > 1.3V
(Lamp Removal)
or
SD > 5.1V
or
VCC < 9.5V (UV-)
(Power Turned Off)
VCC > 11.5V (UV+)
and
SD < 5.1V
FAULT Mode
Fault Latch Set
1
/2-Bridge Off
IQCC ≅ 180µA
CPH = 0V
VCC = 15.6V
CT = 0V (Oscillator Off)
VCC < 9.5V
(VCC Fault or Power Down)
or
SD > 5.1V
(Lamp Fault or Lamp Removal)
PREHEAT Mode
1
/2-Bridge oscillating @ f PH
RPH // RT
CPH Charging @ I CPH = 5 µA
CS Enabled @ CPH > 7.5V
RVDC to COM = 12.6kΩ @
CPH > 7.5V
CPH > 10V
(End of PREHEAT Mode)
CS > 1.3V
(Failure to Strike Lamp)
Ignition Ramp
Mode
RPH>Open
fPH ramps to f RUN
CPH charging
CPH > 13V
CS > 1.3V
(Lamp Fault)
RUN Mode
RPH = Open
1/2-Bridge Oscillating @
fRUN
6
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IR2156(S)&(PbF)
Timing Diagrams
Normal operation
VCC
15.6V
UVLO+
UVLO-
VDC
VCC
7.5V
CPH
frun
FREQ
fph
HO
LO
CS
Over-Current Threshold
1.3V
PH
IGN
UVLO
RUN
UVLO
RT
RT
RT
RPH
RPH
RPH
CT
CT
CT
HO
HO
HO
LO
LO
LO
CS
CS
CS
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7
IR2156(S) & (PbF)
Timing Diagrams
Fault condition
VCC
15.6V
UVLO+
UVLO-
VDC
VCC
7.5V
CPH
f run
f ph
FREQ
SD
HO
LO
CS
1.3V
PH
IGN
SD > 5.1V
IGN
PH
FAULT
UVLO
RUN
RT
RT
RT
RPH
RPH
RPH
CT
CT
CT
HO
HO
HO
LO
LO
LO
UVLO
CSTH
CS
8
CS
CS
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IR2156(S)&(PbF)
1600
6
1400
5
1200
4
ICC (mA)
CT (pF)
1000
800
600
3
2
400
1
200
0
0
0
0.5
1
1.5
2
2.5
3
40
80
120
160
DT (µS)
Frequency (KHz)
Graph 1. CT vs Dead Time (IR2156)
Graph 2. ICC vs Frequency (IR2156)
120
200
90
RPH=15K
110
80
Frequency (KHz)
Frequency (KHz)
100
90
80
RPH=30K
70
70
RPH=15K
RPH=30K
60
RPH=100K
50
60
40
50
40
9
10
11
12
VCPH (V)
Graph 3. Frequency vs VCPH (IR2156)
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13
30
0
1
2
3
VDC (V)
Graph 4. Frequency vs VDC (IR2156)
9
IR2156(S) & (PbF)
6
1000000
5
Frequency (Hz)
ICPH (µA)
4
3
2
CT=220pF
100000
CT=470pF
CT=1000pF
CT=2200pF
CT=3300pF
CT=4800pF
10000
CT=6800pF
1
1000
0
0
5
10
4
15
13
22
31
40
RT (kΩ)
VCPH (V)
Graph 6. Frequency vs RT (IR2156)
Graph 5. ICPH vs VCPH (IR2156)
70
2
125oC
60
50
1.5
75oC
IQBS ( A)
IQCC (mA)
40
1
25oC
30
-25oC
20
10
0.5
0
-10
0
8
9
10
11
12
V CC (V)
Graph 7. IQCC vs VCC (IR2156)
UVLO Hysteresis
10
13
0
3
6
9
12
15
V BS (V)
Graph 8. IQBS vs VCC vs Temp(IR2156)
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IR2156(S)&(PbF)
1.5
5
4.5
1.4
RDT (K )
CS+ (V)
4
1.3
1.2
3.5
3
1.1
2.5
2
1
-25
0
25
50
75
100
-25
125
0
Temperature °C
50
75
100
125
Temperature °C
Graph 9. VCSTH+ vs Temperature (IR2156)
Graph 10. RDT vs Temperature (IR2156)
14
15
13
UV+, UV- (V)
14
RVDC (K )
25
13
12
11
12
UV+
11
10
UV-
9
8
10
-25
0
25
50
75
100
Temperature °C
Graph 11. RVDC+ vs Temperature (IR2156)
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125
-25
0
25
50
75
100
125
Temperature °C
Graph 12. UV+, UV- vs Temperature (IR2156)
11
IR2156(S) & (PbF)
6
35
5.75
30
5.5
25
ILK ( A)
SD+, SD- (V)
SD+
5.25
5
SD-
4.75
20
15
10
4.5
5
4.25
4
0
-25
0
25
50
75
100
125
-25
0
25
Temperature °C
100
125
Graph 14. ILK vs Temperature (IR2156)
20
20
-25
-25
25
25
16
75
16
75
125
125
12
IQCC (mA)
IQCC (mA)
75
Temperature °C
Graph 13. SD+, SD- vs Temperature (IR2156)
8
4
12
8
4
0
0
0
5
10
15
20
VCC (V)
Graph 15. IQCC vs VCC vs Temperature (IR2156)
12
50
15
15.5
16
16.5
VCC (V)
Graph 16. IQCC vs VCC vs Temperature (IR2156)
Internal Zener Diode Curve
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IR2156(S)&(PbF)
1.6
2
-25
-25
1.4
25
1.6
75
1.4
125
25
75
1.2
125
1
1.2
IQCC ( A)
IQCC (mA)
1.8
1
0.8
0.8
0.6
0.6
0.4
0.4
0.2
0.2
0
0
10
10.5
11
11.5
12
12.5
8.5
13
9
9.5
10.5
VCC (V)
VCC (V)
Graph 17. IQCC vs VCC vs Temperature (IR2156)
VCCUV +
58.5
Graph 18. IQCC vs VCC vs Temperature (IR2156)
VCCUV-
70
-25oC
58
65
57.5
75oC
57
Frequency (kHz)
Frequency (kHz)
10
56.5
125oC
56
55.5
60
55
50
o
25 C
55
45
54.5
54
40
11
12
13
14
VCC (V)
Graph 19. FOSC vs VCC vs Temperature (IR2156)
VCPH = 0V
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-25
0
25
50
75
100
125
Temp°(C)
Graph 20. FOSC vs Temperature (IR2156)
VCPH = 0V
13
IR2156(S) & (PbF)
3.5
6
-25
3
125oC
25
5.5
75
2.5
75oC
2
ICPH ( A)
ICPH ( A)
125
1.5
25oC
5
-25oC
1
4.5
0.5
0
4
11
12
13
14
15
11
12
Graph 21. ICPH vs VCC vs Temperature (IR2156)
VCPH = VCC
15
Graph 22. ICPH vs VCC vs Temperature (IR2156)
VCPH = 0V
200
2.25
180
2.2
125oC
2.15
160
125oC
140
2.1
2.05
tRISE(HO) (nSec)
tDEAD (LO) ( Sec)
14
VCC (V)
VCC (V)
75oC
2
25oC
1.95
75oC
120
25oC
100
-25oC
80
60
1.9
40
1.85
20
-25oC
0
1.8
11
12
13
14
VCC (V)
Graph 23. tDEAD vs VCC vs Temperature (IR2156)
CT = 1nF
14
13
15
11
12
13
14
15
V CC (V)
Graph 24. tRISE(HO) vs VCC vs Temperature (IR2156)
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IR2156(S)&(PbF)
250
120
125oC
100
200
75oC
tRISE(LO) (nSec)
tFALL(HO) (nSec)
o
75 C
80
125oC
25oC
60
-25oC
40
150
25oC
o
100
-25 C
50
20
0
0
11
12
13
14
15
11
12
13
14
15
VCC (V)
VCC (V)
Graph 25. tFALL(HO) vs VCC vs Temperature (IR2156)
Graph 26. tRISE(LO) vs VCC vs Temperature (IR2156)
120
125oC
100
tFALL(LO) (nSec)
75oC
80
25oC
60
-25oC
40
20
0
11
12
13
14
15
V CC (V)
Graph 27. tFALL(LO) vs VCC vs Temperature (IR2156)
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15
IR2156(S) & (PbF)
Functional Description
VC1
CVCC
DISCHARGE
Under-voltage Lock-Out Mode (UVLO)
INTERNAL VCC
ZENER CLAMP VOLTAGE
VUVLO+
The under-voltage lock-out mode (UVLO) is
defined as the state the IC is in when VCC is
below the turn-on threshold of the IC. To identify
the different modes of the IC, refer to the State
Diagram shown on page 6 of this document. The
IR2156 undervoltage lock-out is designed to
maintain an ultra low supply current of less than
200uA, and to guarantee the IC is fully functional
before the high and low side output drivers are
activated. Figure 1 shows an efficient supply
voltage using the start-up current of the IR2156
together with a charge pump from the ballast
output stage (RSUPPLY, CVCC, DCP1 and DCP2).
VBUS(+)
RSUPPLY
DBOOT
VB
14
VCC
2
13
12
CVCC
IR2156
11
HO
CBOOT
M1
VS
Half-Bridge
Output
LO
M2
CSNUB
DCP1
8
COM
RCS
DCP2
VBUS(-)
Figure 1, Start-up and supply circuitry.
The start-up capacitor (CVCC) is charged by
current through supply resistor (RSUPPLY) minus
the start-up current drawn by the IC. This resistor
is chosen to provide 2X the maximum start-up
current to guarantee ballast start-up at low line
input voltage. Once the capacitor voltage on VCC
reaches the start-up threshold, and the SD pin is
below 4.5 volts, the IC turns on and HO and LO
begin to oscillate. The capacitor begins to
discharge due to the increase in IC operating
current (Figure 2).
16
VHYST
VUVLO-
DISCHARGE
TIME
CHARGE PUMP
OUTPUT
RSUPPLY & CVCC
TIME
CONSTANT
t
Figure 2, Supply capacitor (CVCC) voltage.
During the discharge cycle, the rectified current
from the charge pump charges the capacitor above
the IC turn-off threshold. The charge pump and
the internal 15.6V zener clamp of the IC take over
as the supply voltage. The start-up capacitor and
snubber capacitor must be selected such that
enough supply current is available over all ballast
operating conditions. A bootstrap diode (DBOOT)
and supply capacitor (CBOOT) comprise the
supply voltage for the high side driver circuitry.
To guarantee that the high-side supply is charged
up before the first pulse on pin HO, the first pulse
from the output drivers comes from the LO pin.
During undervoltage lock-out mode, the high- and
low-side driver outputs HO and LO are both low,
pin CT is connected internally to COM to disable
the oscillator, and pin CPH is connected internally
to COM for resetting the preheat time.
Preheat Mode (PH)
The preheat mode is defined as the state the IC
is in when the lamp filaments are being heated to
their correct emission temperature. This is
necessary for maximizing lamp life and reducing
the required ignition voltage. The IR2156 enters
preheat mode when VCC exceeds the UVLO
positive-going threshold. HO and LO begin to
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IR2156(S)&(PbF)
oscillate at the preheat frequency with 50% duty
cycle and with a dead-time which is set by the
value of the external timing capacitor, CT, and
internal deadtime resistor, RDT. Pin CPH is
disconnected from COM and an internal 4µA
current source (Figure 3)
V BUS(+)
RT
HO
M1
Half
S4
RPH
HalfBridge
Driver
5
R PH
CT
13
OSC.
4
RT
Bridge
12
VS
Output
off) of the output gate drivers, HO and LO. The
selected value of CT together with RDT therefore
program the desired dead-time (see Design
Equations, page 19, Equations 1 and 2). Once
CT discharges below 1/3 VCC, MOSFET S3 is
turned off, disconnecting RDT from COM, and
MOSFET S1 is turned on, connecting RT and
RPH again to VCC. The frequency remains at the
preheat frequency until the voltage on pin CPH
exceeds 13V and the IC enters Ignition Mode.
During the preheat mode, both the over-current
protection and the DC bus under-voltage reset are
enabled when pin CPH exceeds 7.5V.
I LOAD
6
11
LO
M2
Ignition Mode (IGN)
CT
4uA
CPH
7
RCS
CCPH
8
COM
IR2156
Load
Return
V BUS (-)
Figure 3, Preheat circuitry.
charges the external preheat timing capacitor on
CPH linearly. The over-current protection on pin
CS is disabled during preheat. The preheat
frequency is determined by the parallel
combination of resistors RT and RPH, together
with timing capacitor CT. CT charges and
discharges between 1/3 and 3/5 of VCC (see
Timing Diagram, page 7). CT is charged
exponentially through the parallel combination of
RT and RPH connected internally to VCC through
MOSFET S1. The charge time of CT from 1/3 to
3/5 VCC is the on-time of the respective output
gate driver, HO or LO. Once CT exceeds 3/5 VCC,
MOSFET S1 is turned off, disconnecting RT and
RPH from VCC. CT is then discharged
exponentially through an internal resistor, RDT,
through MOSFET S3 to COM. The discharge time
of CT from 3/5 to 1/3 VCC is the dead-time (both
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The ignition mode is defined as the state the IC
is in when a high voltage is being established
across the lamp necessary for igniting the lamp.
The IR2156 enters ignition mode when the voltage
on pin CPH exceeds 13V.
V BUS(+)
VCC
2
S1
RT
RT
HO
M1
Half
Bridge
S4
RPH
5
R PH
CT
13
OSC.
4
Fault
Logic
6
HalfBridge
Driver
12
Output
I LOAD
11
CT
VS
LO
M2
S3
CS
1.3V
10
4uA
CPH
R1
Comp 4
CCS
7
CCPH
8
IR2156
RCS
COM
Load
Return
V BUS(-)
Figure 4, Ignition circuitry.
Pin CPH is connected internally to the gate of a
p-channel MOSFET (S4) (see Figure 4) that
connects pin RPH with pin RT. As pin CPH
17
IR2156(S) & (PbF)
exceeds 13V, the gate-to-source voltage of
MOSFET S4 begins to fall below the turn-on
threshold of S4. As pin CPH continues to ramp
towards VCC, switch S4 turns off slowly. This
results in resistor RPH being disconnected
smoothly from resistor RT, which causes the
operating frequency to ramp smoothly from the
preheat frequency, through the ignition frequency,
to the final run frequency. The over-current
threshold on pin CS will protect the ballast against
a non-strike or open-filament lamp fault condition.
The voltage on pin CS is defined by the lower
half-bridge MOSFET current flowing through the
external current sensing resistor RCS. The resistor
RCS therefore programs the maximum allowable
peak ignition current (and therefore peak ignition
voltage) of the ballast output stage. The peak
ignition current must not exceed the maximum
allowable current ratings of the output stage
MOSFETs. Should this voltage exceed the internal
threshold of 1.3V, the IC will enter FAULT mode
and both gate driver outputs HO and LO will be
latched low.
DC Bus Under-voltage Reset
Run Mode (RUN)
Fault Mode (FAULT)
Once the lamp has successfully ignited, the
ballast enters run mode. The run mode is defined
as the state the IC is in when the lamp arc is
established and the lamp is being driven to a given
power level. The run mode oscillating frequency
is determined by the timing resistor RT and timing
capacitor CT (see Design Equations, page 19,
Equations 3 and 4). Should hard-switching occur
at the half-bridge at any time due to an openfilament or lamp removal, the voltage across the
current sensing resistor, RCS, will exceed the
internal threshold of 1.3 volts and the IC will enter
FAULT mode. Both gate driver outputs, HO and
LO, will be latched low.
Should the voltage at the current sensing pin, CS,
exceed 1.3 volts at any time after the preheat
mode, the IC enters fault mode and both gate
driver outputs, HO and LO, are latched in the 'low'
state. CPH is discharged to COM for resetting
the preheat time, and CT is discharged to COM
for disabling the oscillator. To exit fault mode, VCC
must be recycled back below the UVLO negativegoing turn-off threshold, or, the shutdown pin, SD,
must be pulled above 5.1 volts. Either of these
will force the IC to enter UVLO mode (see State
Diagram, page 6). Once VCC is above the turnon threshold and SD is below 4.5 volts, the IC
will begin oscillating again in the preheat mode.
18
Should the DC bus decrease too low during a
brown-out line condition or over-load condition, the
resonant output stage to the lamp can shift near
or below resonance. This can produce hardswitching at the half-bridge which can damage
the half-bridge switches. To protect against this,
pin VDC measures the DC bus voltage and pulls
down on pin CPH linearly as the voltage on pin
VDC decreases 10.9V below VCC. This causes
the p-channel MOSFET S4 (Figure 4) to close as
the DC bus decreases and the frequency to shift
higher to a safe operating point above resonance.
The DC bus level at which the frequency shifting
occurs is set by the external RBUS resistor and
internal RVDC resistor. By pulling down on pin
CPH, the ignition ramp is also reset. Therefore,
should the lamp extinguish due to very low DC
bus levels, the lamp will be automatically ignited
as the DC bus increases again. The internal RVDC
resistor is connected between pin VDC and COM
when CPH exceeds 7.5V (during preheat mode).
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IR2156(S)&(PbF)
Design Equations
Step 3: Program Preheat Frequency
Note: The results from the following design
equations can differ slightly from experimental
measurements due to IC tolerances, component
tolerances, and oscillator over- and under-shoot
due to internal comparator response time.
The preheat frequency is programmed with timing
resistors RT and RPH, and timing capacitor CT.
The timing resistors are connected in parallel
internally for the duration of the preheat time. The
preheat frequency is therefore given as:
Step 1: Program Dead-time
f PH =
The dead-time between the gate driver outputs
HO and LO is programmed with timing capacitor
CT and an internal dead-time resistor RDT. The
dead-time is the discharge time of capacitor CT
from 3/5VCC to 1/3VCC and is given as:
t DT = CT ⋅ 2000 [Seconds]
(1)
or
RPH
or
CT =
tDT
2000
[Farads]
(2)
Step 2: Program Run Frequency
The final run frequency is programmed with timing
resistor RT and timing capacitor CT. The charge
time of capacitor CT from 1/3VCC to 3/5VCC
determines the on-time of HO and LO gate driver
outputs. The run frequency is therefore given as:
f RUN =
1
2 ⋅ C T ( 0 .6 ⋅ RT + 2000 )
or
1
− 3333 ⋅ RT
C
f
⋅
⋅
1
.
12
T
PH
=
1
RT −
− 3333
1.12 ⋅ CT ⋅ f PH
[Ohms] (6)
Step 4: Program Preheat Time
The preheat time is defined by the time it takes
for the capacitor on pin CPH to charge up to 13
volts (assuming Vcc = 15 volts). An internal
current source of 4.3µA flows out of pin CPH. The
preheat time is therefore given as:
t PH = C PH ⋅ 3.02e6
or
[Hertz] (3)
1
0 .6 ⋅ RT ⋅ R PH
2 ⋅ C T ⋅
+ 2000 [Hertz] (5)
RT + R PH
C PH = t PH ⋅ 0.331e − 6
[Seconds] (7)
[Farads] (8)
Step 5: Program Maximum Ignition Current
RT =
1
− 3333
1 .12 ⋅ C T ⋅ f RUN
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[Ohms] (4)
The maximum ignition current is programmed with
the external resistor RCS and an internal threshold
of 1.25 volts. This threshold determines the overcurrent limit of the ballast, which can be exceeded
when the frequency ramps down towards
resonance during ignition and the lamp does not
19
IR2156(S) & (PbF)
ignite. The maximum ignition current is given as:
I IGN =
1.25
RCS
[Amps Peak] (9)
RCS =
1.25
I IGN
[Ohms] (10)
or
Step 3: Program Preheat Frequency
The preheat frequency is chosen such that the
lamp filaments are adequately heated within the
preheat time. A preheat frequency of 70kHz was
chosen. Using Equation (6) gives the following
result:
RPH
Design Example: 42W-QUAD BIAX CFL
Note: The results from the following design
example can differ slightly from experimental
results due to IC tolerances, component
tolerances, and oscillator over- and under-shoot
due to internal comparator response time.
R PH
1
− 3333 ⋅ RT
1.12 ⋅ CT ⋅ f PH
=
1
− 3333
RT −
1
.
12
⋅
⋅
C
f
T
PH
1
− 3333 ⋅ 43000
1 . 12 ⋅ 470 pF ⋅ 70000
=
1
− 3333
43000 −
⋅
⋅
1
.
02
470
pF
70000
RPH = 53,330Ω ⇒ 51kΩ
Step 1: Program Dead-time
The dead-time is chosen to be 0.8µs. Using
Equation (2) gives the following result:
CT =
t DT
0.8e − 6
=
= 400 pF ⇒ 470 pF
2000
2000
Step 4: Program Preheat Time
The preheat time of 500ms seconds was chosen.
Using Equation (8) gives the following result:
C PH = t PH ⋅ 0.331e − 6
Step 2: Program Run Frequency
C PH = (500e − 3) ⋅ (0.331e − 6)
The run frequency is chosen to be 43kHz. Using
Equation (4) gives the following result:
C PH = 0.166uF − > 0.22uF
RT =
RT =
1
− 3333
1 .12 ⋅ C T ⋅ f RUN
1
− 3333
1 .12 ⋅ 470 pF ⋅ 43000
Step 5: Program Ignition Current
The maximum ignition current is given by the
maximum ignition voltage and is chosen as
2.0Apk. Using Equation (10) gives the following
result:
RT = 40 ,846 Ω ⇒ 43 k Ω
20
www.irf.com
IR2156(S)&(PbF)
RCS =
1.25
I IGN
RCS =
1.3
= 0.625Ohms ⇒ 0.61Ohms
2.0
Results
A fully-functional ballast was designed, built and
tested using the calculated values. The values
were then adjusted slightly in order to fulfill various
ballast parameters (Table 1). The ballast was
designed using the 'Typical Application Schematic'
given on page 1.
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Waveform 2. Lamp voltage during preheat, ignition
and run modes
??
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Table 1, 42W-Quad Biax Ballast Measured Results
Waveform 3, Half-bridge and current sense voltage
during run mode
Waveforms
Waveform 1. Lamp filament voltage during preheat
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Waveform 4, Lamp voltage and current sense pin during
a failure-to-strike lamp fault condition.
21
IR2156(S) & (PbF)
Case outline
14-Lead PDIP
14-Lead SOIC (narrow body)
22
01-6010
01-3002 03 (MS-001AC)
01-6019
01-3063 00 (MS-012AB)
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IR2156(S)&(PbF)
Bill Of Materials
Schematic: Typical Application Diagram, Page 1
Lamp Type: 42W-Quad Biax
Line Input Voltage: 120VAC
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Device qualified to Industrial Level
www.irf.com
23
IR2156(S) & (PbF)
LEADFREE PART MARKING INFORMATION
IRxxxxxx
Part number
YWW?
Date code
Pin 1
Identifier
?
P
MARKING CODE
Lead Free Released
Non-Lead Free
Released
IR logo
?XXXX
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free)
14-Lead PDIP IR2156 order IR2156
14-Lead SOIC IR2156S order IR2156S
Leadfree Part
14-Lead PDIP IR2156 order IR2156PbF
14-Lead SOIC IR2156S order IR2156SPbF
Thisproduct has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web Site http://www.irf.com
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
10/25/2004
24
www.irf.com