Product Folder Order Now Support & Community Tools & Software Technical Documents AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 AMC1306x Small, High-Precision, Reinforced Isolated Delta-Sigma Modulators with High CMTI 1 Features 3 Description • The AMC1306 device is a precision, delta-sigma (ΔΣ) modulator with the output separated from the input circuitry by a capacitive double isolation barrier that is highly resistant to magnetic interference. This barrier is certified to provide reinforced isolation of up to 8000 VPEAK according to the DIN V VDE V 0884-10 and UL1577 standards. Used in conjunction with isolated power supplies, this isolated modulator separates parts of the system that operate on different common-mode voltage levels and protects lower-voltage parts from damage. 1 • • • • • Pin-Compatible Family Optimized for ShuntResistor-Based Current Measurements: – ±50-mV or ±250-mV Input Voltage Ranges – Manchester Coded or Uncoded Bitstream Options Excellent DC Performance: – Offset Error: ±100 µV (max) – Offset Drift: 1 µV/°C (max) – Gain Error: ±0.2% (max) – Gain Drift: ±40 ppm/°C (max) Transient Immunity: 100 kV/µs (typ) System-Level Diagnostic Features Safety-Related Certifications: – 7000-VPEAK Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 – 5000-VRMS Isolation for 1 Minute per UL1577 – CAN/CSA No. 5A-Component Acceptance Service Notice, IEC 60950-1, and IEC 60065 End Equipment Standards Fully Specified Over the Extended Industrial Temperature Range: –40°C to +125°C The input of the AMC1306 is optimized for direct connection to shunt resistors or other low voltagelevel signal sources. The unique low input voltage range of the ±50-mV device allows significant reduction of the power dissipation through the shunt and supports excellent ac and dc performance. The output bitstream of the AMC1306 is Manchester coded (AMC1306Ex) or uncoded (AMC1306Mx), depending on the derivate. By using an integrated digital filter (such as those in the TMS320F2807x or TMS320F2837x microcontroller families) to decimate the bitstream, the device can achieve 16 bits of resolution with a dynamic range of 85 dB at a data rate of 78 kSPS. The bitstream output of the Manchester coded AMC1306Ex versions support single-wire data and clock transfer without having to consider the setup and hold time requirements of the receiving device. 2 Applications • Shunt-Resistor-Based Current Sensing and Isolated Voltage Measurements in: – Industrial Motor Drives – Photovoltaic Inverters – Uninterruptible Power Supplies Device Information(1) PART NUMBER AMC1306x PACKAGE SOIC (8) BODY SIZE (NOM) 5.85 mm × 7.50 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Simplified Schematic Floating Power Supply HV+ AMC1306Mx AGND RSHUNT Optional To Load AINN Optional DVDD AVDD Optional AINP Reinforced Isolation 3.3 V or 5.0 V DGND 3.0 V, 3.3 V, or 5.0 V TMS320F28x7x DOUT SD-Dx CLKIN SD-Cx PWMx HV- Copyright © 2017, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Device Comparison Table..................................... Pin Configuration and Functions ......................... Specifications......................................................... 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 7.11 7.12 8 8.2 Functional Block Diagram ....................................... 17 8.3 Feature Description................................................. 18 8.4 Device Functional Modes........................................ 22 1 1 1 2 3 3 4 9 Application and Implementation ........................ 23 9.1 Application Information............................................ 23 9.2 Typical Applications ................................................ 24 10 Power Supply Recommendations ..................... 29 11 Layout................................................................... 30 Absolute Maximum Ratings ...................................... 4 ESD Ratings.............................................................. 4 Recommended Operating Conditions....................... 4 Thermal Information .................................................. 4 Power Ratings........................................................... 4 Insulation Specifications............................................ 5 Safety-Related Certifications..................................... 6 Safety Limiting Values .............................................. 6 Electrical Characteristics: AMC1306x25 ................... 7 Switching Characteristics ........................................ 9 Insulation Characteristics Curves ......................... 10 Typical Characteristics .......................................... 11 11.1 Layout Guidelines ................................................. 30 11.2 Layout Example .................................................... 30 12 Device and Documentation Support ................. 31 12.1 12.2 12.3 12.4 12.5 12.6 12.7 12.8 Device Support...................................................... Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 31 31 31 31 31 31 32 32 13 Mechanical, Packaging, and Orderable Information ........................................................... 32 Detailed Description ............................................ 17 8.1 Overview ................................................................. 17 4 Revision History 2 DATE REVISION NOTES March 2017 * Initial release. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 5 Device Comparison Table PART NUMBER STATUS INPUT VOLTAGE RANGE DIFFERENTIAL INPUT RESISTANCE DIGITAL OUTPUT INTERFACE AMC1306E05 Preview ±50 mV 4.9 kΩ Manchester coded CMOS AMC1306E25 Active ±250 mV 22 kΩ Manchester coded CMOS AMC1306M05 Preview ±50 mV 4.9 kΩ Uncoded CMOS AMC1306M25 Active ±250 mV 22 kΩ Uncoded CMOS 6 Pin Configuration and Functions DWV Package 8-Pin SOIC Top View AVDD 1 8 DVDD AINP 2 7 CLKIN AINN 3 6 DOUT AGND 4 5 DGND Not to scale Pin Functions PIN NO. 1 NAME I/O DESCRIPTION Analog (high-side) power supply, 3.0 V to 5.5 V. See the Power Supply Recommendations section for decoupling recommendations. AVDD — 2 AINP I Noninverting analog input 3 AINN I Inverting analog input 4 AGND — Analog (high-side) ground reference 5 DGND — Digital (controller-side) ground reference 6 DOUT O Modulator data output. This pin is a Manchester coded output for AMC1306Ex derivates. 7 CLKIN I Modulator clock input: 5 MHz to 21 MHz (5-V operation) with internal pulldown resistor (typical value: 1.5 MΩ) 8 DVDD — Digital (controller-side) power supply, 2.7 V to 5.5 V. See the Power Supply Recommendations section for decoupling recommendations. Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 3 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings (1) Supply voltage MIN MAX UNIT –0.3 6.5 V AGND – 6 AVDD + 0.5 V DGND – 0.5 DVDD + 0.5 V AVDD to AGND or DVDD to DGND Analog input voltage at AINP, AINN Digital input or output voltage at CLKIN or DOUT Input current to any pin except supply pins –10 Junction temperature, TJ Storage temperature, Tstg (1) –65 10 mA 150 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating ambient temperature range (unless otherwise noted) MIN NOM MAX AVDD Analog (high-side) supply voltage (AVDD to AGND) 3.0 5.0 5.5 UNIT V DVDD Digital (controller-side) supply voltage (DVDD to DGND) 2.7 3.3 5.5 V TA Operating ambient temperature –40 125 °C 7.4 Thermal Information AMC1306x THERMAL METRIC (1) DWV (SOIC) UNIT 8 PINS RθJA Junction-to-ambient thermal resistance 112.2 °C/W RθJC(top) Junction-to-case (top) thermal resistance 47.6 °C/W RθJB Junction-to-board thermal resistance 60.0 °C/W ψJT Junction-to-top characterization parameter 23.1 °C/W ψJB Junction-to-board characterization parameter 60.0 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. 7.5 Power Ratings PARAMETER PD Maximum power dissipation (both sides) PD1 Maximum power dissipation (high-side supply) PD2 Maximum power dissipation (low-side supply) 4 Submit Documentation Feedback TEST CONDITIONS MIN TYP MAX AMC1306Ex, AVDD = DVDD = 5.5 V 91.85 AMC1306Mx, AVDD = DVDD = 5.5 V 86.90 AVDD = 5.5 V 53.90 AMC1306Ex, DVDD = 5.5 V 37.95 AMC1306Mx, DVDD = 5.5 V 33.00 UNIT mW mW mW Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 7.6 Insulation Specifications over operating ambient temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VALUE UNIT Shortest pin-to-pin distance through air ≥9 mm Shortest pin-to-pin distance across the package surface ≥9 mm ≥ 0.021 mm ≥ 600 V GENERAL CLR External clearance (1) CPG External creepage (1) DTI Distance through insulation Minimum internal gap (internal clearance) of the double insulation (2 × 0.0105 mm) CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 Material group According to IEC 60664-1 Overvoltage category per IEC 60664-1 DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 VIORM Maximum repetitive peak isolation voltage VIOWM Maximum-rated isolation working voltage VIOTM Maximum transient isolation voltage VIOSM Maximum surge isolation voltage (3) Barrier capacitance, input to output (5) CIO Insulation resistance, input to output (5) RIO I-IV Rated mains voltage ≤ 600 VRMS I-IV Rated mains voltage ≤ 1000 VRMS I-III (2) Apparent charge (4) qpd I Rated mains voltage ≤ 300 VRMS At ac voltage (bipolar) 2121 VPK At ac voltage (sine wave) 1500 VRMS At dc voltage 2121 VDC VTEST = VIOTM, t = 60 s (qualification test) 7000 VTEST = 1.2 × VIOTM, t = 1 s (100% production test) 8400 Test method per IEC 60065, 1.2/50-μs waveform, VTEST = 1.6 × VIOSM = 12800 VPK (qualification) 8000 Method a, after input/output safety test subgroup 2/3, Vini = VIOTM, tini = 60 s, Vpd(m) = 1.2 × VIORM = 2545 VPK, tm = 10 s ≤5 Method a, after environmental tests subgroup 1, Vini = VIOTM, tini = 60 s, Vpd(m) = 1.6 × VIORM = 3394 VPK, tm = 10 s ≤5 Method b1, at routine test (100% production) and preconditioning (type test), Vini = VIOTM, tini = 1 s, Vpd(m) = 1.875 × VIORM = 3977 VPK, tm = 1 s ≤5 VIO = 0.5 VPP at 1 MHz ~1 VPK VPK pC pF 12 VIO = 500 V at TA = 25°C > 10 VIO = 500 V at 100°C ≤ TA ≤ 125°C > 1011 VIO = 500 V at TS = 150°C > 109 Pollution degree 2 Climatic category 40/125/21 Ω UL1577 VISO (1) (2) (3) (4) (5) Withstand isolation voltage VTEST = VISO = 5000 VRMS or 7000 VDC, t = 60 s (qualification), VTEST = 1.2 × VISO = 6000 VRMS, t = 1 s (100% production test) 5000 VRMS Apply creepage and clearance requirements according to the specific equipment isolation standards of an application. Care must be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed circuit board (PCB) do not reduce this distance. Creepage and clearance on a PCB become equal in certain cases. Techniques such as inserting grooves and ribs on the PCB are used to help increase these specifications. This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits. Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier. Apparent charge is electrical discharge caused by a partial discharge (pd). All pins on each side of the barrier are tied together, creating a two-pin device. Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 5 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com 7.7 Safety-Related Certifications VDE UL Certified according to DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12, DIN EN 60950-1 (VDE 0805 Teil 1): 2014-08, and DIN EN 60065 (VDE 0860): 2005-11 Recognized under 1577 component recognition and CSA component acceptance NO 5 programs Reinforced insulation Single protection File number: DIN 40040142 File number: E181974 7.8 Safety Limiting Values Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output (I/O) circuitry. A failure of the I/O may allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier, potentially leading to secondary system failures. PARAMETER IS Safety input, output, or supply current PS Safety input, output, or total power TS Maximum safety temperature (1) TEST CONDITIONS MIN TYP MAX θJA = 112.2°C/W, AVDD = DVDD = 5.5 V, TJ = 150°C, TA = 25°C 202.5 θJA = 112.2°C/W, AVDD = DVDD = 3.6 V, TJ = 150°C, TA = 25°C 309.4 UNIT mA 1114 (1) θJA = 112.2°C/W, TJ = 150°C, TA = 25°C 150 mW °C Input, output, or the sum of input and output power must not exceed this value. The maximum safety temperature is the maximum junction temperature specified for the device. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information table is that of a device installed on a high-K test board for leaded surface-mount packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance. 6 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 7.9 Electrical Characteristics: AMC1306x25 minimum and maximum specifications apply from TA = –40°C to +125°C, AVDD = 3.0 V to 5.5 V, DVDD = 2.7 V to 5.5 V, AINP = –250 mV to 250 mV, AINN = AGND, and sinc3 filter with OSR = 256 (unless otherwise noted); typical specifications are at TA = 25°C, CLKIN = 20 MHz, AVDD = 5 V, and DVDD = 3.3 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG INPUTS VClipping Differential input voltage before clipping output AINP – AINN FSR Specified linear differential full-scale voltage AINP – AINN Absolute common-mode input voltage (1) ±320 –250 mV 250 mV (AINP – AINN) / 2 to AGND –2 AVDD V VCM Operating common-mode input voltage (AINP – AINN) / 2 to AGND –0.16 AVDD – 2.1 V VCMov Common-mode overvoltage detection level (2) (AINP – AINN) / 2 to AGND AVDD – 2 CIN Single-ended input capacitance 2 CIND Differential input capacitance 1 IIB Input bias current Inputs shorted to AGND RIN Single-ended input resistance AINN = AGND 19 kΩ RIND Differential input resistance 22 kΩ IIO Input offset current ±5 nA CMTI Common-mode transient immunity 100 kV/µs CMRR Common-mode rejection ratio –82 50 –60 AINP = AINN, fIN = 0 Hz, VCM min ≤ VIN ≤ VCM max –95 AINP = AINN, fIN from 0.1 Hz to 50 kHz, VCM min ≤ VIN ≤ VCM max –95 pF pF –48 µA dB Input bandwidth (3) BW V 900 kHz DC ACCURACY DNL Differential nonlinearity Resolution: 16 bits –0.99 0.99 LSB INL Integral nonlinearity (4) Resolution: 16 bits –4 ±1 4 LSB EO Offset error Initial, at 25°C –100 ±4.5 100 Initial, at 25°C –0.2% –0.005% 0.2% –40 ±20 40 (5) TCEO Offset error thermal drift EG Gain error TCEG Gain error thermal drift (6) –1 AINP = AINN = AGND, 3.0 V ≤ AVDD ≤ 5.5 V, at dc PSRR Power-supply rejection ratio 1 µV µV/°C ppm/°C –103 dB AINP = AINN = AGND, 3.0 V ≤ AVDD ≤ 5.5 V, 10 kHz, 100-mV ripple –92 AC ACCURACY SNR Signal-to-noise ratio fIN = 1 kHz 82 86 dB SINAD Signal-to-noise + distortion fIN = 1 kHz 81.9 85.7 dB THD Total harmonic distortion SFDR (1) (2) (3) (4) (5) (6) Spurious-free dynamic range 4.5 V ≤ AVDD ≤ 5.5 V, 5 MHz ≤ fCLKIN ≤ 21 MHz, fIN = 1 kHz –98 –86 3.0 V ≤ AVDD ≤ 3.6 V, 5 MHz ≤ fCLKIN ≤ 20 MHz, fIN = 1 kHz –93 –85 fIN = 1 kHz dB 83 100 dB Steady-state voltage supported by the device in case of a system failure; see the specified common-mode input voltage VCM for normal operation. Adhere to the analog input voltage range as specified in the Absolute Maximum Ratings table. The common-mode overvoltage detection level has a typical hysteresis of 90 mV. This parameter is the –3-dB, second-order, roll-off frequency of the integrated differential input amplifier to consider for antialiasing filter designs. Integral nonlinearity is defined as the maximum deviation from a straight line passing through the end-points of the ideal ADC transfer function expressed as number of LSBs or as a percent of the specified linear full-scale range FSR. value MAX value MIN TempRange . § value MAX value MIN TCE G ( ppm ) ¨¨ © value u TempRange Gain error drift is calculated using the box method, as described by the following equation: Offset error drift is calculated using the box method, as described by the following equation: Copyright © 2017, Texas Instruments Incorporated TCE O · ¸¸ u 10 6 ¹ . Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 7 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com Electrical Characteristics: AMC1306x25 (continued) minimum and maximum specifications apply from TA = –40°C to +125°C, AVDD = 3.0 V to 5.5 V, DVDD = 2.7 V to 5.5 V, AINP = –250 mV to 250 mV, AINN = AGND, and sinc3 filter with OSR = 256 (unless otherwise noted); typical specifications are at TA = 25°C, CLKIN = 20 MHz, AVDD = 5 V, and DVDD = 3.3 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DIGITAL INPUTS/OUTPUTS CMOS Logic with Schmitt-trigger DGND ≤ VIN ≤ DVDD IIN Input current CIN Input capacitance 0 7 VIH High-level input voltage 0.7 × DVDD DVDD + 0.3 VIL Low-level input voltage –0.3 0.3 × DVDD CLOAD Output load capacitance VOH High-level output voltage VOL Low-level output voltage 4 fCLKIN = 20 MHz pF 30 IOH = –20 µA DVDD – 0.1 IOH = –4 mA DVDD – 0.4 μA V V pF V IOL = 20 µA 0.1 IOL = 4 mA 0.4 V POWER SUPPLY AVDD High-side supply voltage IAVDD High-side supply current DVDD Controller-side supply voltage IDVDD 8 Controller-side supply current Submit Documentation Feedback 5.0 5.5 3.0 V ≤ AVDD ≤ 3.6 V 3.0 6.3 8.5 4.5 V ≤ AVDD ≤ 5.5 V 7.2 9.8 3.3 5.5 AMC1306Ex, 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF 2.7 4.1 5.5 AMC1306Mx, 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF 3.3 4.8 AMC1306Ex, 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF 5.0 6.9 AMC1306Mx, 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF 3.9 6.0 V mA V mA Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 7.10 Switching Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 4.5 V ≤ AVDD ≤ 5.5 V 5 21 3.0 V ≤ AVDD ≤ 5.5 V 5 20 4.5 V ≤ AVDD ≤ 5.5 V 47.6 200 3.0 V ≤ AVDD ≤ 5.5 V 50 200 UNIT fCLKIN CLKIN clock frequency tCLKIN CLKIN clock period tHIGH CLKIN clock high time 20 25 120 ns tLOW CLKIN clock low time 20 25 120 ns tH DOUT hold time after rising edge of CLKIN AMC1306Mx (1), CLOAD = 15 pF tD Rising edge of CLKIN to DOUT valid delay AMC1306Mx (1), CLOAD = 15 pF tr DOUT rise time tf DOUT fall time ns 3.5 ns 15 10% to 90%, 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF 0.8 3.5 10% to 90%, 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF 1.8 3.9 10% to 90%, 2.7 V ≤ DVDD ≤ 3.6 V, CLOAD = 15 pF 0.8 3.5 10% to 90%, 4.5 V ≤ DVDD ≤ 5.5 V, CLOAD = 15 pF 1.8 3.9 tISTART Interface startup time DVDD at 2.7 V (min) to DOUT valid with AVDD ≥ 3.0 V tASTART Analog startup time AVDD step to 3.0 V with DVDD ≥ 2.7 V, 0.1% settling (1) MHz ns ns ns 32 32 CLKIN cycles 0.5 ms The output of the Manchester encoded versions of the AMC1306Ex can change with every edge of CLKIN with a typical delay of 6 ns; see the Manchester Coding Feature section for additional details. tCLKIN tHIGH CLKIN tLOW tH tr / tf tD DOUT Figure 1. Digital Interface Timing AVDD DVDD tASTART CLKIN ... DOUT Test Pattern Bitream not valid (analog settling) Valid bitstream tISTART Figure 2. Device Startup Timing Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 9 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com 7.11 Insulation Characteristics Curves 1200 500 AVDD = DVDD = 3.6 V AVDD = DVDD = 5.5 V 1100 1000 400 900 PS (mW) IS (mA) 800 300 200 700 600 500 400 300 100 200 100 0 0 0 50 100 TA (°C) 150 0 200 Figure 3. Thermal Derating Curve for Safety-Limiting Current per VDE 100 TA (°C) 200 D002 Safety Margin Zone: 1800 VRMS , 254 Years Operating Zone: 1500 VRMS , 135 Years TDDB Line (<1 PPM Fail Rate) 1E+10 1E+9 150 Figure 4. Thermal Derating Curve for Safety-Limiting Power per VDE 1E+11 Time to Fail (sec) 50 D001 87.5% 1E+8 1E+7 1E+6 1E+5 1E+4 1E+3 20% 1E+2 9000 9500 8500 8000 7500 7000 6500 6000 5500 5000 4500 4000 3500 3000 2500 2000 1500 500 1000 1E+1 Stress Voltage (V RMS) TA up to 150°C, stress-voltage frequency = 60 Hz, isolation working voltage = 1500 VRMS, operating lifetime = 135 years Figure 5. Reinforced Isolation Capacitor Lifetime Projection 10 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 7.12 Typical Characteristics at AVDD = 5 V, DVDD = 3.3 V, AINP = –50 mV to 50 mV (AMC1306x05) or –250 mV to 250 mV (AMC1306x25), AINN = AGND, fCLKIN = 20 MHz, and sinc3 filter with OSR = 256 (unless otherwise noted) 4 3.3 3.5 3.25 3.2 VCMov (V) VCM (V) 3 2.5 2 1.5 3.1 3.05 3 1 2.95 0.5 3 3.5 4 4.5 AVDD (V) 5 2.9 -40 5.5 -10 0 40 -20 20 CMRR (dB) -20 80 95 110 125 D004 -60 -80 -40 -100 -60 0 0.5 1 1.5 VCM (V) 2 2.5 3 -120 0.1 3.5 1 10 fIN (kHz) D005 AMC1306x25 100 1000 D006 AMC1306x25 Figure 8. Input Bias Current vs Common-Mode Input Voltage Figure 9. Common-Mode Rejection Ratio vs Input Signal Frequency 4 100 3.5 75 3 50 2.5 25 EO (µV) INL (|LSB|) 20 35 50 65 Temperature (qC) -40 0 2 0 1.5 -25 1 -50 0.5 -75 0 -40 5 Figure 7. Common-Mode Overvoltage Detection Level vs Temperature 60 -80 -0.5 -25 D003 Figure 6. Maximum Operating Common-Mode Input Voltage vs High-Side Supply Voltage IIB (PA) 3.15 -100 -25 -10 5 20 35 50 65 Temperature (°C) 80 95 110 125 D008 3 3.5 4 4.5 AVDD (V) 5 5.5 D009 AMC1306x25 Figure 10. Integral Nonlinearity vs Temperature Copyright © 2017, Texas Instruments Incorporated Figure 11. Offset Error vs High-Side Supply Voltage Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 11 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com Typical Characteristics (continued) 100 100 80 80 60 60 40 40 20 20 EO (µV) EO (PV) at AVDD = 5 V, DVDD = 3.3 V, AINP = –50 mV to 50 mV (AMC1306x05) or –250 mV to 250 mV (AMC1306x25), AINN = AGND, fCLKIN = 20 MHz, and sinc3 filter with OSR = 256 (unless otherwise noted) 0 -20 -40 0 -20 -40 -60 -60 Device 1 Device 2 Device 3 -80 -100 -40 -80 -100 -25 -10 5 20 35 50 65 Temperature (°C) 80 95 110 125 5 9 13 fCLKIN (MHz) D010 AMC1306x25 17 21 D011 AMC1306x25 Figure 12. Offset Error vs Temperature Figure 13. Offset Error vs Clock Frequency 0.3 0.25 0.2 0.2 0.15 0.1 0.05 EG (%) EG (%) 0.1 0 0 -0.05 -0.1 -0.1 -0.15 -0.2 -0.2 -0.3 -40 -0.25 3 3.5 4 4.5 AVDD (V) 5 5.5 -25 -10 5 D012 AMC1306x25 0.2 -20 0.1 -40 0 -80 -0.2 -100 -0.3 17 AMC1306x25 Figure 16. Gain Error vs Clock Frequency 12 Submit Documentation Feedback 110 125 D013 -60 -0.1 13 fCLKIN (MHz) 95 Figure 15. Gain Error vs Temperature 0 PSRR (dB) EG (%) Figure 14. Gain Error vs High-Side Supply Voltage 9 80 AMC1306x25 0.3 5 20 35 50 65 Temperature (qC) 21 D014 -120 0.1 1 10 100 Ripple Frequency (kHz) 1000 D015 AMC1306x25 Figure 17. Power-Supply Rejection Ratio vs Ripple Frequency Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 Typical Characteristics (continued) at AVDD = 5 V, DVDD = 3.3 V, AINP = –50 mV to 50 mV (AMC1306x05) or –250 mV to 250 mV (AMC1306x25), AINN = AGND, fCLKIN = 20 MHz, and sinc3 filter with OSR = 256 (unless otherwise noted) 90 90 AMC1306x25, SNR AMC1306x25, SINAD 88 87 86 85 84 83 3 3.5 4 4.5 AVDD (V) 5 87 86 85 84 82 -40 5.5 -25 -10 5 D016 Figure 18. Signal-to-Noise Ratio and Signal-to-Noise + Distortion vs High-Side Supply Voltage 20 35 50 65 Temperature (qC) 80 95 110 125 D017 Figure 19. Signal-to-Noise Ratio and Signal-to-Noise + Distortion vs Temperature 90 88 AMC1306x25, SNR AMC1306x25, SINAD 89 86 88 SNR and SINAD (dB) SNR and SINAD (dB) 88 83 82 87 86 85 84 83 84 82 80 78 76 74 82 5 9 13 fCLKIN (MHz) 17 AMC1306x25, SNR AMC1306x25, SINAD 72 0.1 21 1 10 100 fIN (kHz) D018 Figure 20. Signal-to-Noise Ratio and Signal-to-Noise + Distortion vs Clock Frequency D019 Figure 21. Signal-to-Noise Ratio and Signal-to-Noise + Distortion vs Input Signal Frequency 100 -86 AMC1306x25, SNR AMC1306x25, SINAD 95 -88 -90 90 -92 85 -94 80 THD (dB) SNR and SINAD (dB) AMC1306x25, SNR AMC1306x25, SINAD 89 SNR and SINAD (dB) SNR and SINAD (dB) 89 75 70 -96 -98 -100 -102 65 -104 60 -106 55 -108 50 -110 4.5 0 50 100 150 200 250 300 VIN (mVpp) 350 400 450 500 D020 4.75 5 AVDD (V) 5.25 5.5 D021 AMC1306x25, fCLKIN = 21 MHz Figure 22. Signal-to-Noise Ratio and Signal-to-Noise + Distortion vs Input Signal Amplitude Copyright © 2017, Texas Instruments Incorporated Figure 23. Total Harmonic Distortion vs High-Side Supply Voltage (5 V, nom) Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 13 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com Typical Characteristics (continued) -86 -86 -88 -88 -90 -90 -92 -92 -94 -94 THD (dB) THD (dB) at AVDD = 5 V, DVDD = 3.3 V, AINP = –50 mV to 50 mV (AMC1306x05) or –250 mV to 250 mV (AMC1306x25), AINN = AGND, fCLKIN = 20 MHz, and sinc3 filter with OSR = 256 (unless otherwise noted) -96 -98 -100 -96 -98 -100 -102 -102 -104 -104 -106 -106 -108 -108 -110 3 3.5 4 4.5 AVDD (V) 5 -110 -40 5.5 -25 -10 D039 AMC1306x25, fCLKIN = 20 MHz 5 20 35 50 65 Temperature (°C) 80 95 110 125 D022 AMC1306x25 Figure 24. Total Harmonic Distortion vs High-Side Supply Voltage (3.3 V, nom) Figure 25. Total Harmonic Distortion vs Temperature -85 -86 -88 -90 -90 -92 -95 THD (dB) THD (dB) -94 -96 -98 -100 -102 -100 -105 -110 -104 -106 -115 -108 -110 5 9 13 fCLKIN (MHz) 17 -120 0.1 21 1 fIN (kHz) D023 AMC1306x25 Figure 27. Total Harmonic Distortion vs Input Signal Frequency -70 118 -75 114 -80 110 -85 106 SFDR (dB) THD (dB) D024 AMC1306x25 Figure 26. Total Harmonic Distortion vs Clock Frequency -90 -95 -100 102 98 94 -105 90 -110 -115 86 -120 82 0 50 100 150 200 250 300 VIN (mVpp) 350 400 450 AMC1306x25 Figure 28. Total Harmonic Distortion vs Input Signal Amplitude 14 10 Submit Documentation Feedback 500 D025 3 3.5 4 4.5 AVDD (V) 5 5.5 D026 AMC1306x25 Figure 29. Spurious-Free Dynamic Range vs High-Side Supply Voltage Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 Typical Characteristics (continued) 118 118 114 114 110 110 106 106 SFDR (dB) SFDR (dB) at AVDD = 5 V, DVDD = 3.3 V, AINP = –50 mV to 50 mV (AMC1306x05) or –250 mV to 250 mV (AMC1306x25), AINN = AGND, fCLKIN = 20 MHz, and sinc3 filter with OSR = 256 (unless otherwise noted) 102 98 102 98 94 94 90 90 86 86 82 -40 82 -25 -10 5 20 35 50 65 Temperature (qC) 80 95 5 110 125 9 13 fCLKIN (MHz) D027 AMC1306x25 D028 Figure 31. Spurious-Free Dynamic Range vs Clock Frequency 118 125 114 120 110 115 110 SFDR (dB) 106 SFDR (dB) 21 AMC1306x25 Figure 30. Spurious-Free Dynamic Range vs Temperature 102 98 94 105 100 95 90 90 85 86 80 82 0.1 75 1 fIN (kHz) 0 10 50 100 150 D029 AMC1306x25 200 250 300 VIN (mVpp) 350 400 450 500 D030 AMC1306x25 Figure 32. Spurious-Free Dynamic Range vs Input Signal Frequency Figure 33. Spurious-Free Dynamic Range vs Input Signal Amplitude 0 0 -20 -20 -40 -40 Magnitude (dB) Magnitude (dB) 17 -60 -80 -100 -60 -80 -100 -120 -120 -140 -140 -160 -160 0 5 10 15 20 25 Frequency (kHz) 30 35 40 D031 AMC1306x25, 4096-point FFT, VIN = 500 mVPP Figure 34. Frequency Spectrum with 1-kHz Input Signal Copyright © 2017, Texas Instruments Incorporated 0 5 10 15 20 25 Frequency (kHz) 30 35 40 D032 AMC1306x25, 4096-point FFT, VIN = 500 mVPP Figure 35. Frequency Spectrum with 10-kHz Input Signal Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 15 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com Typical Characteristics (continued) at AVDD = 5 V, DVDD = 3.3 V, AINP = –50 mV to 50 mV (AMC1306x05) or –250 mV to 250 mV (AMC1306x25), AINN = AGND, fCLKIN = 20 MHz, and sinc3 filter with OSR = 256 (unless otherwise noted) 10 10 9.5 9.5 9 9 8.5 8.5 8 IAVDD (mA) IAVDD (mA) 8 7.5 7 6.5 7 6.5 6 6 5.5 5.5 5 5 4.5 4.5 4 3 3.5 4 4.5 AVDD (V) 5 4 -40 5.5 10 8 9.5 7.5 9 7 8.5 6.5 5 20 35 50 65 Temperature (°C) 80 95 110 125 D034 AMC1306Mx AMC1306Ex 6 IDVDD (mA) 7.5 7 6.5 5.5 5 4.5 6 4 5.5 3.5 5 3 4.5 2.5 2 2.7 4 5 9 13 Clock Frequency (MHz) 17 21 3.5 3.9 4.3 DVDD (V) 4.7 5.1 5.5 D036 Figure 39. Controller-Side Supply Current vs Controller-Side Supply Voltage 8 8 AMC1306Mx, DVDD = 3.3 V AMC1306Mx, DVDD = 5 V AMC1306Ex, DVDD = 3.3 V AMC1306Ex, DVDD = 5 V 7.5 7 6.5 AMC1306Mx, DVDD = 3.3 V AMC1306Mx, DVDD = 5 V AMC1306Ex, DVDD = 3.3 V AMC1306Ex, DVDD = 5 V 7.5 7 6.5 6 IDVDD (mA) 6 5.5 5 4.5 5.5 5 4.5 4 4 3.5 3.5 3 3 2.5 2.5 2 -40 3.1 D035 Figure 38. High-Side Supply Current vs Clock Frequency IDVDD (mA) -10 Figure 37. High-Side Supply Current vs Temperature 8 2 -25 -10 5 20 35 50 65 Temperature (qC) 80 95 110 125 D037 Figure 40. Controller-Side Supply Current vs Temperature 16 -25 D033 Figure 36. High-Side Supply Current vs High-Side Supply Voltage IAVDD (mA) 7.5 Submit Documentation Feedback 5 9 13 fCLKIN (MHz) 17 21 D038 Figure 41. Controller-Side Supply Current vs Clock Frequency Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 8 Detailed Description 8.1 Overview The differential analog input (comprised of input signals AINP and AINN) of the AMC1306 is a fully-differential amplifier feeding the switched-capacitor input of a second-order, delta-sigma (ΔΣ) modulator stage that digitizes the input signal into a 1-bit output stream. The isolated data output DOUT of the converter provides a stream of digital ones and zeros that is synchronous to the externally-provided clock source at the CLKIN pin with a frequency in the range of 5 MHz to 21 MHz. The time average of this serial bitstream output is proportional to the analog input voltage. The Functional Block Diagram section shows a detailed block diagram of the AMC1306. The analog input range is tailored to directly accommodate a voltage drop across a shunt resistor used for current sensing. The silicondioxide (SiO2) based capacitive isolation barrier supports a high level of magnetic field immunity as described in the ISO72x Digital Isolator Magnetic-Field Immunity application report, available for download at www.ti.com. The external clock input simplifies the synchronization of multiple current-sensing channels on the system level. The extended frequency range of up to 21 MHz supports higher performance levels compared to the other solutions available on the market. 8.2 Functional Block Diagram DVDD AVDD Receiver AINP û Modulator VCM, AVDD Diagnostic AGND Copyright © 2017, Texas Instruments Incorporated Interface Band-Gap Reference Receiver AINN Manchester Coding (AMC1306Ex Only) Reinforced Isolation Barrier AMC1306x DOUT CLKIN DGND Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 17 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com 8.3 Feature Description 8.3.1 Analog Input The AMC1306 incorporates front-end circuitry that contains a differential amplifier and a sampling stage, followed by a ΔΣ modulator. The gain of the differential amplifier is set by internal precision resistors to a factor of 4 for devices with a specified input voltage range of ±250 mV (this value is for the AMC1306x25), or to a factor of 20 in devices with a ±50-mV input voltage range (for the AMC1306x05), resulting in a differential input impedance of 4.9 kΩ (for the AMC1306x05) or 22 kΩ (for the AMC1306x25). For reduced offset and offset drift, the differential amplifier is chopper-stabilized with the switching frequency set at fCLKIN / 32. The switching frequency generates a spur as shown in Figure 42. 0 -20 Magnitude (dB) -40 -60 -80 -100 -120 -140 -160 0.1 1 10 100 Frequency (kHz) 1000 10000 D007 sinc3 filter, OSR = 2, fCLKIN = 20 MHz, fIN = 1 kHz Figure 42. Quantization Noise Shaping Consider the input impedance of the AMC1306 in designs with high-impedance signal sources that can cause degradation of gain and offset specifications. The importance of this effect, however, depends on the desired system performance. Additionally, the input bias current caused by the internal common-mode voltage at the output of the differential amplifier is dependent on the actual amplitude of the input signal; see the Isolated Voltage Sensing section for more details on reducing these effects. There are two restrictions on the analog input signals (AINP and AINN). First, if the input voltage exceeds the range AGND – 6 V to AVDD + 0.5 V, the input current must be limited to 10 mA because the device input electrostatic discharge (ESD) diodes turn on. In addition, the linearity and noise performance of the device are ensured only when the differential analog input voltage remains within the specified linear full-scale range (FSR), that is ±250 mV (for the AMC1306x25) or ±50 mV (for the AMC1306x05), and within the specified input commonmode range. 18 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 Feature Description (continued) 8.3.2 Modulator The modulator implemented in the AMC1306 is a second-order, switched-capacitor, feed-forward ΔΣ modulator, such as the one conceptualized in Figure 43. The analog input voltage VIN and the output V5 of the 1-bit digitalto-analog converter (DAC) are differentiated, providing an analog voltage V1 at the input of the first integrator stage. The output of the first integrator feeds the input of the second integrator stage, resulting in output voltage V3 that is differentiated with the input signal VIN and the output of the first integrator V2. Depending on the polarity of the resulting voltage V4, the output of the comparator is changed. In this case, the 1-bit DAC responds on the next clock pulse by changing the associated analog output voltage V5, causing the integrators to progress in the opposite direction and forcing the value of the integrator output to track the average value of the input. fCLKIN V1 V2 Integrator 1 VIN V3 V4 Integrator 2 CMP 0V V5 DAC Figure 43. Block Diagram of a Second-Order Modulator The modulator shifts the quantization noise to high frequencies, as shown in Figure 43. Therefore, use a lowpass digital filter at the output of the device to increase the overall performance. This filter is also used to convert from the 1-bit data stream at a high sampling rate into a higher-bit data word at a lower rate (decimation). TI's microcontroller families TMS320F2807x and TMS320F2837x offer a suitable programmable, hardwired filter structure termed a sigma-delta filter module (SDFM) optimized for usage with the AMC1306 family. Also, SD24_B converters on the MSP430F677x microcontrollers offer a path to directly access the integrated sincfilters for a simple system-level solution for multichannel, isolated current sensing. An additional option is to use a suitable application-specific device, such as the AMC1210 (a four-channel digital sinc-filter). Alternatively, a fieldprogrammable gate array (FPGA) can be used to implement the filter. Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 19 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com Feature Description (continued) 8.3.3 Isolation Channel Signal Transmission The AMC1306 device uses an on-off keying (OOK) modulation scheme to transmit the modulator output bitstream across the capacitive SiO2-based isolation barrier. The transmitter modulates the bitstream at TX IN in Figure 44 with an internally-generated, 480-MHz carrier across the isolation barrier to represent a digital one and sends a no signal to represent the digital zero. The receiver demodulates the signal after advanced signal conditioning and produces the output. The symmetrical design of each isolation channel improves the CMTI performance and reduces the radiated emissions caused by the high-frequency carrier. The block diagram of an isolation channel integrated in the AMC1306 is shown in Figure 44. Transmitter Receiver OOK Modulation TX IN TX Signal Conditioning SiO2-Based Capacitive Reinforced Isolation Barrier RX Signal Conditioning Envelope Detection RX OUT Oscillator Figure 44. Block Diagram of an Isolation Channel Figure 45 shows the concept of the on-off keying scheme. TX IN Carrier Signal Across the Isolation Barrier RX OUT Figure 45. OOK-Based Modulation Scheme 20 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 Feature Description (continued) 8.3.4 Digital Output A differential input signal of 0 V ideally produces a stream of ones and zeros that are high 50% of the time. A differential input of 250 mV (for the AMC1306x25) or 50 mV (for the AMC1306x05) produces a stream of ones and zeros that are high 89.06% of the time. With 16 bits of resolution, that percentage ideally corresponds to the code 58368. A differential input of –250 mV (–50 mV for the AMC1306x05) produces a stream of ones and zeros that are high 10.94% of the time and ideally results in code 7168 with 16-bit resolution. These input voltages are also the specified linear ranges of the different AMC1306 versions with performance as specified in this document. If the input voltage value exceeds these ranges, the output of the modulator shows nonlinear behavior when the quantization noise increases. The output of the modulator clips with a stream of only zeros with an input less than or equal to –320 mV (–65 mV for the AMC1306x05) or with a stream of only ones with an input greater than or equal to 320 mV (65 mV for the AMC1306x05). In this case, however, the AMC1306 generates a single 1 (if the input is at negative full-scale) or 0 every 128 clock cycles to indicate proper device function (see the Fail-Safe Output section for more details). The input voltage versus the output modulator signal is shown in Figure 46. Modulator Output +FS (Analog Input) -FS (Analog Input) Analog Input Figure 46. Analog Input versus the AMC1306 Modulator Output The density of ones in the output bitstream for any input voltage value (with the exception of a full-scale input signal, as described in the Output Behavior in Case of a Full-Scale Input section) can be calculated using Equation 1: VIN VClipping 2 u VClipping (1) The AMC1306 system clock is provided externally at the CLKIN pin. For more details, see the Switching Characteristics table and the Manchester Coding Feature section. 8.3.5 Manchester Coding Feature The AMC1306Ex offers the IEEE 802.3-compliant Manchester coding feature that generates at least one transition per bit to support clock signal recovery from the bitstream. A Manchester coded bitstream is free of dc components. The Manchester coding combines the clock and data information using exclusive or (XOR) logical operation and results in a bitstream as shown in Figure 47. The duty cycle of the Manchester encoded bitstream depends on the duty cycle of the input clock CLKIN. Clock Uncoded Bitstream 1 0 1 0 1 1 1 0 0 1 1 0 0 0 1 Machester Coded Bitstream Figure 47. Manchester Coded Output of the AMC1306Ex Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 21 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com 8.4 Device Functional Modes 8.4.1 Fail-Safe Output In the case of a missing high-side supply voltage AVDD, the output of a ΔΣ modulator is not defined and can cause a system malfunction. In systems with high safety requirements, this behavior is not acceptable. Therefore, the AMC1306 implements a fail-safe output function that ensures that the output DOUT of the device offers a steady-state bitstream of logic 0's in case of a missing AVDD, as shown in Figure 48. Additionally, if the common-mode voltage of the input reaches or exceeds the specified common-mode overvoltage detection level VCMov as defined in the Electrical Characteristics table, the AMC1306 offers a steadystate bitstream of logic 1's at the output DOUT, as also shown in Figure 48. tASTART tISTART CLKIN ... AVDD VCM DOUT AVDD GOOD Missing AVDD VCM • 9CMov VCM < VCMov Valid Bit Stream AVDD GOOD 0 1 Test Pattern VCM < VCMov 1 Bit Stream Not Valid Valid Bit Stream Figure 48. Fail-Safe Output of the AMC1306 8.4.2 Output Behavior in Case of a Full-Scale Input If a full-scale input signal is applied to the AMC1306 (that is, VIN ≥ VClipping), the device generates a single one or zero every 128 bits at DOUT, depending on the actual polarity of the signal being sensed, as shown in Figure 49. In this way, differentiating between a missing AVDD and a full-scale input signal is possible on the system level. CLKIN ... DOUT ... VIN ” ±320 mV (AMC1306x05: ±64 mV) DOUT ... ... ... ... VIN • 320 mV (AMC1306x05: 64 mV) 127 CLKIN Cycles 127 CLKIN Cycles Figure 49. Overrange Output of the AMC1306 22 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information 9.1.1 Digital Filter Usage The modulator generates a bitstream that is processed by a digital filter to obtain a digital word similar to a conversion result of a conventional analog-to-digital converter (ADC). A very simple filter, built with minimal effort and hardware, is a sinc3-type filter, as shown in Equation 2: H z § 1 z OSR ¨¨ 1 © 1 z · ¸¸ ¹ 3 (2) This filter provides the best output performance at the lowest hardware size (count of digital gates) for a secondorder modulator. All the characterization in this document is also done with a sinc3 filter with an oversampling ratio (OSR) of 256 and an output word duration of 16 bits. The effective number of bits (ENOB) is often used to compare the performance of ADCs and ΔΣ modulators. Figure 50 shows the ENOB of the AMC1306 with different oversampling ratios. In this document, this number is calculated from the SNR by using Equation 3: SINAD 1.76 dB 6.05 dB u ENOB (3) 16 14 ENOB (bits) 12 10 8 6 4 sinc3 sinc2 sinc1 2 0 1 10 100 OSR 1000 D040 Figure 50. Measured Effective Number of Bits versus Oversampling Ratio An example code for implementing a sinc3 filter in an FPGA is discussed in the Combining the ADS1202 with an FPGA Digital Filter for Current Measurement in Motor Control Applications application note, available for download at www.ti.com. Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 23 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com 9.2 Typical Applications 9.2.1 Frequency Inverter Application Isolated ΔΣ modulators are being widely used in frequency inverter designs because of their high ac and dc performance. Frequency inverters are critical parts of industrial motor drives, photovoltaic inverters (string and central inverters), uninterruptible power supplies (UPS), electrical and hybrid electrical vehicles, and other industrial applications. Figure 51 shows a simplified schematics of the AMC1306Mx in a typical frequency inverter application as used in industrial motor drives with shunt resistors (RSHUNT) used for current sensing. Depending on the system design, either all three or only two motor phase currents are sensed. The Manchester coded bitstream output of the AMC1306Ex minimizes the wiring efforts of the connection between the power board and the control board; see Figure 52. This bitstream output also allows the clock to be generated locally on the power board without the having to adjust the propagation delay time of each DOUT connection to fulfill the setup and hold time requirements of the microcontroller. In both examples, an additional fourth AMC1306 is used to support isolated voltage sensing of the dc link. This high voltage is reduced using a high-impedance resistive divider and is sensed by the device across a smaller resistor. The value of this resistor can degrade the performance of the measurement, as described in the Isolated Voltage Sensing section. Motor DC link RSHUNT L1 RSHUNT L3 RSHUNT L2 AMC1306Mx 3.3 V AVDD DVDD AINP CLKIN AINN DOUT 3.3 V AGND DGND TMS320F28x7x AMC1306Mx 3.3 V AVDD DVDD AINP CLKIN AINN DOUT AINP CLKIN AINN DOUT CLKIN AINN DOUT 3.3 V SD-D1 SD-C1 SD-D2 SD-C2 SD-D3 SD-C3 3.3 V SD-D4 SD-C4 AGND DGND AMC1306Mx 3.3 V AVDD DVDD AINP AGND DGND AMC1306Mx 3.3 V AVDD DVDD CDCLVC1104 PWMx 3.3 V AGND DGND Power Board Control Board Copyright © 2017, Texas Instruments Incorporated Figure 51. The AMC1306Mx in a Frequency Inverter Application 24 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 Typical Applications (continued) Motor DC link RSHUNT L1 RSHUNT L3 RSHUNT L2 AMC1306Ex 3.3 V AVDD DVDD AINP CLKIN AINN DOUT 3.3 V AGND DGND TMS320F28x7x AMC1306Ex 3.3 V AINP CLKIN AINN DOUT CLKIN AINN DOUT 3.3 V SD-D1 SD-D2 SD-D3 SD-D4 3.3 V AGND DGND AMC1306Ex 3.3 V AVDD DVDD AINP AGND DGND AMC1306Ex 3.3 V AVDD DVDD AVDD DVDD AINP CLKIN AINN DOUT 3.3 V AGND DGND Clock Source Power Board Control Board Copyright © 2017, Texas Instruments Incorporated Figure 52. The AMC1306Ex in a Frequency Inverter Application 9.2.1.1 Design Requirements Table 1 lists the parameters for the typical application in the Frequency Inverter Application section. Table 1. Design Requirements PARAMETER VALUE High-side supply voltage 3.3 V or 5 V Low-side supply voltage 3.3 V or 5 V Voltage drop across the shunt for a linear response ±250 mV (maximum) Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com 9.2.1.2 Detailed Design Procedure The high-side power supply (AVDD) for the AMC1306 device is derived from the power supply of the upper gate driver. Further details are provided in the Power Supply Recommendations section. The floating ground reference (AGND) is derived from one of the ends of the shunt resistor that is connected to the negative input of the AMC1306 (AINN). If a four-pin shunt is used, the inputs of the device are connected to the inner leads and AGND is connected to one of the outer shunt leads. Use Ohm's Law to calculate the voltage drop across the shunt resistor (VSHUNT) for the desired measured current: VSHUNT = I × RSHUNT. Consider the following two restrictions to choose the proper value of the shunt resistor RSHUNT: • The voltage drop caused by the nominal current range must not exceed the recommended differential input voltage range: VSHUNT ≤ ±250 mV • The voltage drop caused by the maximum allowed overcurrent must not exceed the input voltage that causes a clipping output: VSHUNT ≤ VClipping The typically recommended RC filter in front of a ΔΣ modulator to improve signal-to-noise performance of the signal path is not required for the AMC1306. By design, the input bandwidth of the analog front-end of the device is limited as specified in the Electrical Characteristics table. For modulator output bitstream filtering, a device from TI's TMS320F2807x family of low-cost microcontrollers (MCUs) or TMS320F2837x family of dual-core MCUs is recommended. These families support up to eight channels of dedicated hardwired filter structures that significantly simplify system level design by offering two filtering paths per channel: one providing high accuracy results for the control loop and one fast response path for overcurrent detection. 9.2.1.3 Application Curve In motor control applications, a very fast response time for overcurrent detection is required. The time for fully settling the filter in case of a step-signal at the input of the modulator depends on the filter order; that is, a sinc3 filter requires three data updates for full settling (with fDATA = fCLK / OSR). Therefore, for overcurrent protection, filter types other than sinc3 can be a better choice; an alternative is the sinc2 filter. Figure 53 compares the settling times of different filter orders. The delay time of the sinc filter with a continuous signal is half of the settling time. 16 14 ENOB (Bits) 12 10 8 6 4 sinc1 sinc2 sinc3 2 0 0 2 4 6 8 10 12 14 Settling Time (µs) 16 18 20 D041 Figure 53. Measured Effective Number of Bits versus Settling Time 26 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 9.2.2 Isolated Voltage Sensing The AMC1306 is optimized for usage in current-sensing applications using low-impedance shunts. However, the device can also be used in isolated voltage-sensing applications if the affect of the (usually higher) impedance of the resistor used in this case is considered. High Voltage Potential 3.3 V or 5 V R1 AVDD R2 R4 AINP RIND 200 NŸ IIB R3 R5 û Modulator AINN R4' R3' R5' AGND VCM = 1.9 V AGND Figure 54. Using the AMC1306 for Isolated Voltage Sensing 9.2.2.1 Design Requirements Figure 54 shows a simplified circuit typically used in high-voltage-sensing applications. The high impedance resistors (R1 and R2) are used as voltage dividers and dominate the current value definition. The resistance of the sensing resistor R3 is chosen to meet the input voltage range of the AMC1306. This resistor and the differential input impedance of the device (the AMC1306x25 is 22 kΩ, the AMC1306x05 is 4.9 kΩ) also create a voltage divider that results in an additional gain error. With the assumption of R1, R2, and RIN having a considerably higher value than R3, the resulting total gain error can be estimated using Equation 4, with EG being the gain error of the AMC1306. EGtot = EG + R3 RIN (4) This gain error can be easily minimized during the initial system-level gain calibration procedure. 9.2.2.2 Detailed Design Procedure As indicated in Figure 54, the output of the integrated differential amplifier is internally biased to a common-mode voltage of 1.9 V. This voltage results in a bias current IIB through the resistive network R4 and R5 (or R4' and R5') used for setting the gain of the amplifier. The value range of this current is specified in the Electrical Characteristics table. This bias current generates additional offset error that depends on the value of the resistor R3. The initial system offset calibration does not minimize this effect because the value of the bias current depends on the actual common-mode amplitude of the input signal (as illustrated in Figure 55). Therefore, in systems with high accuracy requirements, a series resistor is recommended to be used at the negative input (AINN) of the AMC1306 with a value equal to the shunt resistor R3 (that is, R3' = R3 in Figure 54) to eliminate the effect of the bias current. Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 27 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com This additional series resistor (R3') influences the gain error of the circuit. The effect can be calculated using Equation 5 with R5 = R5' = 50 kΩ and R4 = R4' = 2.5 kΩ (for the AMC1306x05) or 12.5 kΩ (for the AMC1306x25). E G (%) R4 · § ¨ 1 R4' R3' ¸ u 100% © ¹ (5) 9.2.2.3 Application Curve Figure 55 shows the dependency of the input bias current on the common-mode voltage at the input of the AMC1306. 60 40 IIB (PA) 20 0 -20 -40 -60 -80 -0.5 0 0.5 1 1.5 VCM (V) 2 2.5 3 3.5 D005 Figure 55. Input Bias Current vs Common-Mode Input Voltage 9.2.3 Do's and Don'ts Do not leave the inputs of the AMC1306 unconnected (floating) when the device is powered up. If both modulator inputs are left floating, the input bias current drives these inputs to the output common-mode of the analog frontend of approximately 2 V. If that voltage is above the specified input common-mode range, the front gain diminishes and the modulator outputs a bitstream resembling a zero input differential voltage. 28 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 10 Power Supply Recommendations In a typical frequency-inverter application, the high-side power supply (AVDD) for the device is directly derived from the floating power supply of the upper gate driver. For lowest system-level cost, a Zener diode can be used to limit the voltage to 5 V or 3.3 V (±10%). Alternatively a low-cost low-drop regulator (LDO), for example the LM317-N, can be used to adjust the supply voltage level and minimize noise on the power-supply node. A lowESR decoupling capacitor of 0.1 µF is recommended for filtering this power-supply path. Place this capacitor (C2 in Figure 56) as close as possible to the AVDD pin of the AMC1306 for best performance. If better filtering is required, an additional 10-µF capacitor can be used. The floating ground reference (AGND) is derived from the end of the shunt resistor that is connected to the negative input (AINN) of the device. If a four-pin shunt is used, the device inputs are connected to the inner leads and AGND is connected to one of the outer leads of the shunt. For decoupling of the digital power supply on the controller side, a 0.1-µF capacitor is recommended to be placed as close to the DVDD pin of the AMC1306 as possible, followed by an additional capacitor in the range of 1 µF to 10 µF. R1 800 Gate Driver Z1 1N751A C1 10 F AMC1306Mx 5.1 V AVDD C2 0.1 F AGND RSHUNT AINN To Load AINP 3.0 V, 3.3 V, or 5.0 V DVDD Reinforced Isolation HV+ Floating Power Supply 20 V C4 0.1 F C5 2.2 F DGND DOUT SD-Dx CLKIN SD-Cx PWMx Gate Driver TMS320F2837x HV- Copyright © 2017, Texas Instruments Incorporated Figure 56. Decoupling the AMC1306 Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 29 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com 11 Layout 11.1 Layout Guidelines A layout recommendation showing the critical placement of the decoupling capacitors (as close as possible to the AMC1306) and placement of the other components required by the device is shown in Figure 57. For best performance, place the shunt resistor close to the VINP and VINN inputs of the AMC1306 and keep the layout of both connections symmetrical. 11.2 Layout Example Clearance area, to be kept free of any conductive materials. 0.1 µF 0.1 µF 2.2 µF SMD 0603 SMD 0603 SMD 0603 SMD 0603 AVDD Shunt Resistor To Floating Power Supply 2.2 µF 1 8 DVDD CLKIN From Clock Source AINN DOUT To Digital Filter (MCU) AGND DGND AINP AMC1306x LEGEND Copper Pour and Traces High-Side Area Controller-Side Area Via to Ground Plane Copyright © 2017, Texas Instruments Incorporated Via to Supply Plane Figure 57. Recommended Layout of the AMC1306x 30 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 www.ti.com SBAS734 – MARCH 2017 12 Device and Documentation Support 12.1 Device Support 12.1.1 Device Nomenclature 12.1.1.1 Isolation Glossary See the Isolation Glossary 12.2 Documentation Support 12.2.1 Related Documentation For related documentation see the following: • AMC1210 Quad Digital Filter for 2nd-Order Delta-Sigma Modulator • MSP430F677x Polyphase Metering SoCs • TMS320F2807x Piccolo™ Microcontrollers • TMS320F2837xD Dual-Core Delfino™ Microcontrollers • ISO72x Digital Isolator Magnetic-Field Immunity • Combining the ADS1202 with an FPGA Digital Filter for Current Measurement in Motor Control Applications • CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family 12.3 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to order now. Table 2. Related Links PARTS PRODUCT FOLDER ORDER NOW TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY AMC1306E05 Click here Click here Click here Click here Click here AMC1306E25 Click here Click here Click here Click here Click here AMC1306M05 Click here Click here Click here Click here Click here AMC1306M25 Click here Click here Click here Click here Click here 12.4 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.5 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.6 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. Copyright © 2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 31 AMC1306E05, AMC1306E25, AMC1306M05, AMC1306M25 SBAS734 – MARCH 2017 www.ti.com 12.7 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 12.8 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 32 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: AMC1306E05 AMC1306E25 AMC1306M05 AMC1306M25 PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2017 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) AMC1306E25DWV PREVIEW SOIC DWV 8 64 TBD Call TI Call TI -40 to 125 AMC1306E25DWVR PREVIEW SOIC DWV 8 1000 TBD Call TI Call TI -40 to 125 AMC1306M25DWV PREVIEW SOIC DWV 8 64 TBD Call TI Call TI -40 to 125 AMC1306M25DWVR PREVIEW SOIC DWV 8 1000 TBD Call TI Call TI -40 to 125 1306E25 1306M25 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 9-Mar-2017 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2017 TAPE AND REEL INFORMATION *All dimensions are nominal Device AMC1306M25DWVR Package Package Pins Type Drawing SOIC DWV 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1000 330.0 16.4 Pack Materials-Page 1 12.05 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.15 3.3 16.0 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2017 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) AMC1306M25DWVR SOIC DWV 8 1000 367.0 367.0 38.0 Pack Materials-Page 2 PACKAGE OUTLINE DWV0008A SOIC - 2.8 mm max height SCALE 2.000 SOIC C SEATING PLANE 11.5 0.25 TYP PIN 1 ID AREA 0.1 C 6X 1.27 8 1 2X 3.81 5.95 5.75 NOTE 3 4 5 0.51 0.31 0.25 C A 8X A 7.6 7.4 NOTE 4 B B 2.8 MAX 0.33 TYP 0.13 SEE DETAIL A (2.286) 0.25 GAGE PLANE 0 -8 0.46 0.36 1.0 0.5 (2) DETAIL A TYPICAL 4218796/A 09/2013 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm, per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm, per side. www.ti.com EXAMPLE BOARD LAYOUT DWV0008A SOIC - 2.8 mm max height SOIC 8X (1.8) SEE DETAILS SYMM 8X (0.6) SYMM 6X (1.27) (10.9) LAND PATTERN EXAMPLE 9.1 mm NOMINAL CLEARANCE/CREEPAGE SCALE:6X METAL SOLDER MASK OPENING SOLDER MASK OPENING 0.07 MAX ALL AROUND METAL 0.07 MIN ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4218796/A 09/2013 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DWV0008A SOIC - 2.8 mm max height SOIC 8X (1.8) SYMM 8X (0.6) SYMM 6X (1.27) (10.9) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:6X 4218796/A 09/2013 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products; by downloading, accessing or using any particular TI Resource in any way, you (individually or, if you are acting on behalf of a company, your company) agree to use it solely for this purpose and subject to the terms of this Notice. TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TI products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections, enhancements, improvements and other changes to its TI Resources. You understand and agree that you remain responsible for using your independent analysis, evaluation and judgment in designing your applications and that you have full and exclusive responsibility to assure the safety of your applications and compliance of your applications (and of all TI products used in or for your applications) with all applicable regulations, laws and other applicable requirements. You represent that, with respect to your applications, you have all the necessary expertise to create and implement safeguards that (1) anticipate dangerous consequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm and take appropriate actions. You agree that prior to using or distributing any applications that include TI products, you will thoroughly test such applications and the functionality of such TI products as used in such applications. TI has not conducted any testing other than that specifically described in the published documentation for a particular TI Resource. You are authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. TI RESOURCES ARE PROVIDED “AS IS” AND WITH ALL FAULTS. TI DISCLAIMS ALL OTHER WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED, REGARDING TI RESOURCES OR USE THEREOF, INCLUDING BUT NOT LIMITED TO ACCURACY OR COMPLETENESS, TITLE, ANY EPIDEMIC FAILURE WARRANTY AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY YOU AGAINST ANY CLAIM, INCLUDING BUT NOT LIMITED TO ANY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON ANY COMBINATION OF PRODUCTS EVEN IF DESCRIBED IN TI RESOURCES OR OTHERWISE. IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL, DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. You agree to fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of your noncompliance with the terms and provisions of this Notice. This Notice applies to TI Resources. Additional terms apply to the use and purchase of certain types of materials, TI products and services. These include; without limitation, TI’s standard terms for semiconductor products http://www.ti.com/sc/docs/stdterms.htm), evaluation modules, and samples (http://www.ti.com/sc/docs/sampterms.htm). Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2017, Texas Instruments Incorporated