LINER LTC1483 Ultra-low power rs485 low emi transceiver with shutdown Datasheet

LTC1483
Ultra-Low Power RS485 Low EMI
Transceiver with Shutdown
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DESCRIPTIO
FEATURES
■
■
■
■
■
■
■
■
■
■
■
■
Low Power: ICC = 120µA Max with Driver Disabled
ICC = 500µA Max with Driver Enabled, No Load
1µA Quiescent Current in Shutdown Mode
Controlled Slew Rate Driver for Reduced EMI
Single 5V Supply
Drivers/Receivers Have ±10kV ESD Protection
– 7V to 12V Common-Mode Range Permits ±7V
Ground Difference Between Devices on the Data Line
Thermal Shutdown Protection
Power Up/Down Glitch-Free Driver Outputs Permit
Live Insertion or Removal of Transceiver
Driver Maintains High Impedance in Three-State
or with the Power Off
Up to 32 Transceivers on the Bus
Pin Compatible with the LTC485
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APPLICATI
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■
S
Battery-Powered RS485/RS422 Applications
Low Power RS485/RS422 Transceiver
Level Translator
The LTC®1483 is an ultra-low power differential line transceiver designed for data transmission standard RS485
applications with extended common-mode range (– 7V to
12V). It will also meet the requirements of RS422. The
LTC1483 features output drivers with controlled slew rate,
decreasing the EMI radiated from the RS485 lines, and
improving signal fidelity with misterminated lines. The
CMOS design offers significant power savings over its
bipolar counterparts without sacrificing ruggedness against
overload or ESD damage. Typical quiescent current is only
80µA while operating and less than 1µA in shutdown.
The driver and receiver feature three-state outputs, with
the driver outputs maintaining high impedance over the
entire common-mode range. Excessive power dissipation
caused by bus contention or faults is prevented by a
thermal shutdown circuit which forces the driver outputs
into a high impedance state. The receiver has a fail-safe
feature which guarantees a high output state when the
inputs are left open. I/O pins are protected against multiple
ESD strikes of over ±10kV.
The LTC1483 is fully specified over the commercial and
extended industrial temperature range and is available in
8-pin DIP and SO packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATI
RO1
R
VCC1
RE1
RTERM
DI
DE1
DI1
D
GND1
A–B
RTERM
RO2
R
VCC2
RE2
RO
DE2
DI2
D
GND2
LTC1483 • TA01
1483 TA02
sn1483 1483fs
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LTC1483
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RATI GS
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AXI U
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ABSOLUTE
PACKAGE/ORDER I FOR ATIO
(Note 1)
Supply Voltage (VCC) .............................................. 12V
Control Input Voltage ..................... – 0.5V to VCC + 0.5V
Driver Input Voltage ....................... – 0.5V to VCC + 0.5V
Driver Output Voltage ........................................... ±14V
Receiver Input Voltage .......................................... ±14V
Receiver Output Voltage ................ – 0.5V to VCC + 0.5V
Operating Temperature Range
LTC1483C ....................................... 0°C ≤ TA ≤ 70°C
LTC1483I .................................... – 40°C ≤ TA ≤ 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ELECTRICAL CHARACTERISTICS
ORDER PART
NUMBER
TOP VIEW
RO 1
R
RE 2
DE 3
DI 4
D
N8 PACKAGE
8-LEAD PDIP
8
VCC
7
B
6
A
5
GND
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 130°C/ W (N8)
TJMAX = 125°C, θJA = 150°C/ W (S8)
LTC1483CN8
LTC1483IN8
LTC1483CS8
LTC1483IS8
S8 PART MARKING
1483
1483I
Consult factory for Military grade parts.
VCC = 5V, (Notes 2, 3) unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
VOD1
Differential Driver Output Voltage (Unloaded)
IO = 0
●
VOD2
Differential Driver Output Voltage (with Load)
R = 50Ω (RS422)
R = 27Ω (RS485), Figure 1
●
●
TYP
2
1.5
MAX
UNITS
5
V
5
V
V
∆VOD
Change in Magnitude of Driver Differential Output
Voltage for Complementary Output States
R = 27Ω or R = 50Ω, Figure 1
●
0.2
V
VOC
Driver Common-Mode Output Voltage
R = 27Ω or R = 50Ω, Figure 1
●
3
V
∆VOC
Change in Magnitude of Driver Common-Mode
Output Voltage for Complementary Output States
R = 27Ω or R = 50Ω, Figure 1
●
0.2
V
VIH
Input High Voltage
DE, DI, RE
●
VIL
Input Low Voltage
DE, DI, RE
●
0.8
IIN1
Input Current
DE, DI, RE
●
±2
µA
IIN2
Input Current (A, B)
DE = 0, VCC = 0V or 5.25V, VIN = 12V
DE = 0, VCC = 0V or 5.25V, VIN = – 7V
●
●
1.0
– 0.8
mA
mA
VTH
Differential Input Threshold Voltage for Receiver
– 7V ≤ VCM ≤ 12V
●
∆VTH
Receiver Input Hysteresis
VCM = 0V
●
VOH
Receiver Output High Voltage
IO = – 4mA, VID = 200mV
●
VOL
Receiver Output Low Voltage
IO = 4mA, VID = – 200mV
●
0.4
V
IOZR
Three-State (High Impedance) Output
Current at Receiver
VCC = Max, 0.4V ≤ VO ≤ 2.4V
●
±1
µA
RIN
Receiver Input Resistance
– 7V ≤ VCM ≤ 12V
●
ICC
Supply Current
No Load, Output Enabled
No Load, Output Disabled
●
●
ISHDN
Supply Current in Shutdown Mode
DE = 0, RE = VCC
10
µA
IOSD1
Driver Short-Circuit Current, VOUT = HIGH
– 7V ≤ VO ≤ 12V
●
35
250
mA
IOSD2
Driver Short-Circuit Current, VOUT = LOW
– 7V ≤ VO ≤ 12V
●
35
250
mA
IOSR
Receiver Short-Circuit Current
0V ≤ VO ≤ VCC
●
7
85
mA
2
V
– 0.2
0.2
45
V
mV
3.5
12
V
V
25
300
80
1
kΩ
500
120
µA
µA
sn1483 1483fs
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LTC1483
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SWITCHI G CHARACTERISTICS
VCC = 5V, (Notes 2, 3) unless otherwise noted.
LTC1483
TYP
SYMBOL
PARAMETER
CONDITIONS
MIN
tPLH
Driver Input to Output
tPHL
Driver Input to Output
RDIFF = 54Ω, CL1 = CL2 = 100pF,
(Figures 3, 5)
MAX
UNITS
●
150
1200
ns
●
150
1200
ns
tSKEW
Driver Output to Output
●
tr, tf
Driver Rise or Fall Time
●
150
600
ns
1200
ns
tZH
Driver Enable to Output High
CL = 100pF (Figures 4, 6), S2 Closed
●
100
1500
ns
tZL
Driver Enable to Output Low
CL = 100pF (Figures 4, 6), S1 Closed
●
100
1500
ns
tLZ
Driver Disable Time from Low
CL = 15pF (Figures 4, 6), S1 Closed
●
150
1500
ns
tHZ
Driver Disable Time from High
CL = 15pF (Figures 4, 6), S2 Closed
●
150
1500
ns
tPLH
Receiver Input to Output
30
140
200
ns
Receiver Input to Output
RDIFF = 54Ω, CL1 = CL2 = 100pF,
(Figures 3, 7)
●
tPHL
●
30
140
200
ns
tSKD
tPLH – tPHL Differential Receiver Skew
tZL
Receiver Enable to Output Low
tZH
Receiver Enable to Output High
tLZ
100
●
13
CRL = 15pF (Figures 2, 8), S1 Closed
●
20
50
ns
CRL = 15pF (Figures 2, 8), S2 Closed
●
20
50
ns
Receiver Disable from Low
CRL = 15pF (Figures 2, 8), S1 Closed
●
20
50
ns
tHZ
Receiver Disable from High
CRL = 15pF (Figures 2, 8), S2 Closed
●
20
50
fMAX
Maximum Data Rate
tSHDN
Time to Shutdown
tZH(SHDN)
tZL(SHDN)
●
250
DE = 0, RE =
●
50
Driver Enable from Shutdown to Output High
CL = 100pF (Figures 4, 6), S2 Closed
Driver Enable from Shutdown to Output Low
CL = 100pF (Figures 4, 6), S1 Closed
tZH(SHDN)
Receiver Enable from Shutdown to Output High
tZL(SHDN)
Receiver Enable from Shutdown to Output Low
ns
ns
kbits/s
600
ns
●
2000
ns
●
2000
ns
CL = 15pF (Figures 2, 8), S2 Closed
●
3500
ns
CL = 15pF (Figures 2, 8), S1 Closed
●
3500
ns
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Absolute maximum ratings are those beyond which the safety of
the device cannot be guaranteed.
200
Note 2: All currents into device pins are positive; all currents out ot device
pins are negative. All voltages are referenced to device ground unless
otherwise specified.
Note 3: All typicals are given for VCC = 5V and TA = 25°C.
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TYPICAL PERFORMANCE CHARACTERISTICS
Receiver tPLH – tPHL vs
Temperature
Supply Current vs Temperature
350
DRIVER ENABLED
200
150
100
DRIVER DISABLED
12
60
10
8
6
4
2
50
0
–50 –25
70
OUTPUT CURRENT (mA)
tPLH – tPHL (ns)
SUPPLY CURRENT (µA)
250
14
TA = 25°C
THERMAL SHUTDOWN
WITH DRIVER ENABLED
300
Driver Differential Output Voltage
vs Output Current
0
25 50 75 100 125 150 175
TEMPERATURE (°C)
1483 G01
0
–50 –25
50
40
30
20
10
0
50
25
75
0
TEMPERATURE (°C)
100
125
1483 G02
0
1
2
4
3
OUTPUT VOLTAGE (V)
5
1483 G03
sn1483 1483fs
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LTC1483
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TYPICAL PERFORMANCE CHARACTERISTICS
Driver Differential Output Voltage
vs Temperature
Driver Output Low Voltage
vs Output Current
70
2.5
0
TA = 25°C
RL = 54Ω
2.4
2.1
2.0
1.9
1.8
1.7
OUTPUT CURRENT (mA)
2.2
50
40
30
20
10
0
–25
50
0
75
25
TEMPERATURE (°C)
100
0
125
–20
–30
–40
–50
–60
–70
–80
1.6
1.5
–50
TA = 25°C
–10
60
2.3
OUTPUT CURRENT (mA)
DIFFERENTIAL VOLTAGE (V)
Driver Output High Voltage
vs Output Current
1
2
–90
4
3
0
OUTPUT VOLTAGE
1
3
2
OUTPUT VOLTAGE (V)
1483 G05
1483 G04
5
4
1483 G06
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PIN FUNCTIONS
RO (Pin 1): Receiver Output. If the receiver output is
enabled (RE low), then if A > B by 200mV, RO will be high.
If A < B by 200mV, then RO will be low.
RE (Pin 2): Receiver Output Enable. A low enables the
receiver output, RO. A high input forces the receiver
output into a high impedance state.
DE (Pin 3): Driver Outputs Enable. A high on DE enables
the driver output. A, B and the chip will function as a line
driver. A low input will force the driver outputs into a high
impedance state and the chip will function as a line
receiver. If RE is high and DE is low, the part will enter a low
power (1µA) shutdown state.
DI (Pin 4): Driver Input. If the driver outputs are enabled
(DE high) then a low on DI forces the outputs A low and B
high. A high on DI with the driver outputs enabled will force
A high and B low.
GND (Pin 5): Ground.
A (Pin 6): Driver Output/Receiver Input.
B (Pin 7): Driver Output/Receiver Input.
VCC (Pin 8): Positive Supply. 4.75V < VCC < 5.25V.
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FU CTIO TABLES
LTC1483 Transmitting
LTC1483 Receiving
INPUTS
OUTPUTS
INPUTS
OUTPUTS
RE
DE
DI
B
A
RE
DE
A–B
RO
X
1
1
0
1
0
0
≥ 0.2V
1
X
1
0
1
0
0
0
≤ – 0.2V
0
0
0
X
Z
Z
0
0
Inputs Open
1
1
0
X
Z*
Z*
1
0
X
Z*
*Shutdown mode for LTC1483
*Shutdown mode for LTC1483
sn1483 1483fs
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LTC1483
TEST CIRCUITS
A
1k
VCC
VOD
R
S1
TEST POINT
RECEIVER
OUTPUT
R
VOC
1k
CRL
S2
B
LTC1483 • F02
LTC1483 • F01
Figure 1. Driver DC Test Load
Figure 2. Receiver Timing Test Load
3V
DE
A
DI
CL1
B
CL2
S2
CL
15pF
RE
VCC
500Ω
OUTPUT
UNDER TEST
RO
RDIFF
B
S1
A
LTC1483 • F04
LTC1483 • F03
Figure 3. Driver/Receiver Timing Test Circuit
Figure 4. Driver Timing Test Load
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W
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SWITCHI G TI E WAVEFOR S
3V
tr ≤ 10ns, tf ≤ 10ns
1.5V
DI
1.5V
0V
t PLH
1/2 VO
t PHL
B
VO
A
VO
0V
–VO
tSKEW
1/2 VO
t SKEW
90%
90%
10%
VDIFF = V(A) – V(B)
10%
tr
LTC1483 • F05
tf
Figure 5. Driver Propagation Delays
3V
tr ≤ 10ns, tf ≤ 10ns
1.5V
DE
1.5V
0V
5V
A, B
t ZL(SHDN), t ZL
2.3V
OUTPUT NORMALLY LOW
0.5V
2.3V
OUTPUT NORMALLY HIGH
0.5V
VOL
VOH
A, B
t LZ
0V
t ZH(SHDN), t ZH
t HZ
LTC1483 • F06
Figure 6. Driver Enable and Disable Times
sn1483 1483fs
5
LTC1483
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W
W
SWITCHI G TI E WAVEFOR S
VOH
1.5V
RO
VOL
tr ≤ 10ns, tf ≤ 10ns
t PHL
VOD2
A–B
–VOD2
1.5V
OUTPUT
0V
t PLH
0V
INPUT
LTC1483 • F07
Figure 7. Receiver Propagation Delays
3V
1.5V
RE
1.5V
tr ≤ 10ns, tf ≤ 10ns
0V
t ZL(SHDN), tZL
5V
RO
RO
t LZ
1.5V
OUTPUT NORMALLY LOW
0.5V
1.5V
OUTPUT NORMALLY HIGH
0.5V
0V
t HZ
t ZH(SHDN), tZH
LTC1483 • F08
Figure 8. Receiver Enable and Disable Times
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APPLICATIO S I FOR ATIO
Basic Theory of Operation
Traditionally RS485 transceivers have been designed using bipolar technology because the common-mode range
of the device must extend beyond the supplies and the
device must be immune to ESD damage and latch-up.
Unfortunately, most bipolar devices draw a large amount
of supply current, which is unacceptable for the numerous
applications that require low power consumption. The
LTC1483 is a CMOS RS485/RS422 transceiver which
features ultra-low power consumption without sacrificing
ESD and latch-up immunity.
The LTC1483 uses a proprietary driver output stage,
which allows a common-mode range that extends beyond
the power supplies while virtually eliminating latch-up and
providing excellent ESD protection. Figure 9 shows the
LTC1483 output stage while Figure 10 shows a conventional CMOS output stage.
When the conventional CMOS output stage of Figure 10
enters a high impedance state, both the P-channel (P1)
and the N-channel (N1) are turned off. If the output is then
driven above VCC or below ground, the P+/N -well diode
(D1) or the N+/P-substrate diode (D2) respectively will
turn on and clamp the output to the supply. Thus, the
output stage is no longer in a high impedance state and is
not able to meet the RS485 common-mode range requirement. In addition, the large amount of current flowing
through either diode will induce the well-known CMOS
latch-up condition, which could destroy the device.
VCC
VCC
SD3
P1
P1
D1
D1
OUTPUT
LOGIC
N1
OUTPUT
LOGIC
SD4
D2
LTC1483 • F09
Figure 9. LTC1483 Output Stage
N1
D2
LTC1483 • F10
Figure 10. Conventional
CMOS Output Stage
sn1483 1483fs
6
LTC1483
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APPLICATIO S I FOR ATIO
The LTC1483 output stage will maintain a high impedance
state until the breakdown of the N-channel or P-channel is
reached when going positive or negative respectively. The
output will be clamped to either VCC or ground by a Zener
voltage plus a Schottky diode drop, but this voltage is well
beyond the RS485 operating range. An ESD cell protects
output against multiple ±10kV human body model ESD
strikes. Because the ESD injected current in the N-well or
substrate consists of majority carriers, latch-up is prevented by careful layout techniques.
Slew Rate
The LTC1483 is designed for systems that are sensitive to
electromagnetic radiation. The part features a slew rate
limited driver that reduces high frequency electromagnetic emissions, while improving signal fidelity by reducing reflections due to misterminated cables. Figures 11
and 12 show the spectrum of the signal at the driver output
for a standard slew rate RS485 driver and the slew rate
limited LTC1483. The LTC1483 shows significant reduction of the high frequency harmonics. Because the driver
is slew rate limited, the maximum operating frequency is
limited to 250kbits/s.
Low Power Operation
The LTC1483 is designed to operate with a quiescent
current of 120µA max. With the driver in three-state ICC will
20
10
LOG MAGNITUDE (dBVRMS)
0
–10
–20
–30
–40
–50
–60
–70
–80
0
1
2
3
4
5
FREQUENCY (MHz)
Figure 11. Typical RS485 Driver Output Spectrum
Transmitting at 150kHz
20
10
0
LOG MAGNITUDE (dBVRMS)
The LTC1483 output stage of Figure 9 eliminates these
problems by adding two Schottky diodes, SD3 and SD4.
The Schottky diodes are fabricated by a proprietary modification to the standard N-well CMOS process. When the
output stage is operating normally, the Schottky diodes
are forward biased and have a small voltage drop across
them. When the output is in the high impedance state and
is driven above VCC or below ground, the parasitic diode
D1 or D2 still turns on, but SD3 or SD4 will reverse bias and
prevent current from flowing into the N-well or the substrate. Thus the high impedance state is maintained even
with the output voltage beyond the supplies. With no
minority carrier current flowing into the N-well or substrate, latch-up is virtually eliminated under power-up or
power-down conditions.
–10
–20
–30
–40
–50
–60
–70
–80
0
1
2
3
5
4
FREQUENCY (MHz)
Figure 12. Slew Rate Limited LTC1483 Driver Output
Spectrum Transmitting at 150kHz
drop to this 120µA level. With the driver enabled there will
be additional current drawn by the internal 12k resistor.
Under normal operating conditions this additional current
is overshadowed by the current drawn by the external bus
impedance.
sn1483 1483fs
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights.
7
LTC1483
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APPLICATIO S I FOR ATIO
Shutdown Mode
Both the receiver output (RO) and the driver outputs (A, B)
can be placed in three-state mode by bringing RE high and
DE low respectively. In addition, the LTC1483 will enter
shutdown mode when RE is high and DE is low.
In shutdown the LTC1483 typically draws only 1µA of
supply current. In order to guarantee that the part goes
into shutdown, RE must be high and DE must be low for
at least 600ns simultaneously. If this time duration is less
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PACKAGE DESCRIPTION
than 50ns the part will not enter shutdown mode. Toggling
either RE or DE will wake the LTC1483 back up within
3.5µs.
If the slow slew rate driver was active immediately prior to
shutdown, the supply current will not drop to 1µA until the
driver outputs have reached a steady state; this can take as
long as 2.6µs under worst case conditions. If the driver
was disabled prior to shutdown the supply current will
drop to 1µA immediately.
Dimension in inches (millimeters) unless otherwise noted.
N Package
8-Lead Plastic DIP
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
(
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
+0.025
0.325 –0.015
8.255
+0.635
–0.381
)
0.125
(3.175)
MIN
0.005
(0.127)
MIN
0.400*
(10.160)
MAX
0.130 ± 0.005
(3.302 ± 0.127)
0.015
(0.380)
MIN
7
6
5
1
2
3
4
0.255 ± 0.015*
(6.477 ± 0.381)
0.018 ± 0.003
(0.457 ± 0.076)
0.100 ± 0.010
(2.540 ± 0.254)
8
N8 0695
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S Package
8-Lead Plastic SOIC
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.004 – 0.010
(0.101 – 0.254) 0.228 – 0.244
(5.791 – 6.197)
0.050
(1.270)
BSC
0.150 – 0.157**
(3.810 – 3.988)
1
2
3
4
SO8 0695
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DESCRIPTION
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sn1483 1483fs
8
Linear Technology Corporation
LT/GP 1094 10K • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
 LINEAR TECHNOLOGY CORPORATION 1994