Infineon IPD50N06S2L-13 Optimos power-transistor Datasheet

IPD50N06S2L-13
OptiMOS® Power-Transistor
Product Summary
Features
V DS
• N-channel Logic Level - Enhancement mode
55
R DS(on),max (SMD version)
• Automotive AEC Q101 qualified
ID
V
12.7
mΩ
50
A
• MSL1 up to 260°C peak reflow
• 175°C operating temperature
PG-TO252-3-11
• Green package (lead free)
• Ultra low Rds(on)
• 100% Avalanche tested
Type
Package
Marking
IPD50N06S2L-13
PG-TO252-3-11
PN06L13
Maximum ratings, at T j=25 °C, unless otherwise specified
Parameter
Symbol
Continuous drain current1)
ID
Conditions
T C=25 °C, V GS=10 V
T C=100 °C,
V GS=10 V2)
Value
50
Unit
A
50
Pulsed drain current2)
I D,pulse
T C=25 °C
200
Avalanche energy, single pulse
E AS
I D=50A
240
mJ
Gate source voltage
V GS
±20
V
Power dissipation
P tot
136
W
Operating and storage temperature
T j, T stg
-55 ... +175
°C
T C=25 °C
IEC climatic category; DIN IEC 68-1
Rev. 1.0
55/175/56
page 1
2006-07-18
IPD50N06S2L-13
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
Thermal characteristics
Thermal resistance, junction - case
R thJC
-
-
1.1
Thermal resistance, junction ambient, leaded
R thJA
-
-
100
SMD version, device on PCB
R thJA
minimal footprint
-
-
75
6 cm2 cooling area3)
-
-
50
K/W
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D= 1 mA
55
-
-
Gate threshold voltage
V GS(th)
V DS=V GS, I D=80 µA
1.2
1.6
2.0
Zero gate voltage drain current
I DSS
V DS=55 V, V GS=0 V,
T j=25 °C
-
0.01
1
-
1
100
V DS=55 V, V GS=0 V,
T j=125 °C2)
V
µA
Gate-source leakage current
I GSS
V GS=20 V, V DS=0 V
-
1
100
nA
Drain-source on-state resistance
R DS(on)
V GS=4.5 V, I D=34 A
-
12.7
16.7
mΩ
Drain-source on-state resistance
RDS(on)
V GS=10 V, I D=34 A
-
10.2
12.7
mΩ
Rev. 1.0
page 2
2006-07-18
IPD50N06S2L-13
Parameter
Symbol
Values
Conditions
Unit
min.
typ.
max.
-
1800
-
-
508
-
Dynamic characteristics2)
Input capacitance
C iss
Output capacitance
C oss
Reverse transfer capacitance
Crss
-
172
-
Turn-on delay time
t d(on)
-
9
-
Rise time
tr
-
29
-
Turn-off delay time
t d(off)
-
43
-
Fall time
tf
-
12
-
Gate to source charge
Q gs
-
6
8
Gate to drain charge
Q gd
-
18
26
Gate charge total
Qg
-
54
69
Gate plateau voltage
V plateau
-
3.4
-
V
-
-
50
A
-
-
200
V GS=0 V, V DS=25 V,
f =1 MHz
V DD=30 V, V GS=10 V,
I D=50 A, R G=3.6 Ω
pF
ns
Gate Charge Characteristics2)
V DD=44 V, I D=50 A,
V GS=0 to 10 V
nC
Reverse Diode
Diode continous forward current2)
IS
Diode pulse current2)
I S,pulse
Diode forward voltage
V SD
V GS=0 V, I F=50 A,
T j=25 °C
-
0.9
1.3
V
Reverse recovery time2)
t rr
V R=30 V, I F=I S,
di F/dt =100 A/µs
-
52
-
ns
Reverse recovery charge2)
Q rr
V R=30 V, I F=I S,
di F/dt =100 A/µs
-
99
-
nC
T C=25 °C
1)
Current is limited by bondwire; with an RthJC=1.1 K/W the chip is able to carry 72 A. For detailed
information see Application Note ANPS071E at www.infineon.com/optimos
2)
Defined by design. Not subject to production test.
3)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 1.0
page 3
2006-07-18
IPD50N06S2L-13
1 Power dissipation
2 Drain current
P tot = f(T C); V GS ≥ 6 V
I D = f(T C); V GS ≥ 10 V
160
50
140
120
40
I D [A]
P tot [W]
100
80
60
30
20
40
10
20
0
0
0
50
100
150
200
0
50
100
T C [°C]
150
200
T C [°C]
3 Safe operating area
4 Max. transient thermal impedance
I D = f(V DS); T C = 25 °C; D = 0
Z thJC = f(t p)
parameter: t p
parameter: D =t p/T
1000
1 µs
100
10 µs
100
Z thJC [K/W]
I D [A]
100 µs
1 ms
0.1
10-1
0.05
0.02
10
0.01
-2
10
single pulse
10-3
1
0.1
1
10
100
10-6
10-5
10-4
10-3
10-2
10-1
100
t p [s]
V DS [V]
Rev. 1.0
10-7
page 4
2006-07-18
IPD50N06S2L-13
5 Typ. output characteristics
6 Typ. drain-source on-state resistance
I D = f(V DS); T j = 25 °C
R DS(on) = (I D); T j = 25 °C
parameter: V GS
parameter: V GS
200
55
10 V
3.5 V
5V
3V
120
35
R DS(on) [mΩ]
45
I D [A]
160
4V
80
25
4V
3.5 V
40
15
4.5 V
5V
3V
10 V
2.5 V
0
0
1
2
3
4
5
6
5
7
0
20
40
V DS [V]
60
7 Typ. transfer characteristics
8 Typ. Forward transconductance
I D = f(V GS); V DS = 6V
g fs = f(I D); T j = 25°C
parameter: T j
parameter: g fs
100
-55 °C
80
100
80
100
I D [A]
120
25 °C 175 °C
90
100
80
70
80
g fs [S]
I D [A]
60
50
60
40
40
30
20
20
10
0
0
1
2
3
4
5
Rev. 1.0
0
20
40
60
I D [A]
V GS [V]
page 5
2006-07-18
IPD50N06S2L-13
10 Typ. gate threshold voltage
R DS(ON) = f(T j)
V GS(th) = f(T j); V GS = V DS
parameter: I D = 34 A; VGS = 10 V
parameter: I D
25
2.5
20
2
15
1.5
400 µA
V GS(th) [V]
R DS(on) [mΩ]
9 Typ. Drain-source on-state resistance
10
5
80 µA
1
0.5
0
0
-60
-20
20
60
100
140
180
-60
-20
20
60
100
140
180
T j [°C]
T j [°C]
11 Typ. capacitances
12 Typical forward diode characteristicis
C = f(V DS); V GS = 0 V; f = 1 MHz
IF = f(VSD)
parameter: T j
104
103
102
I F [A]
C [pF]
Ciss
103
Coss
101
175 °C
25 °C
Crss
102
100
0
5
10
15
20
25
30
V DS [V]
Rev. 1.0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
V SD [V]
page 6
2006-07-18
IPD50N06S2L-13
13 Typical avalanche energy
14 Typ. gate charge
E AS = f(T j)
V GS = f(Q gate); I D = 50 A pulsed
parameter: I D
12
1000
12.5 A
10
800
8
44 V
11 V
V GS [V]
E AS [mJ]
600
25 A
6
400
4
50 A
200
2
0
0
25
50
75
100
125
150
0
175
10
20
T j [°C]
30
40
50
60
Q gate [nC]
15 Typ. drain-source breakdown voltage
16 Gate charge waveforms
V BR(DSS) = f(T j); I D = 1 mA
66
V GS
64
Qg
62
V BR(DSS) [V]
60
58
56
54
Q gate
52
Q gs
Q gd
50
-60
-20
20
60
100
140
180
T j [°C]
Rev. 1.0
page 7
2006-07-18
IPD50N06S2L-13
Published by
Infineon Technologies AG
Am Campeon 1-12
D-85579 Neubiberg
© Infineon Technologies AG 1999
All Rights Reserved.
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The information herein is given to describe certain components and shall not be considered as
a guarantee of characteristics.
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We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts stated herein.
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For further information on technology, delivery terms and conditions and prices, please contact your
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Warnings
Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact your nearest Infineon Technologies Office.
Infineon Technologies' components may only be used in life-support devices or systems with the
expressed written approval of Infineon Technologies, if a failure of such components can reasonably
be expected to cause the failure of that life-support device or system, or to affect the safety or
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in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,
it is reasonable to assume that the health of the user or other persons may be endangered.
Rev. 1.0
page 8
2006-07-18
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