IDT IDT74FCT3827ADB 3.3v cmos 10-bit buffer Datasheet

IDT54/74FCT3827A/B
3.3V CMOS 10-BIT
BUFFERS
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• 25 mil Center SSOP Packages
• Extended commercial range of -40°C to +85°C
• VCC = 3.3V ±0.3V, Normal Range or
VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µW typ. static)
• Rail-to-Rail output swing for increased noise margin
• Military product compliant to MIL-STD-883, Class B
The FCT3827A/B 10-bit bus drivers are built using an
advanced dual metal CMOS technology. These high speed,
low power buffers are ideal for high-performance bus interface
buffering for wide data/address paths or buses carrying parity.
The 10-bit buffers have NAND-ed output enables for maximum control flexibility.
All of the FCT3827 high performance interface components are designed for high-capacitance load drive capability,
while providing low-capacitance bus loading at both inputs
and outputs.
FUNCTIONAL BLOCK DIAGRAM
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
OE1 OE2
3092 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1995 Integrated Device Technology, Inc.
8.15
AUGUST 1995
DSC-4651/-
1
IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
OE1
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
GND
1
2
3
4 P24-1
5 D24-1
6 SO24-2
7 SO24-7
&
8
9 SO24-8
10
11
12
PIN DESCRIPTION
24
23
22
21
20
19
18
17
16
15
14
13
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
OE2
DI
I
Description
When both are LOW the outputs are
enabled. When either one or both are
HIGH the outputs are High Z.
10-bit data input.
YI
O
10-bit data output.
Inputs
Output
OE1
OE2
DI
YI
Function
L
L
H
X
L
L
X
H
L
H
X
X
L
H
Z
Z
Transparent
Three-State
3092 tbl 02
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
Rating
Commercial
Military
VTERM(2) Terminal Voltage
–0.5 to +4.6 –0.5 to +4.6
with Respect to
GND
(3)
VTERM
Terminal Voltage
–0.5 to +7.0 –0.5 to +7.0
with Respect to
GND
(4)
–0.5 to
VTERM
Terminal Voltage
–0.5 to
with Respect to
VCC + 0.5
VCC + 0.5
GND
TA
Operating
–40 to +85 –55 to +125
Temperature
TBIAS
Temperature
–55 to +125 –65 to +135
Under Bias
TSTG
Storage
–55 to +125 –65 to +150
Temperature
PT
Power Dissipation
1.0
1.0
Unit
V
I OUT
mA
–60 to +60
I
FUNCTION TABLE(1)
3092 drw 02
–60 to +60
I/O
OEI
3092 tbl 01
DIP/SOIC/SSOP/QSOP
TOP VIEW
DC Output
Current
Names
V
V
°C
°C
°C
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
CIN
Input
Capacitance
COUT
Output
Capacitance
W
3092 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. Vcc terminals.
3. Input terminals.
4. Output and I/O terminals.
Conditions
VIN = 0V
Typ.
3.5
VOUT = 0V
4.0
Max. Unit
6.0
pF
8.0
pF
3092 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
8.15
2
IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V; Military: TA = –55°C to +125°C, VCC = 2.7V to 3.6V
Symbol
VIH
Parameter
Input HIGH Level (Input pins)
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2.0
Typ.(2)
—
Max.
5.5
Guaranteed Logic LOW Level
2.0
—
VCC+0.5
–0.5
—
0.8
V
VI = 5.5V
—
—
±1
µA
VI = VCC
—
—
±1
VI = GND
—
—
±1
VI = GND
—
—
±1
VO = V CC
—
—
±1
VO = GND
—
—
±1
Input HIGH Level (I/O pins)
VIL
Input LOW Level
Unit
V
(Input and I/O pins)
II H
Input HIGH Current (Input pins)(6)
VCC = Max.
Input HIGH Current (I/O pins)(6)
II L
Input LOW Current (Input
pins)(6)
Input LOW Current (I/O pins)(6)
I OZH
High Impedance Output Current
VCC = Max.
pins) (6)
µA
I OZL
(3-State Output
VIK
Clamp Diode Voltage
VCC = Min., IIN = –18mA
—
–0.7
–1.2
V
I ODH
Output HIGH Current
VCC = 3.3V, V IN = V IH or VIL, VO = 1.5V(3)
–36
–60
–110
mA
I ODL
Output LOW Current
VCC = 3.3V, V IN = V IH or VIL, VO = 1.5V(3)
50
90
200
mA
VOH
Output HIGH Voltage
VCC– 0.2
—
—
V
2.4
3.0
—
2.4 (5)
3.0
—
—
—
0.2
VOL
Output LOW Voltage
I OS
Short Circuit Current(4)
VH
Input Hysteresis
I CCL
I CCH
I CCZ
Quiescent Power Supply Current
VCC = Min.
I OH = –0.1mA
VIN = VIH or V IL
I OH = –3mA
VCC = 3.0V
VIN = VIH or V IL
VCC = Min.
I OH = –6mA MIL.
I OH = –8mA COM'L.
I OL = 0.1mA
VIN = VIH or V IL
I OL = 16mA
—
0.2
0.4
I OL = 24mA
—
0.3
0.55
VCC = 3.0V
I OL = 24mA
VIN = VIH or V IL
VCC = Max., VO = GND(3)
—
0.3
0.50
–60
–135
–240
mA
—
150
—
mV
COM'L.
—
0.1
10
µA
MIL.
—
0.1
100
—
VCC = Max.,
VIN = GND or VCC
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. VOH = VCC –0.6V at rated current.
6. The test limits for this parameter is ± 5µA at TA = –55°C.
8.15
V
3092 lnk 05
3
IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Test Conditions(1)
VIN = VCC –0.6V(3)
Symbol
∆ICC
Parameter
Quiescent Power Supply Current
ICCD
Dynamic Power Supply Current (4)
VCC = Max.
Outputs Open
OE1 = OE2 = GND
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current (6)
VCC = Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
OE1 = OE2 = GND
One Bit Toggling
VCC = Max.
VCC = Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
OE1 = OE2 = GND
Ten Bits Toggling
Min.
—
Typ.(2)
2.0
Max.
30
Unit
µA
VIN = VCC
VIN = GND
—
60
85
µA/
MHz
VIN = VCC
VIN = GND
—
0.6
0.9
mA
VIN = VCC –0.6V
VIN = GND
—
0.6
0.9
VIN = VCC
VIN = GND
—
1.5
2.1 (5)
VIN = VCC –0.6V
VIN = GND
—
1.5
2.3 (5)
NOTES:
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 3.3V, +25°C ambient.
3. Per TTL driven input; all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
8.15
3092 tbl 06
4
IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3)
FCT3827A
Com'l.
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Parameter
Propagation Delay
DI to YI
Output Enable Time
OEI to YI
Output Disable Time
OEI to YI
FCT3827B
Mil.
Com'l.
Mil.
Condition(1)
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Min.(2)
Max.
Unit
CL = 50pF
RL = 500Ω
CL = 300pF(3)
RL = 500Ω
CL = 50pF
RL = 500Ω
CL = 300pF(3)
RL = 500Ω
CL = 5pF(3)
RL = 500Ω
CL = 50pF
RL = 500Ω
1.5
8.0
1.5
9.0
1.5
5.0
1.5
6.5
ns
1.5
15.0
1.5
17.0
1.5
13.0
1.5
14.0
1.5
12.0
1.5
13.0
1.5
8.0
1.5
9.0
1.5
23.0
1.5
25.0
1.5
15.0
1.5
16.0
1.5
9.0
1.5
9.0
1.5
6.0
1.5
7.0
1.5
10.0
1.5
10.0
1.5
7.0
1.5
8.0
ns
ns
3092 tbl 07
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays
and Enable/Disable times should be degraded by 20%.
8.15
5
IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other tests
6V
←
V
CC
500Ω
V
V
IN
Pulse
Generator
Open
GND
OUT
D.U.T.
50pF
R
T
C
Switch
6V
GND
Open
3092 lnk 08
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
500Ω
L
3092 drw 03
SET-UP, HOLD AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tH
tSU
tREM
tSU
PULSE WIDTH
3V
1.5V
0V
3V
1.5V
0V
LOW-HIGH-LOW
PULSE
1.5V
tW
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
3V
1.5V
0V
tH
3092 drw 05
3092 drw 04
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
SAME PHASE
INPUT TRANSITION
tPLH
tPHL
OUTPUT
tPLH
OPPOSITE PHASE
INPUT TRANSITION
tPHL
3V
1.5V
0V
VOH
1.5V
VOL
DISABLE
3V
1.5V
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
3V
1.5V
0V
SWITCH
6V
3V
1.5V
tPZH
OUTPUT
NORMALLY
HIGH
3092 drw 06
SWITCH
GND
0V
tPLZ
tPZL
3V
0.3V
VOL
tPHZ
0.3V
1.5V
0V
VOH
0V
3092 drw 07
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control DisableHIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
3. If VCC is below 3V, input voltage swings should be adjusted not to exceed
VCC.
8.15
6
IDT54/74FCT3827A/B
3.3V CMOS OCTAL BUFFERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
Temp. Range
FCT
X
Family
XX
Device Type
X
Package
X
Process
Blank
B
Commercial
MIL-STD-883, Class B
P
D
SO
PY
Q
Plastic DIP (P24-1)
CERDIP (D24-1)
Small Outline IC (SO24-2)
Shrink Small Outline Package (SO24-7)
Quarter-size Small Outline Package (SO24-8)
827A
827B
Non-Inverting 10-Bit Buffer
Inverting 10-Bit Buffer
3
3.3 Volt
54
74
–55°C to +125°C
–40°C to +85°C
3092 drw 08
8.15
7
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