Maxim MAX706PEUA 3v voltage monitoring, low-cost up supervisory circuit Datasheet

19-0099; Rev 5; 4/06
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
Features
The MAX706P/R/S/T, MAX706AP/AR/AS/AT, and
MAX708R/S/T microprocessor (µP) supervisory circuits
reduce the complexity and number of components
required to monitor +3V power-supply levels in +3V to
+5V µP systems. These devices significantly improve
system reliability and accuracy compared to separate
ICs or discrete components.
♦ µMAX Package, Small 8-Pin SO
The MAX706P/R/S/T and MAX706AP/AR/AS/AT supervisory circuits provide the following four functions:
1) A reset output during power-up, power-down, and
brownout conditions.
2) An independent watchdog output that goes low if the
watchdog input has not been toggled within 1.6s.
3) A 1.25V threshold detector for power-fail warning,
low-battery detection, or for monitoring a power
supply other than the main supply.
4) An active-low, manual-reset input.
♦ Debounced TTL/CMOS-Compatible Manual Reset
Input
The only difference between the MAX706R/AR,
MAX706S/AS, and MAX706T/AT is the reset-threshold
voltage levels, which are 2.63V, 2.93V, and 3.08V,
respectively. All have active-low reset output signals.
The MAX706P/AP are identical to the MAX706R/AR,
except the reset output signal is active-high. The watchdog timer function for the MAX706AP/AR/AS/AT disables when the WDI input is left open or connected to a
high-impedance state of a low-leakage tri-state output.
The MAX708R/S/T provide the same functions as the
MAX706R/S/T and MAX706AR/AS/AT except they do
not have a watchdog timer. Instead, they provide both
RESET and RESET outputs. As with the MAX706,
devices with R, S, and T suffixes have reset thresholds
of 2.63V, 2.93V, and 3.08V, respectively.
These devices are available in 8-pin SO, DIP, and
µMAX® packages and are fully specified over the operating temperature range.
♦ Precision Supply-Voltage Monitors
2.63V (MAX706P/R, MAX706AP/AR, and MAX708R)
2.93V (MAX706S, MAX706AS, and MAX708S)
3.08V (MAX706T, MAX706AT, and MAX708T)
♦ 200ms Reset Time Delay
♦ 100µA Quiescent Current
♦ WDI Disable Feature (MAX706AP/AR/AS/AT)
♦ Watchdog Timer: 1.6s Timeout
♦ Reset Output Signal:
Active-High Only (MAX706P, MAX706AP)
Active-Low Only (MAX706R/S/T, MAX706AR/AS/AT)
Active-High and Active-Low (MAX708R/S/T)
♦ Voltage Monitor for Power-Fail or Low-Battery
Warning
♦ 8-Pin Surface-Mount Package
♦ Guaranteed RESET Assertion to VCC = 1V
Ordering Information
PART†
TEMP
RANGE
MAX706PCPA
0°C to +70°C
8 PDIP
P8-1
MAX706PCSA
0°C to +70°C
8 SO
S8-2
MAX706PCUA
0°C to +70°C
8 µMAX
U8-1
MAX706PEPA
-40°C to +85°C
8 PDIP
P8-1
Portable Instruments
PKG
CODE
†SO, µMAX, and PDIP packages are available in lead-free.
Ordering Information continued at end of data sheet.
Pin Configurations appear at end of data sheet.
Typical Operating Circuits
Applications
Battery-Powered Equipment
PINPACKAGE
UNREGULATED
DC
MAX639
DC-DC
CONVERTER
+3V/+3.3V
VCC
Computers
Controllers
Intelligent Instruments
VCC
Critical µP Power Monitoring
PFI
PUSHBUTTON
SWITCH
µMAX is a registered trademark of Maxim Integrated Products, Inc.
µP
MAX706R/S/T
MAX706AR/AS/AT
MR
RESET
WDI
WDO
PFO
GND
RESET
I/O LINE
NMI
INTERRUPT
Typical Operating Circuits continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
General Description
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
ABSOLUTE MAXIMUM RATINGS
Terminal Voltage (with respect to GND)
VCC ........................................................................-0.3V to +6V
All Other Inputs (Note 1)..........................-0.3V to (VCC + 0.3V)
Input Current
VCC ..................................................................................20mA
GND .................................................................................20mA
Output Current (all outputs) ................................................20mA
Continuous Power Dissipation (TA = +70°C)
8-Pin CERDIP (derate 8mW/°C above +70°C)..............640mW
8-Pin PDIP (derate 9.1mW/°C above +70°C).............727.3mW
8-Pin SO (derate 5.9mW/°C above +70°C)................470.6mW
8-Pin µMAX (derate 4.5mW/oC above +70°C) ..............362mW
Operating Temperature Range
MAX70_C .............................................................0°C to +70°C
MAX70_E ..........................................................-40°C to +85°C
MAX70_M .......................................................-55°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: The input-voltage limits on PFI, WDI, and MR can be exceeded if the input current is less than 10mA.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(MAX70_P/R, MAX706AP/AR: VCC = 2.7V to 5.5V; MAX70_S, MAX706AS: VCC = 3.0V to 5.5V; MAX70_T, MAX706AT: VCC = 3.15V to
5.5V; TJ = TA = TMIN to TMAX, unless otherwise noted. Typical values are at TJ = TA = +25°C.) (Note 2)
PARAMETER
Supply Voltage Range
SYMBOL
CONDITIONS
VCC
VCC < 3.6V
Supply Current
ISUPPLY
VCC < 5.5V
Reset Threshold (Note 3)
(VCC Falling)
VRST
Reset Threshold Hysteresis
(Note 3)
VHYS
Reset Pulse Width (Note 3)
tRST
MIN
TYP
MAX
MAX70_C
1.0
5.5
MAX70_E/M
1.2
5.5
MAX706_C
90
200
MAX706_E/M
90
300
MAX708_C
50
200
MAX708_E/M
50
300
MAX706_C
135
350
MAX706_E/M
135
500
MAX708_C
65
350
MAX708_E/M
65
500
MAX70_P/R/, MAX706AP/AR
2.55
2.63
2.70
MAX70_S, MAX706AS
2.85
2.93
3.00
MAX70_T, MAX706AT
3.00
3.08
3.15
20
V
µA
V
mV
MAX70_P/R/, MAX706AP/AR VCC = 3.0V
140
200
280
MAX70_S, MAX706AS, VCC = 3.3V
140
200
280
VCC = 5V
UNITS
ms
200
RESET OUTPUT
Output-Voltage High
(MAX70_R/S/T)
(MAX706AR/AS/AT)
VOH
VRST(MAX) < VCC < 3.6V ISOURCE = 500µA
VOL
VRST(MAX) < VCC < 3.6V ISINK = 1.2mA
VOH
4.5V < VCC < 5.5V
IRSOURCE =
800µA
VOL
4.5V < VCC < 5.5V
ISINK = 3.2mA
VOL
2
0.8 x
VCC
0.3
VCC 1.5
V
0.4
MAX70_C VCC = 1.0V, ISINK = 50µA
0.3
MAX70_E/M: VCC = 1.2V, ISINK = 100µA
0.3
_______________________________________________________________________________________
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
(MAX70_P/R, MAX706AP/AR: VCC = 2.7V to 5.5V; MAX70_S, MAX706AS: VCC = 3.0V to 5.5V; MAX70_T, MAX706AT: VCC = 3.15V to
5.5V; TJ = TA = TMIN to TMAX, unless otherwise noted. Typical values are at TJ = TA = +25°C.) (Note 2)
PARAMETER
Output-Voltage High
(MAX706P) (MAX706AP)
Output-Voltage High
(MAX708_)
SYMBOL
CONDITIONS
MIN
VOH
VRST(MAX) < VCC < 3.6V ISOURCE = 215µA
VCC 0.6
VOL
VRST(MAX) < VCC < 3.6V ISINK = 1.2mA
VOH
4.5 < VCC < 5.5V
ISOURCE = 800µA
ISINK = 3.2mA
TYP
MAX
0.3
UNITS
V
VCC 1.5
VOL
4.5V < VCC < 5.5V
VOH
VRST(MAX) < VCC < 3.6V ISOURCE = 500µA 0.8 x VCC
VOL
VRST(MAX) < VCC < 3.6V ISINK = 500µA
VOH
4.5V < VCC < 5.5V
ISOURCE = 800µA
VOL
4.5V < VCC < 5.5V
ISINK = 1.2mA
0.4
0.3
V
VCC 1.5
0.4
WATCHDOG INPUT
MAX706P/R, MAX706AP/AR, VCC = 3.0V
1.00
1.60
2.25
1.00
1.60
2.25
VIL
MAX706S/T, MAX706AS/AT, VCC = 3.3V
VRST(MAX) < VCC
VIL = 0.4V
< 3.6V
4.5V < VCC <
VIH = 0.8V x VCC
5.5V
VRST(MAX) < VCC < 3.6V
VIH
VRST(MAX) < VCC < 3.6V
VIL
VCC = 5.0V
VIH
VCC = 5.0V
Watchdog Timeout Period
tWD
WDI Pulse Width
(MAX706_, MAX706A_)
tWP
Watchdog Input Threshold
(MAX706_, MAX706A_)
WDI Input Current
WDI = 0V or VCC
s
100
ns
50
0.6
0.7 x
VCC
V
0.8
3.5
MAX706_
MAX706A_
-1.0
-5
+0.02
+1.0
+5
µA
_______________________________________________________________________________________
3
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
ELECTRICAL CHARACTERISTICS (continued)
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
ELECTRICAL CHARACTERISTICS (continued)
(MAX70_P/R, MAX706AP/AR: VCC = 2.7V to 5.5V; MAX70_S, MAX706AS: VCC = 3.0V to 5.5V; MAX70_T, MAX706AT: VCC = 3.15V to
5.5V; TJ = TA = TMIN to TMAX, unless otherwise noted. Typical values are at TJ = TA = +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
VOH
VRST(MAX) < VCC < 3.6V ISOURCE = 500µA
0.8 x
VCC
VOL
VRST(MAX) < VCC < 3.6V ISINK = 500µA
TYP
MAX
UNITS
WATCHDOG OUTPUT
WDO Output Voltage
(MAX706_, MAX706A_)
VOH
4.5V < VCC < 5.5V
ISOURCE = 800µA
VOL
4.5V < VCC < 5.5V
ISINK = 1.2mA
0.3
V
VCC 1.5
0.4
MANUAL RESET INPUT
MR Pullup Current
MR Pulse Width
MR = 0
tMR
VIL
MR Input Threshold
MR to Reset Output Delay
25
70
250
4.5V < VCC <
5.5V
100
250
600
µA
VRST(MAX) < VCC < 3.6V
500
4.5V < VCC < 5.5V
150
ns
VRST(MAX) < VCC < 3.6V
VIH
VRST(MAX) < VCC < 3.6V
VIL
4.5V < VCC < 5.5V
VIH
4.5V < VCC < 5.5V
tMD
VRST(MAX) < VCC
< 3.6V
0.6
0.7 x
VCC
V
0.8
2.0
VRST(MAX) < VCC < 3.6V
750
4.5V < VCC < 5.5V
250
ns
POWER-FAILURE COMPARATOR
PFI Input Threshold
(MAX70_P/R, MAX706AP/AR) PFI falling
VCC = 3.0V
1.20
1.25
1.30
(MAX70_S/T, MAX706AS/AT) PFI falling,
VCC = 3.3V
1.20
1.25
1.30
-25
+0.01
+25
PFI Input Current
PFO Output Voltage
VOH
VRST(MAX) < VCC < 3.6V ISOURCE = 500µA
VOL
VRST(MAX) < VCC < 3.6V ISINK = 1.2mA
VOH
4.5V < VCC < 5.5V
ISOURCE = 800µA
VOL
4.5V < VCC < 5.5V
ISINK = 3.2mA
V
0.8 x
VCC
0.3
VCC 1.5
Note 2: All devices 100% production tested at TA = +85°C. Limits over temperature are guaranteed by design.
Note 3: Applies to both RESET in the MAX70_R/S/T and MAX706AR/AS/AT, and RESET in the MAX706P/MAX706AP.
4
nA
_______________________________________________________________________________________
0.4
V
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
_______________________________________________________________________________________
5
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
Pin Description
PIN
MAX706P
MAX706AP
SO/DIP
µMAX
SO/DIP
µMAX
MAX708R/S/T
MR
4
VCC
Supply Voltage Input
5
GND
Ground
1
3
1
3
2
4
2
4
2
3
5
3
5
3
5
7
4
5
6
7
FUNCTION
Active-Low, Manual-Reset Input. Pull MR below 0.6V to trigger a
reset pulse. MR is TTL/CMOS compatible when VCC = 5V and can
be shorted to GND with a switch. MR is internally connected to a
70µA source current. Connect to VCC or leave unconnected.
3
6
NAME
SO/DIP µMAX
1
4
6
MAX706R/S/T,
MAX706AR/AS/AT
4
5
6
7
6
8
6
8
—
—
7
1
—
—
8
2
8
2
8
2
—
—
—
—
7
1
7
1
—
—
—
—
6
8
PFI
Adjustable Power-Fail Comparator Input. Connect PFI to a
resistive divider to set the desired PFI threshold. When PFI is
less than 1.25V, PFO goes low and sinks current; otherwise,
PFO remains high. Connect PFI to GND if not used.
PFO
Active-Low, Power-Fail Comparator Output. PFO asserts when
PFI is below the internal 1.25V threshold. PFO deasserts when
PFI is above the internal 1.25V threshold. Leave PFO
unconnected if not used.
WDI
Watchdog Input. A falling or rising transition must occur at
WDI within 1.6s to prevent WDO from asserting (see Figure 4).
The internal watchdog timer is reset to zero when reset is
asserted or when transition occurs at WDI. The watchdog
function for the MAX706P/R/S/T can not be disabled. The
watchdog timer for the MAX706AP/AR/AS/AT disables when
WDI input is left open or connected to a tri-state output in its
high-impedance state with a leakage current of less than
600nA.
Active-High Reset Output. Reset remains high when VCC is
RESET below the reset threshold or MR is held low. It remains low for
200ms after the reset conditions end (Figure 3).
WDO
Active-Low Watchdog Output. WDO goes low when a
transition does not occur at WDI within 1.6s and remains low
until a transition occurs at WDI (indicating the watchdog
interrupt has been serviced). WDO also goes low when VCC
falls below the reset threshold; however, unlike the reset
output signal, WDO goes high as soon as VCC rises above
the reset threshold.
Active-Low Reset Output. RESET remains low when VCC is
RESET below the reset threshold or MR is held low. It remains low for
200ms after the reset conditions end (Figure 3).
N.C.
No Connection. Not internally connected.
_______________________________________________________________________________________
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
6
WATCHDOG
TRANSITION
DETECTOR
VCC
70µA
MR
VCC
PFI
WATCHDOG
TIMER
8
WDO
VCC
MR
1
2
4
RESET
70µA
TIMEBASE FOR
RESET AND
WATCHDOG
RESET
GENERATOR
8
7
VCC
RESET
GENERATOR
2
7
RESET
RESET
(RESET)
2.63V MAX706P/R
2.93V MAX706S
MAX706P/R/S/T
3.08V MAX706T MAX706AP/AR/AS/AT
PFI
5
1
PFO
4
2.63V MAX708R
2.93V MAX708S
3.08V MAX708T
MAX708R/S/T
5
PFO
1.25V
1.25V
3 GND
( ) ARE FOR MAX706P/AP.
3 GND
Figure 1. MAX706_ Functional Diagram
RESET and RESET Outputs
A microprocessor’s (µP’s) reset input starts in a known
state. When the µP is in an unknown state, it should be
held in reset. The MAX706P/R/S/T and the MAX706AP/
AR/AS/AT assert reset when V CC is low, preventing
code execution errors during power-up, power-down,
or brownout conditions.
On power-up once VCC reaches 1V, RESET is guaranteed to be logic-low and RESET is guaranteed to be
logic-high. As VCC rises, RESET and RESET remain
asserted. Once VCC exceeds the reset threshold, the
internal timer causes RESET and RESET to be
deasserted after a time equal to the reset pulse width,
which is typically 200ms (Figure 3).
If a power-fail or brownout condition occurs (i.e., VCC
drops below the reset threshold), RESET and RESET
are asserted. As long as VCC remains below the reset
threshold, the internal timer is continually reset, causing
the RESET and RESET outputs to remain asserted.
Thus, a brownout condition that interrupts a previously
initiated reset pulse causes an additional 200ms delay
from the time the latest interruption occurred. On
power-down once VCC drops below the reset threshold,
Figure 2. MAX708_ Functional Diagram
RESET and RESET are guaranteed to be asserted for
VCC ≥ 1V.
The MAX706P/MAX706AP provide a RESET signal, and
the MAX706R/S/T and MAX706AR/AS/AT provide a
RESET signal. The MAX708R/S/T provide both RESET
and RESET.
Watchdog Timer
The MAX706P/R/S/T and the MAX706AP/AR/AS/AT
watchdog circuit monitor the µP’s activity. If the µP
does not toggle the watchdog input (WDI) within 1.6s,
the watchdog output (WDO) goes low (Figure 4). If the
reset signal is asserted, the watchdog timer will be
reset to zero and disabled. As soon as reset is
released, the timer starts counting. WDI can detect pulses as narrow as 100ns with a 2.7V supply and 50ns with a
4.5V supply. The watchdog timer for the MAX706P/R/S/T
cannot be disabled. The watchdog timer for the
MAX706AP/AR/AS/AT operates similarly to the
MAX706P/R/S/T. However, the watchdog timer for the
MAX706AP/AR/AS/AT disables when the WDI input is
left open or connected to a tri-state output in its highimpedance state and with a leakage current of less
than 600nA. The watchdog timer can be disabled anytime, provided WDO is not asserted.
_______________________________________________________________________________________
7
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
WDI
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
+3.3V
VCC
+1V
VRST
VRST
tRST
tRST
+12V
+3V/+3.3V
RESET
0V
+3.3V
TO µP
MAX706_
MAX708R/S/T
RESET
0V
MR
130kΩ
1%
+3.3V
MR*
0V
PFI
PFO
GND
tMD
tMR
+3.3V
WDO*
RESET
(RESET)
VCC
1MΩ
1%
*NOTE: MR EXTERNALLY DRIVEN LOW.
WDO TIMING SHOWN FOR MAX706P/R/S/T.
0V
Figure 3. RESET, RESET, MR, and WDO Timing
tWP
tWD
tWD
PARAMETER
MIN
TYP
MAX
UNIT
+12V RESET
10.24
THRESHOLD AT +25°C
10.87
11.50
V
( ) ARE FOR MAX706P/AP
tWD
+3V/+3.3V
WDI
0V
Figure 5. Monitoring Both +3V/+3.3V and +12V
+3V/+3.3V
WDO
0V
+3V/+3.3V
RESET
0V
RESET EXTERNALLY
TRIGGERED BY MR
tRST
MAX706R/S/T
MAX708R/S/T
MAX706AR/AS/AT
RESET
Figure 4. MAX706AP/AR/AS/AT Watchdog Timing
WDO can be connected to the nonmaskable interrupt
(NMI) input of a µP. When VCC drops below the reset
threshold, WDO immediately goes low, even if the
watchdog timer has not timed out (Figure 3). Normally,
this would trigger an NMI, but since reset is asserted
simultaneously, the NMI is overridden. The WDO
should not be connected to RESET directly. Instead,
connect WDO to MR to generate a reset pulse when it
times out.
Manual Reset
The manual reset (MR) input allows RESET and RESET
to be activated by a pushbutton switch. The switch is
effectively debounced by the 140ms minimum reset
pulse width. MR can be driven by an external logic line
since it is TTL/CMOS compatible. The minimum MR
8
R1
Figure 6. RESET Valid to GND Circuit
input pulse width is 500ns when VCC = +3V and 150ns
when VCC = +5V. Leave MR unconnected or connect
to VCC when not used.
Power-Fail Comparator
The power-fail comparator can be used for various purposes because its output and noninverting input are
not internally connected. The inverting input is internally
connected to a 1.25V reference. The power-fail comparator has 10mV of hysteresis, which prevents repeated triggering of the power-fail output (PFO).
_______________________________________________________________________________________
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
Regulated and unregulated voltages can be monitored
by simply adjusting the PFI resistive-divider network
values to the appropriate ratio. In addition, the reset
signal can be asserted at voltages other that VCC reset
threshold, as shown in Figure 5. Connect PFO to MR to
initiate a reset pulse when the 12V supply drops below
a user-specified threshold (11V in this example) or
when VCC falls below the reset threshold.
VIN
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
To build an early-warning power-failure circuit, use the
power-fail comparator input (PFI) to monitor the unregulated DC supply voltage (see the Typical Operating
Circuits). Connect the PFI to a resistive-divider network
such that the voltage at PFI falls below 1.25V just
before the regulator drops out. Use PFO to interrupt the
µP so it can prepare for an orderly power-down.
+3V/+3.3V
R1
VCC
PFI
C1*
MAX706_
MAX708R/S/T
R3
R2
PFO
GND
TO µP
*OPTIONAL
+3V/+3.3V
PFO
Operation with +3V and +5V Supplies
The MAX706P/R/S/T, the MAX706AP/AR/AS/AT, and the
MAX708R/S/T provide voltage monitoring at the reset
threshold (2.63V to 3.08V) when powered from either
+3V or +5V. These devices are ideal in portable-instrument applications where power can be supplied from
either a +3V battery or an AC-DC wall adapter that generates +5V (a +5V supply allows a µP or a microcontroller to run faster than a +3V supply). With a +3V
supply, these ICs consume less power, but output drive
capability is reduced, the MR to RESET delay time
increases, and the MR minimum pulse width increases.
The Electrical Characteristics table provides specifications for operation with both +3V and +5V supplies.
0V
0V
VTRIP = 1.25
Applications Information
Adding Hysteresis to the Power-Fail
Comparator
Hysteresis adds a noise margin to the power-fail comparator and prevents repeated triggering of the PFO
when VIN is near the power-fail comparator trip point.
Figure 7 shows how to add hysteresis to the power-fail
comparator. Select the ratio of R1 and R2 such that PFI
(R1 + R2)
R2
VH = 1.25 (1 + R3 + R2 R1) VL = 1.25 + R1 1.25 - VCC - 1.25
R2 × R3
R2
R3
Figure 7. Adding Hysteresis to the Power-Fail Comparator
+3V/+3.3V
Ensuring a Valid RESET Output Down to
VCC = 0V
When V CC falls below 1V, the MAX706R/S/T,
MAX706AR/AS/AT, and MAX708R/S/T RESET output no
longer sinks current; it becomes an open circuit. Highimpedance, CMOS logic inputs can drift to undetermined voltages if left as open circuit. If a pulldown
resistor is added to the RESET pin , as shown in Figure
6, any stray charge or leakage current will flow to
ground, holding RESET low. Resistor value R is not critical, but it should not load RESET and should be small
enough to pull RESET and the input it is driving to
ground. 100kΩ is suggested for R1.
VL VTRIP VH
VIN
R1
VCC
PFO
PFI
MAX706_
MAX708R/S/T
R2
GND
+3V/+3.3V
V-
PFO
0V
VTRIP
VCC - 1.25 1.25 - VTRIP
=
R1
R2
0V
V-
NOTE: VTRIP IS NEGATIVE.
Figure 8. Monitoring a Negative Voltage
_______________________________________________________________________________________
9
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
sees 1.25V when V IN falls to the desired trip point
(VTRIP). Resistor R3 adds hysteresis. R3 will typically
be an order of magnitude greater than R1 and R2. The
current through R1 and R2 should be at least 1µA to
ensure that the 25nA (max) PFI input current does not
shift the trip point significantly. R3 should be larger than
10kΩ to prevent it from loading down the PFO pin.
Capacitor C1 adds noise rejection.
Monitoring a Negative Voltage
The power-fail comparator can be used to monitor a
negative supply voltage using the circuit of Figure 8.
When the negative supply is valid, PFO is low. When
the negative supply voltage drops, PFO goes high. This
circuit’s accuracy is affected by the PFI threshold tolerance, the VCC voltage, and resistors R1 and R2.
Bypassing VCC
For noisy systems, bypass VCC with a 0.1µF capacitor
to GND.
Ordering Information (continued)
PART†
MAX706PEUA
MAX706PMJA
MAX706RCPA
TEMP
RANGE
-40°C to +85°C
PINPACKAGE
8 µMAX
-55°C to +125°C 8 CERDIP*
0°C to +70°C
8 Plastic Dip
PKG
CODE
TEMP
RANGE
PART†
PINPACKAGE
PKG
CODE
U8-1
MAX706ASESA
-40°C to +85°C
8 SO
S8-2
J8-2
MAX706ASEUA
-40°C to +85°C
8 µMAX
U8-1
P8-1
MAX706ATEPA
-40°C to +85°C
8 Plastic Dip
P8-1
-40°C to +85°C
8 SO
S8-2
0°C to +70°C
8 SO
S8-2
MAX706ATESA
MAX706RCUA
0°C to +70°C
8 µMAX
U8-1
MAX706ATEUA
-40°C to +85°C
8 µMAX
U8-1
MAX706REPA
-40°C to +85°C
8 Plastic Dip
P8-1
MAX708RCPA
0°C to +70°C
8 Plastic Dip
P8-1
0°C to +70°C
8 SO
S8-2
MAX706RCSA
MAX706RESA
MAX706REUA
MAX706RMJA
-40°C to +85°C
8 SO
S8-2
MAX708RCSA
-40°C to +85°C
8 µMAX
U8-1
MAX708RCUA
0°C to +70°C
8 µMAX
U8-1
J8-2
MAX708REPA
-40°C to +85°C
8 Plastic Dip
P8-1
P8-1
MAX708RESA
-40°C to +85°C
8 SO
S8-2
8 µMAX
U8-1
-55°C to +125°C 8 CERDIP*
MAX706SCPA
0°C to +70°C
8 Plastic Dip
MAX706SCSA
0°C to +70°C
8 SO
S8-2
MAX708REUA
-40°C to +85°C
MAX706SCUA
0°C to +70°C
8 µMAX
U8-1
MAX708RMJA
-55°C to +125°C
8 CERDIP*
J8-2
0°C to +70°C
8 Plastic Dip
P8-1
MAX706SEPA
-40°C to +85°C
8 Plastic Dip
P8-1
MAX708SCPA
MAX706SESA
-40°C to +85°C
8 SO
S8-2
MAX708SCSA
0°C to +70°C
8 SO
S8-2
MAX706SEUA
-40°C to +85°C
8 µMAX
U8-1
MAX708SCUA
0°C to +70°C
8 µMAX
U8-1
J8-2
MAX708SEPA
-40°C to +85°C
8 Plastic Dip
P8-1
MAX706SMJA
-55°C to +125°C 8 CERDIP*
MAX706TCPA
0°C to +70°C
8 Plastic Dip
P8-1
MAX708SESA
-40°C to +85°C
8 SO
S8-2
MAX706TCSA
0°C to +70°C
8 SO
S8-2
MAX708SEUA
-40°C to +85°C
8 µMAX
U8-1
MAX706TCUA
0°C to +70°C
8 µMAX
U8-1
MAX708SMJA
-55°C to +125°C
8 CERDIP*
J8-2
MAX706TEPA
-40°C to +85°C
8 Plastic Dip
P8-1
MAX708TCPA
0°C to +70°C
8 Plastic Dip
P8-1
MAX706TESA
-40°C to +85°C
8 SO
S8-2
MAX708TCSA
0°C to +70°C
8 SO
S8-2
U8-1
MAX708TCUA
0°C to +70°C
8 µMAX
U8-1
J8-2
MAX708TEPA
-40°C to +85°C
8 Plastic Dip
P8-1
P8-1
MAX708TESA
-40°C to +85°C
8 SO
S8-2
MAX708TEUA
-40°C to +85°C
8 µMAX
U8-1
-55°C to +125°C
8 CERDIP*
J8-2
MAX706TEUA
MAX706TMJA
MAX706APEPA
-40°C to +85°C
8 µMAX
-55°C to +125°C 8 CERDIP*
-40°C to +85°C
8 Plastic Dip
MAX706APESA
-40°C to +85°C
8 SO
S8-2
MAX706APEUA
-40°C to +85°C
8 µMAX
U8-1
MAX708TMJA
†SO, µMAX, and PDIP packages are available in lead-free.
MAX706AREPA
-40°C to +85°C
8 Plastic Dip
P8-1
MAX706ARESA
-40°C to +85°C
8 SO
S8-2
*Contact factory for availability and processing to MIL-STD-883.
**Future product—contact factory for availability.
MAX706AREUA
-40°C to +85°C
8µMAX
U8-1
Chip Information
MAX706ASEPA
-40°C to +85°C
8 Plastic Dip
P8-1
10
PROCESS: CMOS
______________________________________________________________________________________
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
Typical Operating Circuits
(continued)
TOP VIEW
MR
1
8
WDO
VCC
2
7
RESET
GND 3
MAX706P
MAX706AP
PFI 4
6
WDI
5
PFO
UNREGULATED
DC
MAX639
DC-DC
CONVERTER
-3V/+3.3V
µP
VCC
VCC
DIP/SO
RESET
PFI
MR
1
VCC
2
8
WDO
7
RESET
MAX706R/S/T
GND 3 MAX706AR/AS/AT 6
PFI 4
5
WDI
PUSHBUTTON
SWITCH
RESET
RESET
MR
PFO
INTERRUPT
GND
MAX708R/S/T
PFO
DIP/SO
MR
1
8
RESET
VCC
2
7
RESET
6
N.C.
5
PFO
8
WDI
7
PFO
6
PFI
5
GND
GND 3
MAX708R/S/T
PFI 4
DIP/SO
(RESET) RESET
1
WDO
2
MR
3
V CC
4
MAX706P/R/S/T
MAX706AP/AR/
AS/AT
µMAX
RESET
1
8
N.C.
RESET
2
7
PFO
6
PFI
5
GND
MR
3
V CC
4
MAX708R/S/T
µMAX
( ) ARE FOR MAX706P/AP ONLY.
______________________________________________________________________________________
11
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
Pin Configurations
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
CDIPS.EPS
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
12
______________________________________________________________________________________
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
E
Ø0.50±0.1
8
INCHES
DIM
A
A1
A2
b
H
c
D
e
E
H
0.6±0.1
1
L
1
α
0.6±0.1
S
BOTTOM VIEW
D
MIN
0.002
0.030
MAX
0.043
0.006
0.037
0.014
0.010
0.007
0.005
0.120
0.116
0.0256 BSC
0.120
0.116
0.198
0.188
0.026
0.016
6°
0°
0.0207 BSC
8LUMAXD.EPS
4X S
8
MILLIMETERS
MAX
MIN
0.05
0.75
1.10
0.15
0.95
0.25
0.36
0.13
0.18
2.95
3.05
0.65 BSC
2.95
3.05
4.78
5.03
0.41
0.66
0°
6°
0.5250 BSC
TOP VIEW
A1
A2
A
c
e
b
FRONT VIEW
α
L
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 8L uMAX/uSOP
APPROVAL
DOCUMENT CONTROL NO.
21-0036
REV.
J
1
1
______________________________________________________________________________________
13
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
DIM
A
A1
B
C
e
E
H
L
N
E
H
INCHES
MILLIMETERS
MAX
MIN
0.053
0.069
0.004
0.010
0.014
0.019
0.007
0.010
0.050 BSC
0.150
0.157
0.228
0.244
0.050
0.016
MAX
MIN
1.75
1.35
0.25
0.10
0.49
0.35
0.19
0.25
1.27 BSC
3.80
4.00
5.80
6.20
0.40
SOICN .EPS
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
1.27
VARIATIONS:
1
INCHES
TOP VIEW
DIM
D
D
D
MIN
0.189
0.337
0.386
MAX
0.197
0.344
0.394
MILLIMETERS
MIN
4.80
8.55
9.80
MAX
5.00
8.75
10.00
N MS012
8
AA
14
AB
16
AC
D
A
B
e
C
0∞-8∞
A1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, .150" SOIC
APPROVAL
DOCUMENT CONTROL NO.
21-0041
14
______________________________________________________________________________________
REV.
B
1
1
+3V Voltage Monitoring, Low-Cost µP
Supervisory Circuits
PDIPN.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2006 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.
MAX706P/R/S/T, MAX706AP/AR/AS/AT, MAX708R/S/T
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
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