ON ASM1834AU Power supply supervisor Datasheet

ASM1834, ASM1834A,
ASM1834D
Dual 5 V and 3.3 V mP
Power Supply Supervisor
with Manual Reset
http://onsemi.com
Description
The ASM1834 supervisors simultaneously monitor both 3.3 V and
5 V power sources and generate reset signals when either supply is out
of tolerance. When an out−of−tolerance condition is detected, the
output−reset signal of the affected supply becomes active and resets
the system microprocessor/microcontroller. On power−up and after
the supply voltage returns to an in−tolerance condition, the reset signal
remains active for approximately 350 ms. This allows the power
supply and system microprocessor to stabilize.
Tolerance levels are independently selectable for both supplies.
Tolerance options are 5% and 10% for the 5 V supply and 10% and
20% for the 3.3 V supply.
The ASM1834 and ASM1834D have push−pull reset output stages.
The ASM1834A reset outputs are open drain devices that can both be
connected to either 5 V or 3.3 V supply. The ASM1834 and
ASM1834A have active LOW reset outputs. The ASM1834D has
active HIGH reset outputs.
All devices can generate reset signals through an internally
debounced pushbutton reset input that affects both reset outputs.
All devices operate over the extended industrial temperature range.
Devices are available in 8−pin DIP, surface mount 8−pin SO and 8−Pin
MicroSO packages. Die are also available.
PDIP−8
NO SUFFIX
CASE 646AA
MICRO−8
U SUFFIX
CASE 846AA
SOIC−8
S SUFFIX
CASE 751BD
PIN CONFIGURATION
5VIN
5V RESET*
5V TOL
1
3.3VIN
ASM1834
ASM1834A
ASM1834D
GND
3.3V RESET*
3.3V TOL
PBRST
(Top View)
*AS1834D reset outputs are active HIGH
(5V RESET and 3.3V RESET) Outputs are
open−drain for AS1834A.
Features
•
•
•
•
•
•
•
•
•
•
•
Monitors 5 V and 3.3 V Supplies Simultaneously
5 V and 3.3 V Power−on Reset
350 ms Reset Time
Debounced Pushbutton Reset Input
Push−pull CMOS Output
ASM1834, ASM1834D
Eliminates External Pull−up Resistors
Active LOW (ASM1834), HIGH (ASM1834D)
Open Drain Output
ASM1834A
Active LOW
Selectable 5 V and 3.3 V Trip Point Tolerance
Internal Power Drawn from Highest Input Voltage,
5 V or 3.3 V
Precision Temperature−compensated Voltage Reference
and Comparator
Low Cost Surface Mount SO, Compact MicroSO and
DIP Packages
Wide Operating Temperature: −40°C to +85°C
© Semiconductor Components Industries, LLC, 2011
August, 2011 − Rev. 3
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
Applications
•
•
•
•
•
•
•
1
Microprocessors
PDAs, Hand−held PCs
Embedded Controllers
Telecommunication Systems
Power Supplies
Wireless / Cellular Systems
Networking Hardware
Publication Order Number:
ASM1834/D
ASM1834, ASM1834A, ASM1834D
Figure 1. Typical Operating Circuit
Figure 2. Block Diagram
http://onsemi.com
2
ASM1834, ASM1834A, ASM1834D
Table 1. PIN DESCRIPTION
Pin #
Pin Name
1
5VIN
2
5V RESET
5V RESET
3
5V TOL
4
GND
5
PBRST
6
3.3V TOL
7
3.3V RESET
3.3V RESET
8
3.3VIN
Function
5 V power supply input.
5 V reset output (Active LOW, ASM1834, ASM1834A. Open drain outputs for ASM1834A).
5 V reset output (Active HIGH, AS1834D).
5 V input tolerance select: 10% tolerance for 5VTOL = 5 VIN and 5% tolerance for 5VTOL = GND
Ground.
Debounced manual pushbutton reset input (40 kW internal pull−up).
3.3 V input tolerance select: 20% tolerance for 3.3VTOL = 3.3 VIN and 10% tolerance for 3.3VTOL = GND.
3.3 V reset output (Active LOW, ASM1834, ASM1834A. Open drain outputs for ASM1834A).
3.3 V reset output (Active HIGH, ASM1834D).
3.3 V power supply input.
Table 2. ABSOLUTE MAXIMUM RATINGS
Min
Max
Unit
Voltage on VCC (Note 1)
Parameter
−0.5
7
V
Voltage on 5V RESET (Note 1)
−0.5
+5VIN + 0.5 V
V
Voltage on 3.3V RESET (Note 1)
−0.5
+3.3VIN + 0.5 V
V
Voltage on PBRST and reset outputs (Note 1)
−0.5
(+5VIN + 0.5 V) or (+3.3VIN + 0.5 V)
whichever is greater
V
Operating Temperature Range
−40
+85
°C
+260
°C
+125
°C
HBM
2
KV
MM
200
V
Soldering Temperature (for 10 sec)
Storage Temperature
ESD rating
−55
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Voltages are measured with respect to ground.
http://onsemi.com
3
ASM1834, ASM1834A, ASM1834D
Table 3. RECOMMENDED DC OPERATING CONDITIONS (Recommended DC operating condition over the operating
temperature range of −40°C to +85°C. All voltages are referenced to ground.)
Max
Unit
5VIN
1.2
5.5
V
3.3VIN
1.2
5.5
V
PBRST Input High Level
VIH
2
VINMAX + 0.3
V
PBRST Input High Level
VIH
Both 3.3VIN and 5VIN ≥ 2.7 V
VINMAX − 0.4
PBRST Input Low Level
VIL
Both 3.3VIN and 5VIN ≤ 2.7 V
−0.3
Parameter
5 V Supply Voltage
3.3 V Supply Voltage
Symbol
Conditions
Min
Typ
V
0.5
V
Table 4. DC ELECTRICAL CHARACTERISTICS (Unless otherwise noted, VIN = 1.2 V to 5.5 V and specifications are over the
operating temperature range of −40°C to +85°C. (Note: 3.3VIN is always ≤ 5VIN))
Parameter
Symbol
Conditions
Output Current
IOH
Output = 2.4 V. Either 3.3VIN or
5.5VIN ≥ 2.7 V
(ASM1834/1834D only)
Output Current
IOL
Output = 0.4 V. Either 3.3VIN or
5.5VIN ≥ 2.7 V
(ASM1834/1834D only)
Output Voltage
VOH
Min
Typ
Max
350
Unit
mA
10
mA
VIN − 0.1V
Input Leakage
IIL
+1.0
mA
5 V Operating Current
ICC
3.3VIN and 5VIN ≤ 5.5 V,
RESET outputs open.
16
30
mA
3.3 V Operating Current
ICC
3.3VIN and 5VIN ≤ 3.6 V,
RESET outputs open.
12
25
mA
5 V Trip Point
VINTP
5VTOL = GND
4.50
4.63
4.75
V
5 V Trip Point
VINTP
5VTOL = 5VIN
4.25
4.38
4.49
V
3.3 V Trip Point
VINTP
3.3VTOL = GND
2.80
2.88
2.97
V
3.3 V Trip Point
VINTP
3.3VTOL = 3.3VIN
2.47
2.55
2.64
V
Output Capacitance
COUT
10
pF
PBRST Manual Reset
Minimum Low Time
−1.0
V
tPB
PBRST Stable LOW to reset
Active
tPDLY
Reset Active Time
tRST
2
200
ms
350
2
ms
500
ms
VCC Slew Rate
tF
VINTP(MAX) to VINTP(MIN)
300
ms
VCC Slew Rate
tR
VINTP(MIN) to VINTP(MAX)
0
ns
VCC Detect to RESET
or RESET
tRPU
trise = 5 ms
200
VCC Detect Noise Immunity
tRPD
http://onsemi.com
4
350
500
ms
2
ms
ASM1834, ASM1834A, ASM1834D
Detailed Description
Operation Power Monitor
On power−up, the reset signals are kept active for
approximately 350 ms after the power supply voltages have
reached the selected tolerance. This allows the power supply
and microprocessor to stabilize before the reset is removed.
All supply current for the ASM1834 devices is drawn
from the input (5VIN or 3.3VIN) with the highest voltage
level. The outputs draw current from their input supplies
5VIN and 3.3VIN.
The ASM1834 supervisors simultaneously detect
out−of−tolerance power supply conditions on both 3.3 V
and 5 V power supplies. If the voltages at 5VIN or 3.3VIN are
outside the tolerance band, the reset for the falling supply
voltage becomes active. When the monitored supply returns
to an intolerance state, the reset remains active for
approximately 350 ms before returning to the inactive state.
Figure 3. Timing Diagram: Power Up
(ASM1834D Only)
Figure 4. Timing Diagram: Power Down
(ASM1834D Only)
Reset Signal Polarity and Output Stage Structure
The ASM1834 and the ASM1834A supervisors have
active LOW reset signals. The ASM1834D reset outputs are
active HIGH.
The ASM1834 and the ASM1834D have CMOS
push−pull output stages. The ASM1834A has open drain
reset outputs.
Table 5.
Part #
RESET Polarity
Output Stage Configuration
ASM1834
LOW
Push−Pull
ASM1834U
LOW
Push−Pull
ASM1834S
LOW
Push−Pull
ASM1834A
LOW
Open Drain
ASM1834AU
LOW
Open Drain
ASM1834AS
LOW
Open Drain
ASM1834D
HIGH
Push−Pull
ASM1834DU
HIGH
Push−Pull
ASM1834DS
HIGH
Push−Pull
Manual Reset Operation
Push−button switch input, PBRST, allows the user to
override the internal trip point detection circuits and issue
reset signals. The pushbutton input is debounced and is
pulled HIGH through an internal 40 kW resistor.
When at least one of the reset outputs is not asserted, a
push button initiated reset signal can be issued by holding
PBRST LOW for at least 2 ms. When PBRST is held LOW,
both resets become active and remain active for
approximately 350 ms after PBRST returns HIGH. (See
Figures 5 and 6.)
http://onsemi.com
5
ASM1834, ASM1834A, ASM1834D
Figure 5. Pushbutton Reset
Figure 6. Timing Diagram: Pushbutton Reset
Reset Output Signal
into a HIGH state. Resistor value is not critical in most
applications and a value of 10 kW is suggested. (See
Figures 7 and 8.)
The ASM1834A open drain reset outputs can be
connected to the same potential through a single pull−up
resistor. In this configuration a failure on either supply will
generate an active LOW reset. If the inputs are pulled−up to
different voltages, the reset outputs (pin 2 and pin 7) cannot
be connected to form a wired “AND” (see Figure 9).
Reset output signals are valid as long as either voltage at
5VIN or 3.3VIN is above 1.2 V. In addition, the ASM1834
has push−pull outputs that can remain valid below a 1.2 V
input level. To sink current below 1.2 V, a resistor should be
connected from the RESET output to ground. This resistor
guarantees a valid reset signal down to 0 V. A 100 kW value
is suggested.
The AS1834A open drain reset outputs require pull−up
resistors and must be low enough in value to pull the output
Figure 7. ASM1834 RESET Valid to 0 V
http://onsemi.com
6
ASM1834, ASM1834A, ASM1834D
Figure 8. ASM1834A Open Drain
Output Pull−Up Resistor
Figure 9. ASM1834A Wired “OR” Connection
Trip Point Tolerance Selection
If 3.3VTOL is connected to the 3.3 V supply input, a 20%
tolerance is selected. If 3.3VTOL is grounded, a 10%
tolerance is selected. (Refer to Table 6.) The 3.3VTOL and
5VTOL tolerance select inputs should be tied to the ground
or to the respective input supply voltage pin, 3.3VIN or 5VIN.
The 3.3VTOL and 5VTOL inputs allow independent
selection of the reset trip points. If 5VTOL is connected to
the 5 V supply input, a 10% tolerance is selected. If 5VTOL
is grounded, a 5% tolerance is selected.
Table 6.
3.3 V Input
Tolerance Select
3.3 V
Tolerance
5 V Input
5V
Tolerance
TRIP Point (V)
Min
Nom
Max
TRIP Point (V)
Min
Nom
Max
5VTOL = 5VIN
10%
4.25
4.38
4.49
5VTOL = GND
5%
4.5
4.63
4.75
3.3VTOL = 3.3VIN
20%
2.47
2.55
2.64
3.3VTOL = GND
10%
2.80
2.88
2.97
http://onsemi.com
7
ASM1834, ASM1834A, ASM1834D
PACKAGE DIMENSIONS
Micro8t/TSSOP8 3x3
CASE 846AA−01
ISSUE O
D
HE
PIN 1 ID
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. 846A-01 OBSOLETE, NEW STANDARD 846A-02.
E
e
b 8 PL
0.08 (0.003)
T B
M
S
A
DIM
A
A1
b
c
D
E
e
L
HE
S
SEATING
−T− PLANE
0.038 (0.0015)
A
A1
MILLIMETERS
NOM
MAX
−−
1.10
0.08
0.15
0.33
0.40
0.18
0.23
3.00
3.10
3.00
3.10
0.65 BSC
0.40
0.55
0.70
4.75
4.90
5.05
MIN
−−
0.05
0.25
0.13
2.90
2.90
L
c
SOLDERING FOOTPRINT*
8X
1.04
0.041
0.38
0.015
3.20
0.126
6X
8X
4.24
0.167
0.65
0.0256
5.28
0.208
SCALE 8:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
8
INCHES
NOM
−−
0.003
0.013
0.007
0.118
0.118
0.026 BSC
0.016
0.021
0.187
0.193
MIN
−−
0.002
0.010
0.005
0.114
0.114
MAX
0.043
0.006
0.016
0.009
0.122
0.122
0.028
0.199
ASM1834, ASM1834A, ASM1834D
PACKAGE DIMENSIONS
PDIP−8, 300 mils
CASE 646AA−01
ISSUE A
SYMBOL
MIN
NOM
A
E1
5.33
A1
0.38
A2
2.92
3.30
4.95
b
0.36
0.46
0.56
b2
1.14
1.52
1.78
c
0.20
0.25
0.36
D
9.02
9.27
10.16
E
7.62
7.87
8.25
E1
6.10
6.35
7.11
e
PIN # 1
IDENTIFICATION
MAX
2.54 BSC
eB
7.87
L
2.92
10.92
3.30
3.80
D
TOP VIEW
E
A2
A
A1
c
b2
L
e
eB
b
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MS-001.
http://onsemi.com
9
ASM1834, ASM1834A, ASM1834D
PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD−01
ISSUE O
SYMBOL
E1
E
MIN
MAX
A
1.35
1.75
A1
0.10
0.25
b
0.33
0.51
c
0.19
0.25
D
4.80
5.00
E
5.80
6.20
E1
3.80
4.00
1.27 BSC
e
PIN # 1
IDENTIFICATION
NOM
h
0.25
0.50
L
0.40
1.27
θ
0º
8º
TOP VIEW
D
h
A1
θ
A
c
e
b
L
END VIEW
SIDE VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
http://onsemi.com
10
ASM1834, ASM1834A, ASM1834D
Table 7. ORDERING INFORMATION
Part Number
(Note 2)
Reset Polarity
Operating
Temperature Range
Output Stage
Package
Package Marking
TIN − LEAD DEVICES
ASM1834
LOW
−40°C TO +85°C
Push−Pull
8−DIP
ASM1834
ASM1834U
LOW
−40°C TO +85°C
Push−Pull
MicroSO
ASM1834U
ASM1834S
LOW
−40°C TO +85°C
Push−Pull
8−SO
ASM1834S
ASM1834A
LOW
−40°C TO +85°C
Open Drain
8−DIP
ASM1834A
ASM1834AU
LOW
−40°C TO +85°C
Open Drain
MicroSO
ASM1834AU
ASM1834AS
LOW
−40°C TO +85°C
Open Drain
8−SO
ASM1834AS
ASM1834D
HIGH
−40°C TO +85°C
Push−Pull
8−DIP
ASM1834D
ASM1834DU
HIGH
−40°C TO +85°C
Push−Pull
MicroSO
ASM1834DU
ASM1834DS
HIGH
−40°C TO +85°C
Push−Pull
8−SO
ASM1834DS
ASM1834F
LOW
−40°C TO +85°C
Push−Pull
8−DIP
ASM1834F
ASM1834UF
LOW
−40°C TO +85°C
Push−Pull
MicroSO
ASM1834UF
ASM1834SF
LOW
−40°C TO +85°C
Push−Pull
8−SO
ASM1834SF
ASM1834AF
LOW
−40°C TO +85°C
Open Drain
8−DIP
ASM1834AF
ASM1834AUF
LOW
−40°C TO +85°C
Open Drain
MicroSO
ASM1834AUF
ASM1834ASF
LOW
−40°C TO +85°C
Open Drain
8−SO
ASM1834ASF
ASM1834DF
HIGH
−40°C TO +85°C
Push−Pull
8−DIP
ASM1834DF
ASM1834DUF
HIGH
−40°C TO +85°C
Push−Pull
MicroSO
ASM1834DUF
ASM1834DSF
HIGH
−40°C TO +85°C
Push−Pull
8−SO
ASM1834DSF
LEAD FREE DEVICES
2. For parts to be packed in Tape and Reel, add “-T” at the end of the part number.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
11
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
ASM1834/D
Similar pages