PHILIPS BUK9520-100A Trenchmos logic level fet Datasheet

BUK9520-100A;
BUK9620-100A
TrenchMOS™ logic level FET
Rev. 01 — 7 February 2001
Product specification
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using
TrenchMOS™ technology, featuring very low on-state resistance.
Product availability:
BUK9520-100A in SOT78 (TO-220AB)
BUK9620-100A in SOT404 (D 2-PAK).
2. Features
■
■
■
■
TrenchMOS™ technology
Q101 compliant
175 °C rated
Logic level compatible.
3. Applications
c
c
■ Automotive and general purpose power switching:
◆ 12 V, 24 V and 42 V loads
◆ Motors, lamps and solenoids.
4. Pinning information
Table 1:
Pinning - SOT78 and SOT404, simplified outline and symbol
Pin
Description
1
gate (g)
2
drain (d)
3
source (s)
mb
mounting base;
connected to drain (d)
Simplified outline
Symbol
mb
mb
d
g
MBB076
2
MBK106
1
3
MBK116
1 2 3
SOT78 (TO-220AB)
SOT404 (D2-PAK)
s
Philips Semiconductors
BUK9520-100A; BUK9620-100A
TrenchMOS™ logic level FET
5. Quick reference data
Table 2:
Quick reference data
Symbol Parameter
Conditions
Typ
Max
Unit
−
100
V
VDS
drain-source voltage (DC)
ID
drain current (DC)
Tmb = 25 °C; VGS = 5 V
−
63
A
Ptot
total power dissipation
Tmb = 25 °C
−
200
W
Tj
junction temperature
−
175
°C
RDSon
drain-source on-state resistance
Tj = 25 °C; VGS = 5 V; ID = 25 A
17
20
Tj = 25 °C; VGS = 4.5 V; ID = 25 A
−
22
mΩ
mΩ
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
VDS
drain-source voltage (DC)
VDGR
drain-gate voltage (DC)
VGS
gate-source voltage (DC)
VGSM
non-repetitive gate-source voltage
ID
drain current (DC)
Conditions
Min
Max
Unit
−
100
V
−
100
V
−
±10
V
tp ≤ 50 µs
−
±15
V
Tmb = 25 °C; VGS = 5 V;
Figure 2 and 3
−
63
A
Tmb = 100 °C; VGS = 5 V; Figure 2
−
45
A
RGS = 20 kΩ
IDM
peak drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs;
Figure 3
−
253
A
Ptot
total power dissipation
Tmb = 25 °C; Figure 1
−
200
W
Tstg
storage temperature
−55
+175
°C
Tj
operating junction temperature
−55
+175
°C
Source-drain diode
IDR
reverse drain current (DC)
Tmb = 25 °C
−
63
A
IDRM
pulsed reverse drain current
Tmb = 25 °C; pulsed; tp ≤ 10 µs
−
253
A
unclamped inductive load; ID = 63 A;
VDS ≤ 100 V; VGS = 5 V; RGS = 50 Ω;
starting Tmb = 25 °C
−
420
mJ
Avalanche ruggedness
WDSS
non-repetitive avalanche energy
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
2 of 15
BUK9520-100A; BUK9620-100A
Philips Semiconductors
TrenchMOS™ logic level FET
03aa24
120
03na19
120
Ider
(%)
Pder
(%) 100
100
80
80
60
60
40
40
20
20
0
0
0
25
50
75
100
125
0
150
175 200
Tmb (oC)
25
50
75
100
125
150
175
200
Tmb (oC)
VGS ≥ 4.5 V
P tot
P der = ---------------------- × 100%
P
°
ID
I der = ------------------- × 100%
I
°
tot ( 25 C )
D ( 25 C )
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
03nd88
103
ID
(A)
RDSon = VDS/ ID
tp = 10 us
102
100 us
δ=
P
10
tp
T
1 ms
D.C.
10 ms
100 ms
t
tp
T
1
1
10
102
VDS (V)
103
Tmb = 25 °C; IDM single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
3 of 15
BUK9520-100A; BUK9620-100A
Philips Semiconductors
TrenchMOS™ logic level FET
7. Thermal characteristics
Table 4:
Thermal characteristics
Symbol
Parameter
Conditions
Value
Unit
Rth(j-a)
thermal resistance from junction to ambient
vertical in still air; SOT78 package
60
K/W
mounted on printed circuit board;
minimum footprint; SOT404
package
50
K/W
Figure 4
0.75
K/W
Rth(j-mb)
thermal resistance from junction to mounting
base
7.1 Transient thermal impedance
03nd89
1
Zth(j-mb)
(K/W)
δ = 0.5
0.2
10-1
0.1
0.05
0.02
δ=
P
10-2
tp
T
Single Shot
t
tp
T
10-3
10-6
10-5
10-4
10-3
10-2
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
4 of 15
Philips Semiconductors
BUK9520-100A; BUK9620-100A
TrenchMOS™ logic level FET
8. Characteristics
Table 5: Characteristics
Tj = 25 °C unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tj = 25 °C
100
−
−
V
Tj = −55 °C
89
−
−
V
Tj = 25 °C
1
1.5
2
V
Tj = 175 °C
0.5
−
−
V
Tj = −55 °C
−
−
2.3
V
Tj = 25 °C
−
0.05
10
µA
Tj = 175 °C
−
−
500
µA
−
2
100
nA
Tj = 25 °C
−
17
20
mΩ
Tj = 175 °C
−
−
50
mΩ
VGS = 4.5 V; ID = 25 A
−
−
22
mΩ
VGS = 10 V; ID = 25 A
−
16
19
mΩ
VGS = 0 V; VDS = 25 V;
f = 1 MHz; Figure 12
−
4790
6385
pF
−
450
542
pF
−
270
400
pF
−
35
−
ns
−
143
−
ns
−
288
−
ns
Static characteristics
V(BR)DSS
VGS(th)
IDSS
drain-source breakdown
voltage
ID = 0.25 mA; VGS = 0 V
gate-source threshold voltage ID = 1 mA; VDS = VGS;
Figure 9
drain-source leakage current
VDS = 100 V; VGS = 0 V
IGSS
gate-source leakage current
VGS = ±10 V; VDS = 0 V
RDSon
drain-source on-state
resistance
VGS = 5 V; ID = 25 A;
Figure 7 and 8
Dynamic characteristics
Ciss
input capacitance
Coss
output capacitance
Crss
reverse transfer capacitance
td(on)
turn-on delay time
tr
rise time
td(off)
turn-off delay time
tf
fall time
Ld
internal drain inductance
Ls
internal source inductance
VDD = 30 V; RL = 1.2 Ω;
VGS = 5 V; RG = 10 Ω
−
131
−
ns
from drain lead 6 mm from
package to centre of die
−
4.5
−
nH
from contact screw on
mounting base to centre of
die SOT78
−
3.5
−
nH
from upper edge of drain
mounting base to centre of
die SOT404
−
2.5
−
nH
from source lead to source
bond pad
−
7.5
−
nH
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
5 of 15
BUK9520-100A; BUK9620-100A
Philips Semiconductors
TrenchMOS™ logic level FET
Table 5: Characteristics…continued
Tj = 25 °C unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Source-drain diode
VSD
source-drain (diode forward)
voltage
IS = 25 A; VGS = 0 V;
Figure 15
−
0.85
1.2
V
trr
reverse recovery time
−
76
−
ns
Qr
recovered charge
IS = 20 A; dIS/dt = −100 A/µs
VGS = −10 V; VDS = 30 V
−
282
−
nC
03nd85
250
ID
(A)
200
03nd84
16
4.6
VGS (V) = 10
5
RDSon
4
(mΩ)
15
150
14
100
3
13
50
2.2
0
12
0
2
4
6
8
10
VDS (V)
Tj = 25 °C; tp = 300 µs
2
4
6
8
10
VGS (V)
Tj = 25 °C; ID = 25 A
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
Fig 6. Drain-source on-state resistance as a function
of gate-source voltage; typical values.
03aa29
03nd86
40
VGS (V) = 3
RDSon
3.2 3.4 3.6 3.8
5
(mΩ)
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
30
20
10
0
3
a 2.8
2.6
50
100
150
200
-60
250
-20
ID (A)
Tj = 25 °C
60
100
140
180
Tj (oC)
R DSon
a = --------------------------R DSon ( 25 °C )
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
20
Rev. 01 — 7 February 2001
6 of 15
BUK9520-100A; BUK9620-100A
Philips Semiconductors
TrenchMOS™ logic level FET
03aa36
10-1
03aa33
2.5
VGS(th)
ID
(V)
max
(A) 10-2
2
typ
10-3
1.5
min
1
10-4
0.5
10-5
0
10-6
-60
-20
20
60
100
min
0
140
180
Tj (oC)
0.5
1
typ
1.5
max
2
2.5
3
VGS (V)
Tj = 25 °C; VDS = VGS
ID = 1 mA; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of
junction temperature.
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
03nd82
120
gfs
(S)
100
03nd87
12000
C (pF)
10000
80
8000
60
6000
40
4000
20
2000
0
0
Ciss
0
20
40
60
10-2
80
Coss
Crss
10-1
ID (A)
Tj = 25 °C; VDS = 25 V
10
102
VDS (V)
VGS = 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of
drain current; typical values.
Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
1
Rev. 01 — 7 February 2001
7 of 15
BUK9520-100A; BUK9620-100A
Philips Semiconductors
TrenchMOS™ logic level FET
03nd83
80
03nd81
5
VGS
(V)
ID
(A)
VDD= 14 V
4
60
3
40
VDD= 80 V
2
Tj = 175 oC
20
1
Tj = 25 oC
0
0
0
1
2
VGS (V)
0
3
20
40
60
80
100
QG (nC)
Tj = 25 °C; ID = 25 A
VDS = 25 V
Fig 13. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
Fig 14. Gate-source voltage as a function of turn-on
gate charge; typical values.
03nd80
100
IS
(A)
Tj = 175 oC
80
60
Tj = 25 oC
40
20
0
0.0
0.5
1.0
VSD (V)
1.5
VGS = 0 V
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
8 of 15
BUK9520-100A; BUK9620-100A
Philips Semiconductors
TrenchMOS™ logic level FET
9. Package outline
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB
E
SOT78
A
A1
P
q
mounting
base
D1
D
L1
L2(1)
Q
b1
L
1
2
3
b
c
e
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
UNIT
A
A1
b
b1
c
D
D1
E
e
L
L1
L2
max.
P
q
Q
mm
4.5
4.1
1.39
1.27
0.9
0.7
1.3
1.0
0.7
0.4
15.8
15.2
6.4
5.9
10.3
9.7
2.54
15.0
13.5
3.30
2.79
3.0
3.8
3.6
3.0
2.7
2.6
2.2
Note
1. Terminals in this zone are not tinned.
OUTLINE
VERSION
REFERENCES
IEC
SOT78
JEDEC
EIAJ
3-lead TO-220AB
SC-46
EUROPEAN
PROJECTION
ISSUE DATE
99-09-13
00-09-07
Fig 16. SOT78 (TO-220AB).
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
9 of 15
BUK9520-100A; BUK9620-100A
Philips Semiconductors
TrenchMOS™ logic level FET
Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads
(one lead cropped)
SOT404
A
A1
E
mounting
base
D1
D
HD
2
Lp
1
3
c
b
e
e
Q
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
b
c
D
max.
D1
E
e
Lp
HD
Q
mm
4.50
4.10
1.40
1.27
0.85
0.60
0.64
0.46
11
1.60
1.20
10.30
9.70
2.54
2.90
2.10
15.40
14.80
2.60
2.20
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
98-12-14
99-06-25
SOT404
Fig 17. SOT404 (D2-PAK).
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
10 of 15
BUK9520-100A; BUK9620-100A
Philips Semiconductors
TrenchMOS™ logic level FET
10. Soldering
10.85
10.60
10.50
handbook, full pagewidth
1.50
7.50
7.40
1.70
2.25 2.15
8.15
8.275
8.35
1.50
4.60
0.30
4.85
5.40
7.95
8.075
3.00
0.20
1.20
1.30
1.55
solder lands
solder resist
5.08
MSD057
occupied area
solder paste
Dimensions in mm.
Fig 18. Reflow soldering footprint for SOT404.
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
11 of 15
Philips Semiconductors
BUK9520-100A; BUK9620-100A
TrenchMOS™ logic level FET
11. Revision history
Table 6:
Revision history
Rev Date
01
20010207
CPCN
Description
-
Product specification; initial version
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
12 of 15
BUK9520-100A; BUK9620-100A
Philips Semiconductors
TrenchMOS™ logic level FET
12. Data sheet status
Datasheet status
Product status
Definition [1]
Objective specification
Development
This data sheet contains the design target or goal specifications for product development. Specification may
change in any manner without notice.
Preliminary specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design and
supply the best possible product.
Product specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any
time without notice in order to improve design and supply the best possible product.
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
13. Definitions
14. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
Right to make changes — Philips Semiconductors reserves the right to
make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve
design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products
are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
© Philips Electronics N.V. 2001 All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
13 of 15
Philips Semiconductors
BUK9520-100A; BUK9620-100A
TrenchMOS™ logic level FET
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Internet: http://www.semiconductors.philips.com
(SCA71)
© Philips Electronics N.V. 2001. All rights reserved.
9397 750 07915
Product specification
Rev. 01 — 7 February 2001
14 of 15
Philips Semiconductors
BUK9520-100A; BUK9620-100A
TrenchMOS™ logic level FET
Contents
1
2
3
4
5
6
7
7.1
8
9
10
11
12
13
14
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pinning information . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
Transient thermal impedance . . . . . . . . . . . . . . 4
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 13
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
© Philips Electronics N.V. 2001.
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Date of release: 7 February 2001
Document order number: 9397 750 07915