TI1 LMP8481SDE-F Precision 76v high-side current sense amplifiers with voltage output Datasheet

LMP8480 / LMP8481
Precision 76V High-Side Current Sense Amplifiers with Voltage Output
General Description
Features
The LMP8480 and LMP8481 are precision high-side current
sense amplifiers that amplify a small differential voltage developed across a current sense resistor in the presence of
high input common-mode voltages.
These amplifiers are designed for bidirectional (LMP8481) or
unidirectional (LMP8480) current applications and will accept
input signals with common-mode voltage range from 4V to
76V with a bandwidth of 270 kHz.
Since the operating power supply range overlaps the input
common mode voltage range, the LMP848x can be powered
by the same voltage that is being monitored. This benefit
eliminates the need for an intermediate supply voltage to be
routed to the point of load where the current is being monitored, resulting in reduced component count and board
space.
The LMP848x family consists of fixed gains of 20, 50, 60 and
100 for applications that demand high accuracy over temperature. The low input offset voltage allows the use of smaller
sense resistors without sacrificing system error.
The wide operating temperature range of -40C to 125C makes
the LMP848x an ideal choice for automotive, telecommunications, industrial, and consumer applications.
The LMP8480 and LMP8481 are pin for pin replacements for
the MAX4080 and MAX4081, offering improved offset voltage, wider reference adjust range and higher output drive
capabilities.
The LMP8480 and LMP8481 are available in a 8-pin MSOP
package and the LMP8481 is also available in a 8–pad LLP.
Typical values, TA = 25°C
● Bi-Directional or Uni-Directional Sensing
4.0V to 76V
● Common Mode Voltage Range
4.5V to 76V
● Supply Voltage Range
20, 50, 60 and 100 V/V
● Fixed Gains
±0.1%
● Gain Accuracy
±80µV
● Offset
270KHz
● Bandwidth (-3dB)
<100µA
● Quiescent Current
>5mA
● Buffered High-Current Output
7µA
● Input Bias Current
122dB
● PSRR (DC)
124dB
● CMRR (DC)
-40 to +125°C
● Temperature Range
● MSOP-8 or LLP-8 Packages
Applications
●
●
●
●
●
●
●
High-side current sense
Vehicle current measurement
Telecommunications
Motor controls
Laser or LED Drivers
Energy Management
Solar Panel Monitoring
Typical Application
30191535
LMP™ is a trademark of National Semiconductor Corporation.
PRODUCTION DATA information is current as of
publication date. Products conform to specifications per
the terms of the Texas Instruments standard warranty.
Production processing does not necessarily include
testing of all parameters.
301915 SNVS829A
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
Block Diagrams
LMP8480 Block Diagram
30191531
LMP8481 Block Diagram
30191530
2
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
Connection Diagrams
LMP8480 8-Pin MSOP
LMP8480 8-Pad LLP
30191520
30191522
Top View
Top View
LMP8481 8-Pin MSOP
LMP8481 8-Pad LLP
30191521
30191523
Top View
Top View
Pin Descriptions
Pin
Name
Description
1
RSP
Positive current sense input
2
VCC
Positive supply voltage
3
NC
No Connection – Not internally Connected.
4
GND
Ground
5
VOUT
Output
6
NC or REFA
LMP8480: No Connection
LMP8481: Reference Voltage “B” Input
7
NC or REFB
LMP8480: No Connection
LMP8481: Reference Voltage “A” Input
8
RSN
Negative current sense input
Copyright © 1999-2012, Texas Instruments Incorporated
3
LMP8480 / LMP8481
Ordering Information
Package
Gain
Sensing
Part Number
Unidirectional
LMP8480MME-T *
Marking
Transport Media
AV8A
250 Units Tape and Reel
LMP8480MM-T *
20 V/V
Bidirectional
Unidirectional
50 V/V
Bidirectional
8-Pin MSOP
Unidirectional
1k Units Tape and Reel
LMP8480MMX-T *
3k Units Tape and Reel
LMP8481MM-T *
1k Units Tape and Reel
LMP8481MME-T *
AT9A
3k Units Tape and Reel
LMP8480MM-F *
1k Units Tape and Reel
AX8A
3k Units Tape and Reel
LMP8481MM-F *
1k Units Tape and Reel
LMP8481MME-F *
AF9A
3k Units Tape and Reel
LMP8480MM-S
1k Units Tape and Reel
LMP8480MME-S
AY8A
LMP8481MME-S *
LMP8481MME-H *
LMP8481MMX-H *
4
1k Units Tape and Reel
AZ8A
250 Units Tape and Reel
3k Units Tape and Reel
LMP8481MM-H *
Bidirectional
250 Units Tape and Reel
3k Units Tape and Reel
LMP8480MMX-H *
100 V/V
250 Units Tape and Reel
1k Units Tape and Reel
AA9A
LMP8480MM-H *
LMP8480MME-H *
MUA08A
3k Units Tape and Reel
LMP8481MMX-S *
Unidirectional
250 Units Tape and Reel
LMP8481MMX-F *
LMP8481MM-S *
Bidirectional
250 Units Tape and Reel
LMP8480MMX-F *
LMP8480MMX-S
60 V/V
250 Units Tape and Reel
LMP8481MMX-T *
LMP8480MME-F *
NSC
Drawing
1k Units Tape and Reel
AH9A
250 Units Tape and Reel
3k Units Tape and Reel
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
Package
Gain
Sensing
Part Number
Marking
Transport Media
LMP8480SD-T *
Unidirectional
20 V/V
Bidirectional
Unidirectional
LMP8480SDE-T *
1k Units Tape and Reel
8480T
250 Units Tape and Reel
LMP8480SDX-T *
3k Units Tape and Reel
LMP8481SD-T *
1k Units Tape and Reel
LMP8481SDE-T *
8481T
250 Units Tape and Reel
LMP8481SDX-T *
3k Units Tape and Reel
LMP8480SD-F *
1k Units Tape and Reel
LMP8480SDE-F *
8480F
250 Units Tape and Reel
LMP8480SDX-F *
50 V/V
3k Units Tape and Reel
LMP8481SD-F *
Bidirectional
8 Pad LLP
Unidirectional
LMP8481SDE-F *
1k Units Tape and Reel
8481F
250 Units Tape and Reel
LMP8481SDX-F *
3k Units Tape and Reel
LMP8480SD-S *
1k Units Tape and Reel
LMP8480SDE-S *
8480S
3k Units Tape and Reel
LMP8481SD-S *
Bidirectional
LMP8481SDE-S *
1k Units Tape and Reel
8481S
250 Units Tape and Reel
LMP8481SDX-S *
3k Units Tape and Reel
LMP8480SD-H *
Unidirectional
LMP8480SDE-H *
1k Units Tape and Reel
8480H
250 Units Tape and Reel
LMP8480SDX-H *
100V/V
3k Units Tape and Reel
LMP8481SD-H *
Bidirectional
LMP8481SDE-H *
SDA08A
250 Units Tape and Reel
LMP8480SDX-S *
60 V/V
NSC
Drawing
1k Units Tape and Reel
8481H
250 Units Tape and Reel
LMP8481SDX-H *
3k Units Tape and Reel
Devices with an asterisk (*) are future products. Please contact the factory for availability.
Copyright © 1999-2012, Texas Instruments Incorporated
5
LMP8480 / LMP8481
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for
availability and specifications.
Over operating free-air temperature range (unless otherwise noted).
LMP8480, LMP8481
UNIT
Supply Voltage (VCC to GND)
-0.3 to +85
V
RSP or RSN to GND
-0.3 to +85
V
VOUT to GND
-0.3 to the lesser of (VCC + 0.3) or +20
V
Other VREF pin tied to ground
-0.3 to +12
V
Applied to both VREF Pins tied together
-0.3 to +6
V
VREF Pins
(LMP8481 Only)
Differential Input Voltage
Current into output pin
Current into any other pins
Operating Temperature
Storage Temperature
Junction Temperature
MSOP-8
Package Thermal
Resistance (θJA)
LLP-8
Human Body Model (HBM)
ESD Ratings
Charged Device Model (CDM)
±85
±20 (Note 12)
±5 (Note 12)
–40 to +125
-65° to +150
+150
185
70
2000
750
V
mA
mA
°C
°C
°C
°C/W
°C/W
V
V
Recommended Operating Ratings
Expected normal operating conditions over free-air temperature range (unless otherwise noted).
LMP8480, LMP8481
Supply Voltage (VCC)
+4.5V to +76
Common Mode Voltage
Differential Input Voltage (VSENSE)
+4.0V to +76
Reference Input
(LMP8481 Only)
6
±667
UNIT
V
V
mV
VREFA and VREFB tied together
-0.3 to the lesser of (VCC - 1.5) or +6
V
Single VREF pin with other VREF pin grounded
-0.3 to +12, or where the average of the two
VREF pins is less than the lesser of (VCC - 1.5)
or +6
V
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
Electrical Characteristics
(Note 5)
Unless otherwise specified, all limits guaranteed for at TA = 25°C, VCC= +4.5V to +76V, +4.5V < VCM < +76V, RL= 100k, VSENSE =
(VRSP - VRSN) = 0V. Boldface limits apply at the temperature extremes, TMIN ≦ TA ≦ TMAX.
Parameter
Condition
VOS
Input Offset Voltage (RTI)
Input Offset Voltage Drift
(Note 8)
Differential Input Voltage Across Sense
Resistor (Note 10)
Ta= +25°C
ΔVSENSE = 100mV
Ta= –40°C to +125°C
±80
IB VCC = VRSP = 76V, Per Input
VCC = 16
(MAX)
AV
6.3
12
μA
2
μA
-T Version
667
-F Version
267
-S Version
222
19.8
20
20.2
-F Version
49.6
50
50.4
-S Version
59.5
60
60.5
99.2
100
100.8
VCC = VRSP = 48V
Gain Error
±0.6
%
Ta= –40°C to +125°C
±0.8
%
DC Power Supply Rejection Ratio
DC Common Mode Rejection Ratio
DC VCC = 48V, VRSP = 4.5 to 76V
CMRR VCC = 48V, VRSP = 4 to 76V
Input Common Mode Voltage Range
CMVR CMRR > 100dB
Maximum Output Voltage
(Headroom)
(VOMAX = VCC – VOUT)
Minimum Output Voltage
VOMIN
100
122
dB
100
124
dB
124
V
230
500
mV
VCC = VRSP = 48V, VSENSE = -1V,
IOUT (sinking) = 10µA
3
15
VCC = VRSP = 4.5V, VSENSE = -1V,
IOUT (sinking) = 10µA
3
VCC = VRSP = 48V, VSENSE = -1V,
IOUT (sinking) = 100µA
18
VCC = VRSP = 4.5V, VSENSE = -1V,
IOUT (sinking) = 100µA
18
12
V
0.001
%
VCC = 4.5V, VRSP = 48V, VSENSE = +1V
IOUT (sourcing) = 500μA
Output voltage with load
VOLOAD
VCC=28V, VRSP=28V, VSENSE=600mV, IOUT
(sourcing)=500uA
Output Load Regulation
VOLREG
VCC = 20, VRSP = 16, VOUT =12, ΔIL= 200na to
8mA
4
0.1
mV
Supply Current
ICC VOUT=2V, RL = 10M, VCC= VRSP = 76V
88
−3 dB Bandwidth
BW RL= 10M, CL = 20pF
270
Slew Rate (Note 9)
V
from 10mV to 80mV, RL=10M,
SR SENSE
CL=20pF
1
Input Referred Voltage Noise
eni f = 1 kHz
95
Output Settling Time to 1% of Final Value
tSETTLE
Power-up Time
Copyright © 1999-2012, Texas Instruments Incorporated
tPU
dB
76
ROUT VSENSE = 100mV
VOMAX
V/V
Ta= +25°C
DC
V
= 48V, VCC = 4.5 to 76V
PSRR RSP
Output Resistance / Load Regulation
mV
133
-T Version
-H Version
µV
0.01
-H Version
Gain
Units
μV/°C
6
ILEAK VCC = 0, VRSP = 76V, Both Inputs Together
VSENSE
±265
±900
TCVOS
Input Bias Current (Note 11)
Input Leakage Current
VCC = VRSP = 48V,
Min
Typ
Max
(Note 7) (Note 6) (Note 7)
55
155
uA
kHz
V/µs
nV/
VSENSE = 10mV to 100mV and 100mV to
10mV,
20
µs
VCC = VRSP = 48V, VSENSE = 100mV, output to
1% of final value
50
µs
7
LMP8480 / LMP8481
Parameter
Saturation Recovery Time
Condition
tRECOVE
RY
Max Output Capacitance Load
Min
Typ
Max
(Note 7) (Note 6) (Note 7)
Units
50
µs
500
pF
Output settles to 1% of final value, the device
will not experience phase reversal when
overdriven.
CLOAD No sustained oscillations
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Tables.
Note 2: Exceeding the Operating Ratings for extended periods of time may effect device reliability or cause parametric shifts.
Note 3: Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD SD std. of JEDEC) FieldInduced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJ(MAX), θJA, and the ambient temperature, TA. The maximum
allowable power dissipation PDMAX = (TJ(MAX) - TA)/ θJA or the number given in Absolute Maximum Ratings, whichever is lower.
Note 5: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating
of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ >
TA.
Note 6: Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and will also depend
on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.
Note 7: All limits are guaranteed by testing, design, or statistical analysis.
Note 8: Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change.
Note 9: The number specified is the average of rising and falling slew rates and measured at 90% to 10%.
Note 10: This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 11: Positive Bias Current corresponds to current flowing into the device.
Note 12: When the input voltage (VIN) at any pin exceeds power supplies (VIN < GND or VIN > VS ), the current at that pin must not exceed 5mA, and the voltage
(VIN) has to be within the Absolute Maximum Rating for that pin. The 20mA package input current rating limits the number of pins that can safely exceed the
power supplies with current flow to four pins.
8
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
Typical Performance Characteristics
Unless otherwise specified, TA = 25°C, VCC= 4.5V to 76V, 4.5V <
VCM < 76V, RL= 100k, VSENSE = (VRSP – VRSN) = 0V, for all gain options.
Offset Voltage Histogram
Typical Offset Voltage vs. Temperature
INPUT OFFSET VOLTAGE (μV)
50
40
VCC = VRSP = 48V
30
20
10
0
-10
-20
-30
-40
-50
-50
-25
0
25 50 75
TEMPERATURE (°C)
100 125
30191519
Typical Gain Accuracy vs. Temperature
30191508
Typical Gain Accuracy vs. Supply Voltage
0.5
0.5
VCC = VRSP= 48V
VRSP = 48V
0.4
0.3
GAIN ACCURACY (%)
GAIN ACCURACY (%)
0.4
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.5
-50
-25
0
25 50 75 100 125
TEMPERATURE (°C)
0
10
20 30 40 50 60
SUPPLY VOLTAGE (V)
70
30191509
Typical Offset Voltage vs. Supply Voltage
30191512
AC Common-Mode Rejection Ratio vs. Frequency
100
-40
VRSP = 48V
80
ΔVCM = 2Vpp
-50
60
-60
40
CMRR (dB)
INPUT OFFSET (μV)
80
20
0
-20
-40
-70
-80
-90
-100
-60
-80
-110
-100
-120
0
10
20 30 40 50 60
SUPPLY VOLTAGE (V)
70
80
30191514
Copyright © 1999-2012, Texas Instruments Incorporated
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
30191516
9
LMP8480 / LMP8481
Small Signal Gain vs. Frequency
-40
50
-50
45
VOUT = 100mVpp
-60
40
LMP8480-S
-70
35
GAIN (dB)
PSRR (dB)
AC Power Supply Rejection Ratio vs. Frequency
-80
-90
-100
30
25
20
-110
15
-120
10
-130
5
-140
0
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
100
1k
10k
100k
FREQUENCY (Hz)
30191517
30191513
Small Signal Pulse Response
4
0.08
3
0.06
2
0.04
OUTPUT (V)
OUTPUT (V)
Large Signal Pulse Response
1
0
-1
0.02
0.00
-0.02
-2
-0.04
-3
-0.06
-4
-0.08
0
20 40 60 80 100 120 140 160 180 200
TIME (μs)
0 20 40 60 80 100120140160180200
TIME (μs)
30191559
30191560
Supply Current vs. Supply Voltage
Supply Current vs. Temperature
100
115
95
SUPPLY CURRENT (μA)
SUPPLY CURRENT (μA)
VRSP = 48V
90
85
80
75
110
VCC = VRSP = 48V
105
100
95
90
85
80
0
10
20 30 40 50 60
SUPPLY VOLTAGE (V)
70
80
30191511
10
1M
-50
-25
0
25 50 75
TEMPERATURE (°C)
100 125
30191510
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
Saturated Output Sourcing Current at 4.5V
Saturated Output Sinking Current at 4.5V
10
10
VCC = 5V
1
1
VOUT (V)
VCC - VOUT (V)
VCC = 5V
.1
.01
.01
-40°C
+25°C
+85°C
+125°C
.001
.01
.1
1
SOURCING CURRENT (mA)
.1
-40°C
+25°C
+85°C
+125°C
.001
10
.01
.1
1
SINKING CURRENT (mA)
10
30191504
Saturated Output Sourcing Current at 12V
30191505
Saturated Output Current Sinking at 12V
10
10
VCC = 12V
1
1
VOUT (V)
VCC - VOUT (V)
VCC = 12V
.1
.01
.01
-40°C
+25°C
+85°C
+125°C
.001
.01
.1
1
SOURCING CURRENT (mA)
-40°C
+25°C
+85°C
+125°C
.001
10
30191506
Copyright © 1999-2012, Texas Instruments Incorporated
.1
.01
.1
1
SINKING CURRENT (mA)
10
30191507
11
LMP8480 / LMP8481
Application Information
LMP8480 AND LMP8481 INTRODUCTION
The LMP8480 and LMP8481 are single supply, high side current sense amplifiers with available fixed gains of x20, x50, x60 and
x100. The power supply range is 4.5V to 76V, while the common mode input voltage range is capable of 4.0V to 76V operation.
The supply voltage and common mode range are completely independent of each other. This makes the LMP848x supply voltage
extremely flexible, as the LMP848x's supply voltage can be greater than, equal to, or less than the load source voltage, and allowing
the device to be powered from the system supply or the load supply voltage.
The amplifier supply voltage does not have to be larger than the load source voltage. A 76V load source voltage with a 5V LMP8481
supply voltage is perfectly acceptable.
THEORY OF OPERATION
The LMP8480 and LMP8481 are comprised of two main stages. The first stage is a differential input current to voltage converter,
followed by a differential voltage amplifier and level-shifting output stage. Also present is an internal 14 Volt Low Dropout Regulator
(LDO) to power the amplifiers and output stage, as well as a reference divider resistor string to allow the setting of the reference
level.
As seen in Figure 1, the current flowing through RSENSE develops a voltage drop called VSENSE. The voltage across the sense
resistor, VSENSE, is then applied to the input RSP and RSN pins of the amplifier.
30191530
FIGURE 1. LMP8481 Functional Diagram
Internally, the voltage on each input pin is converted to a current by the internal precision thin-film input resistors RGP and RGN . A
second set of much higher value VCM sense resistors between the inputs provide a sample of the input common mode voltage for
internal use by the differential amplifier.
VSENSE is applied to the differential amplifier through RGP and RGN. These resistors change the input voltage to a differential current.
The differential amplifier then servos the resistor currents through the MOSFETs to maintain a zero balance across the differential
amplifier inputs.
With no input signal present, the currents in RGP and RGN are equal. When a signal is applied to VSENSE, the current through R GP
and RGN are imbalanced and are no longer equal. The amplifier then servos the MOSFETS to correct this current imbalance, and
the extra current required to balance the input currents is then reflected down into the two lower 400kΩ “tail” resistors. The difference
in the currents into the tail resistors is therefore proportional to the amplitude and polarity of VSENSE. The tail resistors, being larger
than the input resistors for the same current, then provide voltage gain by changing the current into a proportionally larger voltage.
The gain of the first stage is then set by the tail resistor value divided by RG value.
The differential amplifier stage then samples the voltage difference across the two 400K tail resistors and also applies a further
gain-of-five and output level-shifting according to the applied reference voltage (VREF).
The resulting output of the amplifier will be equal to the differential input voltage times the gain of the device, plus any voltage value
applied to the two VREF pins.
12
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
The resistor values in the schematic are ideal values for clarity and understanding. The table below shows the actual values used
that account for parallel combinations and loading. This table can be used for calculating the effects of any additional external
resistance.
Gain Option
RGP and RGN
(each)
RVCMSENSE
(each)
RTAIL
(each)
Differential Amp
FB
(each)
VREFx Resistors
(each)
20x
98.38k
491.9k
393.52k
1967.6k
98.38k
50x
39.352k
196.76k
393.52k
1967.6k
98.38k
60x
32.793k
172.165k
393.52k
1967.6k
98.38k
100x
19.676k
98.38k
393.52k
1967.6k
98.38k
FIGURE 2. Actual Internal Resistor Values
UNI-DIRECTIONAL VS. BI-DIRECTIONAL OPERATION
Uni-directional operation is where the load current only flows in one direction (VSENSE is always positive). Application examples
would be PA monitoring, non-inductive load monitoring and laser or LED drivers. This allows the output zero reference to be true
zero volts on the output. The LMP8480 is designed for unidirectional applications where the setting of VREF is not required. See
the UNI-DIRECTIONAL OPERATION for more details.
Bi-directional operation is where the load current can flow in both directions (VSENSE can be positive or negative). Application
examples would be battery charging or regenerative motor monitoring. The LMP8481 is designed for bidirectional applications and
has a pair of VREF pins to allow the setting of the output zero reference level (VREF). See the BI-DIRECTIONAL OPERATION
(LMP8481 ONLY) section for more details.
UNI-DIRECTIONAL OPERATION
The LMP8480 is designed for unidirectional current sense applications. The output of the amplifier will be equal to the differential
input voltage times the fixed device gain.
30191551
FIGURE 3. Uni-Directional Application with LMP8480
Copyright © 1999-2012, Texas Instruments Incorporated
13
LMP8480 / LMP8481
14
12
VCC > 14V
VOUT (V)
10
8
6
4
2
0
0.0
0.1
0.2
0.3 0.4 0.5
VSENSE (V)
0.6
0.7
30191515
FIGURE 4. Uni-Directional Transfer Function for Gain-of-20 option
The output voltage can be calculated from:
VOUT = ( (VRSP – VRSN) * Av )
It should be noted that the minimum “zero” reading will be limited by the lower output swing and input offset.
The LMP8480 is functionally identical to the LMP8481, but with the VREFA and VREFB nodes grounded internally. The LMP8481 can
replace the LMP8480 if both the VREF inputs (pins 6 & 7) are grounded.
BI-DIRECTIONAL OPERATION (LMP8481 ONLY)
Bi-directional operation is required where the measured load current can be positive or negative. Because VSENSE can be positive
or negative, and the output cannot swing negative, the “zero” output level must be level-shifted above ground to a known zero
reference point. The LMP8481 allows for the setting this reference point.
30191535
FIGURE 5. Bi-Directional current sensing using LMP8481
The VREFA and VREFB pins set the zero reference point. The output “zero” reference point is set by applying a voltage to the REFA
and/or REFB pins. See the BI-DIRECTIONAL OPERATION (LMP8481 ONLY) section below. REFA AND REFB PINS (LMP8481
Only) below shows the output transfer function with a 1.2V reference applied to the Gain-of-20 option
14
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
14
12
VCC > 14V
VOUT (V)
10
8
6
4
2
VREF = 1.2V
0
-0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
VSENSE (V)
30191557
FIGURE 6. Bi-Directional Transfer Function using 1.2V Reference Voltage
REFA AND REFB PINS (LMP8481 Only)
The voltage applied to the VREFA and VREFB pins controls the output zero reference level.
The reference inputs consist of a pair of divider resistors with equal values to a common summing point, VREF’, as shown in Figure
11 below.
30191532
FIGURE 7. VREF Input Resistor Network
VREF’ is the voltage at the resistor tap point that will be directly applied to the output as an offset.
VOUT = ( (VRSP – VRSN) * Av ) + VREF’
Where:
VREF’ = VREFA = VREFB (Equal Inputs)
OR
VREF’ = ( VREFA + VREFB ) / 2 (Separate inputs)
30191533
FIGURE 8. Applying 1:1 Direct Reference Voltage
For mid-range operation VREFB should be tied to ground and VREFA can be tied to VS or an external A/D reference voltage. The
output will be set to one-half the reference voltage. For example, a 5V reference would result in a 2.5V output “zero” reference.
Copyright © 1999-2012, Texas Instruments Incorporated
15
LMP8480 / LMP8481
30191534
FIGURE 9. Applying A Divided Reference Voltage.
VREF’ = (VREFA – VREFB) / 2
When the reference pins are biased at different voltages, the output will be referenced to the average of the two applied voltages.
The reference pins should always be driven from clean, stable sources, such as A/D reference lines or clean supply lines. Any
noise or drifts on the reference inputs are directly reflected in the output. Care should be taken if the power supply is used as the
reference source so as to not introduce supply noise, drift or sags into the measurement.
It is possible to set different resistor divider ratios by adding external resistors in series with the internal 100K resistors, though the
temperature coefficient (tempco) of the external resistors may not tightly track the internal resistors and there will be slight errors
over temperature.
REFERENCE INPUT VOLTAGE LIMITS
The maximum voltage on either reference input pin is limited to VCC or 12V, whichever is less.
The average voltage on the two VREF pins, and thus the actual output reference voltage level, is limited to a maximum of 1.5V below
VCC, or 6V, whichever is less. Beware that supply voltages of less than 7.5V will have a diminishing VREF maximum.
Both VREFA and VREFB may both be grounded to provide a ground referenced output (thus functionally duplicating the LMP8480).
It should be noted that there can be a dynamic error in the VREF to output level matching of up to 100µV/V. Normally this is not an
issue for fixed references, but if the reference voltage is dynamically adjusted during operation, this error needs to be taken into
account during calibration routines. This error will vary in both amplitude and polarity part-to-part, but the slope will generally be
linear.
SELECTION OF THE SENSE RESISTOR
The accuracy of the current measurement depends heavily on the accuracy of the shunt resistor RSENSE. Its value depends on the
application and is a compromise between small-signal accuracy, maximum permissible voltage drop and allowable power dissipation in the current measurement circuit.
The use of a “4-terminal” or “Kelvin” sense resistor is highly recommended. See the ERROR SOURCES AND LAYOUT CONSIDERATIONS below.
For best results, the value of the resistor is calculated from the maximum expected load current ILMAX and the expected maximum
output swing VOUTMAX, plus a few percent of headroom. See the MAXIMUM OUTPUT VOLTAGE section for details about the
maximum output voltage limits.
High values of RSENSE provide better accuracy at lower currents by minimizing the effects of amplifier offset. Low values of
RSENSE minimize load voltage loss, but at the expense of accuracy at low currents. A compromise between low current accuracy
and load circuit losses must generally be made.
The maximum VSENSE voltage that must be generated across the RSENSE resistor will be:
VSENSE = VOUTMAX / AV.
Note: The maximum VSENSE voltage should be no more than 667mV.
From this maximum VSENSE voltage, the RSENSE value can be calculated from:
RSENSE = VSENSE / ILMAX
Care must be taken to not exceed the maximum power dissipation of the resistor. The maximum sense resistor power dissipation
will be:
PRSENSE = VSENSE * ILMAX
It is recommended that a 2-3x minimum safety margin be used in selecting the power rating of the resistor.
USING PCB TRACES AS SENSE RESISTORS
While it may be tempting to use a known length of PCB trace resistance as a sense resistor, it is not recommended.
The tempco of copper is typically 3300-4000ppm/°K, which can vary over PCB process variations and require measurement correction (possibly requiring ambient temperature measurements).
A typical surface mount sense resistor tempco is in the 50ppm to 500ppm/°C range offering more measurement consistency and
accuracy over the copper trace. Special low tempco resistors are available in the 0.1 to 50ppm range, but at a higher cost.
16
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
INPUT COMMON MODE AND DIFFERENTIAL VOLTAGE RANGE
The input common mode range, where “common mode range” is defined as the voltage from ground to the voltage on RSP input,
should be in the range of +4.0V to +76V. Operation below 4.0V on either input pin will introduce severe gain error and nonlinearities.
The maximum differential voltage (defined as the voltage difference between RSP and RSN) should be 667mV or less. The theoretical
maximum input is 700mV (14V / 20).
Taking the inputs below 4V will not damage the device, but the output conditions during this time are not predictable and are not
guaranteed.
If the load voltage (Vcm) is expected to fall below 4V as part of normal operation, preparations must be made for invalid output
levels during this time.
LOW SIDE CURRENT SENSING
The LMP8480 and LMP8481 are not recommended for low-side current sensing at ground level. The voltage on either input pin
must be a minimum of 4.0V above the ground pin for proper operation.
INPUT SERIES RESISTANCE
Because the input stage uses precision resistors to convert the voltage on the input pin to a current, any resistance added in series
with the input pins will change the gain. If a resistance is added in series with an input, the gain of that input will not track that of
the other input, causing a constant gain error.
It is not recommended to use external resistances to alter the gain, as external resistors will not have the same thermal matching
as the internal thin film resistors.
If resistors are purposely added for filtering, resistance should be added equally to both inputs and the user should be aware that
the gain will change slightly. See end of the THEORY OF OPERATION section for the internal resistor values.
MINIMUM OUTPUT VOLTAGE
The amplifier output cannot swing to exactly zero volts. There will always be a minimum output voltage set by the output transistor
saturation and input offset errors. This will create a minimum output swing around the zero current reading due to the output
saturation. The user should be aware of this when designing any servo loops or data acquisition systems that may assume 0V =
0A. If a true zero is required, the LMP8481 should be used with a VREF set slightly above ground (>50mV). See the SWINGING
OUTPUT BELOW GROUND section below for a possible solution to this issue.
SWINGING OUTPUT BELOW GROUND
If a negative supply is available, a pull-down resistor can be added from the output to the negative voltage to allow the output to
swing a few millivolts below ground. This will now allow the ADC to resolve true zero and recover codes that would normally be
lost to the negative output saturation limit.
30191556
FIGURE 10. Output “Pull-Down” Resistor Example
A minimum of 50µA should be sourced (“pulled”) from the output to a negative voltage. The pulldown resistor can be calculated
from:
RPD = –VS/50µA
For example, if a -5V supply is available, a pull-down resistor of 5V/50uA = 100K should be used. This will allow the output to swing
to about 10mV below ground.
This technique may also reduce the maximum positive swing voltage. Do not forget to include the parallel loading effects of the
pulldown any output load. It is recommended not to exceed -100mV on the output. Source currents greater than 100uA should be
avoided to prevent self-heating at high supply voltages. Pulldown resistor values should not be so low as to heavily load the output
during positive output excursions. This mode of operation is not directly specified and is not guaranteed.
Copyright © 1999-2012, Texas Instruments Incorporated
17
LMP8480 / LMP8481
MAXIMUM OUTPUT VOLTAGE
The LMP8481 has an internal precision 14V low dropout regulator which limits the maximum amplifier output swing to about 250mV
below VCC or 13.7V (whichever is less). This effectively clamps the maximum output to slightly less than 13.7V even with a VCC
greater than 14V.
Care should be taken if the output is driving an A/D input with a maximum A/D maximum input voltage lower than the amplifier
supply voltage, as the output can swing higher than the planned load maximum due to input transients or shorts on the load and
overload or possibly damage the A/D input.
A resistive attenuator, as shown in Figure 11 below, can be used to match the maximum swing to the input range of the A/D.
30191553
FIGURE 11. Typical Application with Resistive Divider
ERROR SOURCES AND LAYOUT CONSIDERATIONS
The traces leading to and from the sense resistor can be significant error sources. With small value sense resistors (<100m), any
trace resistance shared with the load current can cause significant errors.
30191552
FIGURE 12. “Kelvin” or “4–wire” Connection to the Sense Resistor
The amplifier inputs should be directly connected to the sense resistor pads using “Kelvin” or “4-wire” connection techniques. The
traces should be one continuous piece of copper from the sense resistor pad to the amplifier input pin pad, and ideally on the same
copper layer with minimal vias or connectors. This can be important around the sense resistor if it is generating any significant heat
gradients.
To minimize noise pickup and thermal errors, the input traces should be treated as a differential signal pair and routed tightly
together with a direct path to the input pins. The input traces should be run away from noise sources, such as digital lines, switching
supplies or motor drive lines. Remember that these traces can contain high voltage, and should have the appropriate trace routing
clearances.
Since the sense traces only carry the amplifier bias current (about 7µA at room temp), the connecting input traces can be thinner,
signal level traces. Excessive Resistance in the trace should also be avoided.
The paths of the traces should be identical, including connectors and vias, so that these errors will be equal and cancel.
The sense resistor will heat up as the load increases. As the resistor heats up, the resistance generally goes up, which will cause
a change in the readings The sense resistor should have as much heatsinking as possible to remove this heat through the use of
heatsinks or large copper areas coupled to the resistor pads. A reading drifting over time after turn-on can usually be traced back
to sense resistor heating.
18
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
POWER SUPPLY DECOUPLING
In order to decouple the LMP8480/81 from AC noise on the power supply, it is recommended to use a 0.1 μF bypass capacitor
between the VCC and GND pins. This capacitor should be placed as close as possible to the supply pins. In some cases an additional
10 μF bypass capacitor may further reduce the supply noise.
Do not forget that these bypass capacitors must be rated for the full supply and/or load source voltage! It is recommended that the
working voltage of the capacitor (WVDC) should be at least two times the maximum expected circuit voltage.
LLP DIE ATTACH PAD
The bottom thermal pad of the LLP package should be tied to the same ground as the ground pin. Be aware that noise on this pad
can couple into the bottom of the die, so the ground should be as clean as possible.
Copyright © 1999-2012, Texas Instruments Incorporated
19
LMP8480 / LMP8481
Physical Dimensions inches (millimeters) unless otherwise noted
MSOP–8
NS Package Number MUA08A
LLP-8
NS Package Number SDA08A
Warning: LLP-8 thermal pad shall be tied to GND
20
Copyright © 1999-2012, Texas Instruments Incorporated
LMP8480 / LMP8481
Notes
Copyright © 1999-2012, Texas Instruments Incorporated
21
Notes
Copyright © 1999-2012, Texas Instruments
Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
17-Nov-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Samples
(3)
(Requires Login)
LMP8480MM-T/NOPB
ACTIVE
VSSOP
DGK
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
LMP8480MME-S/NOPB
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
LMP8480MME-T/NOPB
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
LMP8480MMX-S/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
LMP8480MMX-T/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
17-Nov-2012
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Nov-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LMP8480MM-T/NOPB
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMP8480MME-S/NOPB
VSSOP
DGK
8
250
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMP8480MME-T/NOPB
VSSOP
DGK
8
250
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMP8480MMX-S/NOPB
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMP8480MMX-T/NOPB
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Nov-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMP8480MM-T/NOPB
VSSOP
DGK
8
1000
203.0
190.0
41.0
LMP8480MME-S/NOPB
VSSOP
DGK
8
250
203.0
190.0
41.0
LMP8480MME-T/NOPB
VSSOP
DGK
8
250
203.0
190.0
41.0
LMP8480MMX-S/NOPB
VSSOP
DGK
8
3500
349.0
337.0
45.0
LMP8480MMX-T/NOPB
VSSOP
DGK
8
3500
349.0
337.0
45.0
Pack Materials-Page 2
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