FA5604/5605/5606 FUJI Power Supply Control IC General PWM-IC FA5604/5605/5606 Application Note April-2011 Fuji Electric Co.,Ltd. Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 1 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 WARNING 1. This Data Book contains the product specifications, characteristics, data, materials, and structures as of April 2011. The contents are subject to change without notice for specification changes or other reasons. When using a product listed in this Data Book, be sure to obtain the latest specifications. 2. All applications described in this Data Book exemplify the use of Fuji’s products for your reference only. No right or license, either express or implied, under any patent, copyright, trade secret or other intellectual property right owned by Fuji Electric Co., Ltd. is (or shall be deemed) granted. Fuji makes no representation or warranty, whether express or implied, relating to the infringement or alleged infringement of other’s intellectual property rights which may arise from the use of the applications described herein. 3. Although Fuji Electric is enhancing product quality and reliability, a small percentage of semiconductor products may become faulty. When using Fuji Electric semiconductor products in your equipment, you are requested to take adequate safety measures to prevent the equipment from causing a physical injury, fire, or other problem if any of the products become faulty. It is recommended to make your design fail-safe, flame retardant, and free of malfunction. 4. The products introduced in this Data Book are intended for use in the following electronic and electrical equipment which has normal reliability requirements. •Computers •OA equipment •Communications equipment (terminal devices) •Measurement equipment •Machine tools •Audiovisual equipment •Electrical home appliance •Personal equipment •Industrial robots etc. 5. If you need to use a product in this Data Book for equipment requiring higher reliability than normal, such as for the equipment listed below, it is imperative to contact Fuji Electric to obtain prior approval. When using these products for such equipment, take adequate measures such as a backup system to prevent the equipment from malfunctioning even if a Fuji’s product incorporated in the equipment becomes faulty. •Transportation equipment (mounted on cars and ships) •Trunk communications equipment •Traffic-signal control equipment •Gas leakage detectors with an auto-shut-off feature •Emergency equipment for responding to disasters and anti-burglary devices •Safety devices 6. Do not use products in this Data Book for the equipment requiring strict reliability such as (without limitation) •Space equipment •Aeronautic equipment •Atomic control equipment •Submarine repeater equipment •Medical equipment 7. Copyright © 1995 by Fuji Electric Co., Ltd. All rights reserved. No part of this Data Book may be reproduced in any form or by any means without the express permission of Fuji Electric. 8. If you have any question about any portion in this Data Book, ask Fuji Electric or its sales agents before using the product. Neither Fuji nor its agents shall be liable for any injury caused by any use of the products not in accordance with instructions set forth herein. Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 2 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 CONTENTS 1. Description ·················································· 4 2. Features ·················································· 4 3. Outline ·················································· 4 4. Types of FA5604 series ·················································· 4 5. Block diagram ·················································· 5 6. Pin assignment ·················································· 5 7. Ratings and characteristics 8. Characteristics curves ·················································· 10 to 15 9. Description of each circuit ·················································· 16 to 21 10. Design advice ·················································· 22 to 30 11. Application circuit ·················································· 31 ················································ 6 to 9 Note The contents are subject to change without notice for specification changes or other reasons. Parts tolerance and characteristics are not defined in all application described in this Date book. When design an actual circuit for a product, you must determine parts tolerance and characteristics for safe and economical operation. Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 3 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 1. Description The FA5604/05/06 is the PWM type switching power supply control IC that can directly drive power MOSFET. This IC realizes the low power consumption with reducing the switching frequency at light load. This IC contains many functions in a small 8-pin package. With this IC, a high-performance and compact power supply can be created because not many external discrete components are needed. 2. Features Voltage mode control Systems organized by circuit methods FA5604: Applied to forward power supplies (maximum duty cycle = 46%) FA5605/FA5606: Applied to flyback power supplies (maximum duty cycle = 70%) Automatically reduces the switching frequency to suppress loss in stand-by mode The switching frequency can be set (RT pin) A drive circuit for connecting a power MOSFET directly Output peak current: +1.0A / -0.5A Overcurrent of primary side limiting function (IS pin negative voltage sense) Overload protection function (switching frequency control by VF pin) Overload protection function (CS pin) Built-in output overvoltage latch protection (stopping the latch by pulling up the CS terminal by external signals) Undervoltage lockout function (17.5V ON / 9.7V OFF) 8-pin package (SOP-8) 3. Outline SOP-8 0.18±0.08 5 1 0.65±0.25 3.9 6 ±0.2 8 4 4.9 1.8 MAX 0.20 +0.10 -0.05 ～ 8° 0° 0.4 ±0.1 1.27 4. Types of FA5604 type Max. duty cycle(typ) FA5604N 46% FA5605N 70% FA5606N Frequency reduction mode at light-load FB voltage: 1.8 V/1.95 V FB voltage: 1.55 V/1.65 V Hiccup operation at overload Overcurrent detection Package Operation period: shutdown period = 1:7 Operation period: shutdown period = 1:15 Operation period: shutdown period = 1:7 – detection SOP-8 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 4 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 37.5V 15.5V 5. Block diagram 6. Pin assignment Pin Symbol Function Description 1 2 RT Oscillator timing resister Connected to oscillator timing resistor FB Feedback Input of PWM comparator OLP 3 IS Overcurrent detection Input of the overcurrent limiting function ( - ) 4 GND Ground Signal ground of the power IC 5 OUT Output Output for driving a power MOSFET 6 VCC Power supply Power supply 7 VF Switching Frequency Control at over load Overload protection 8 CS Soft-start and ON/OFF control Soft-start, ON/OFF function, OLP-hiccup, and latch-mode shutdown operations Note) Power ground PGND (▼) and signal ground GND () are connected through current sensing resistor Rs. CS 8 VF 7 VCC 6 OUT 5 1 RT 2 FB 3 IS 4 GND Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 5 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 7. Rating and Characteristics The contents are subject to change without notice for specification changes or other reasons. Current characteristics; “+” is sink current and “-” is source current (1)Absolute maximum ratings Item Symbol Rating Unit Supply Voltage VCC 35 V Supply Current ICC 30 mA IOH - 0.5 A IOL +1.0 A VOUT ‐0.3 to VCC+0.3 V Input voltage at VF pin VVF ‐0.3 to VCC+0.3 V Input current at CS pin Input voltage at FB,IS pin Power dissipation (Ta<50°C) Maximum junction temperature in operation VCS VLT Pd Tj 2.0 - 0.3 to 5.0 400 - 40 to +150 mA V mW °C Storage temperature Tstg ‐40 to +150 °C Peak current at OUT pin Voltage at OUT pin Note) There are cases where the IC cannot output the rating current depending on VCC voltage or temperature. ※Maximum dissipation curve 400mW Maximum dissipation Pd [mW] Package thermal resistor : Rθj-a=250°C /W Rθj-c=72°C /W 0 -40 85 50 Ambiance temperature 150 Ta [°C] (2)Recommended Operating Conditions Item Symbol MIN TYP MAX Unit Supply voltage VCC pin capacitance VCC CVCC 11 10 18 47 30 220 V Fosc Rt Ta 100 7.5 -40 190 12 300 24 +85 Switching frequency (FB>VthFBS2) Timing resistance Ambiance temperature in operation F kHz kΩ °C Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 6 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (3)Electrical Characteristics (Tj=25°C,VCC=18V,Rt=12kΩ,unless otherwise specified) Oscillator Section (RT pin) Item Symbol Conditions MIN. TYP. MAX. Unit Switching oscillation frequency Fosc Rt=12kΩ, Tj=25°C 171 190 209 kHz Variation by supply voltage Fdv VCC=11V to 30V -2 - +2 % Variation by temperature FdT Tj= -40°C to +125°C - 0.05 - %/°C MIN. TYP. MAX. Unit -650 -500 -390 A Pulse Width Modulation Section (FB pin) Item Source current of FB pin Input threshold voltage Maximum duty cycle OLP threshold voltage Hysteresis voltage width Symbol IFB Conditions FB=0V VthFB0 Duty cycle=0% 0.9 1.0 1.1 V VthFBM Duty cycle=DMAX 2.7 3.0 3.25 V FA5604 43 46 49 FA5605/06 67 70 73 DMAX FB=3.25V % Volpon OLP mode OFF ON 3.2 3.5 3.8 V Volpoff OLP mode ON OFF 3.0 3.3 3.6 V 0.1 0.2 0.3 V MIN. TYP. MAX. Unit FA5604/05 1.65 1.80 1.95 FA5606 1.43 1.55 1.67 FA5604/05 1.8 1.95 2.1 FA5606 1.53 1.65 1.77 RT=24kΩ FA5604 -15 -7.5 0 FB=VthFBS FA5605/06 -10 -5 0 Volphys Frequency Control Section at Light Load (FB pin) Item Symbol VthFBS1 Conditions Light Load mode OFFON Input threshold voltage VthFBS2 Difference of switching frequency Minimum switching frequency Minimum on pulse width Foscdiff1 Light Load mode ONOFF V % FoscS2 FB=VthFB0 24 30 39 % tminS FB=VthFB0 300 400 500 ns MIN. TYP. MAX. Unit -183 -170 -157 mV -52 -40 -28 A 100 150 250 ns MIN. TYP. MAX. Unit CS=0V -13 -10 -7 A Vcson1 OFFON 0.65 0.75 0.90 V Vcsoff1 ONOFF 0.50 0.60 0.75 V 0.1 0.15 0.2 V 0VVthCSM 0.65 0.75 0.9 VthCSM0V 0.5 0.6 0.75 2.75 3.0 3.25 Current Sense Section (IS pin) Item Symbol Input threshold voltage VthIS Source current of IS pin IIS Propagation delay time tpdIS Conditions IS=0V ON/OFF, Soft-start Section (CS pin) Item Charge current of CS pin Symbol ICS0 Conditions ON/OFF threshold voltage Hysteresis voltage width Soft-start input voltage Vcshys1 VthCS0 VthCSM Duty cycle = 0% Duty cycle = DMAX V V Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 7 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 Latch Protection Section (CS pin) Item Symbol Conditions MIN. TYP. MAX. Unit Latch threshold voltage VthLAT 6.6 7.3 7.7 V Latch delay time TpdLAT 35 50 70 s 13 15 17 V MIN. TYP. MAX. Unit 3.9 4.2 4.5 V Clamp voltage of CS pin VCSP ICS=2mA Frequency Control Section at Overload (VF pin) Item Symbol Threshold voltage of frequency reducing at overload VVF FoscL1 Switching frequency at overload FoscL2 Difference of switching frequency Foscdiff2 Conditions FB=open Rt=12kΩ FA5604 145 165 Fosc FB=open, VF=5V FA5605/06 155 180 Fosc Rt=12kΩ FA5604 90 115 160 FB=open, VF=2V FA5605/06 110 140 170 Rt=24kΩ FA5604 -15 -7.5 0 FB=open, VF=5V FA5605/06 -10 -5 0 2.7 3.0 3.3 V kHz kHz % VF voltage at timer enable VFcstim VF voltage at timer reset VFcstmr FB=open,VF increasing 3.15 3.5 3.85 V Hysteresis width at timer Vhyscst VFcstmr-VFcstim 0.45 0.5 0.55 V -2 -0.5 - A MIN. TYP. MAX. Unit VcstimH 4.9 5.7 6.5 V VcstimL 3.3 3.8 4.3 V VcstimW 1.5 1.9 2.3 V 0.9 1.6 2.5 V Input bias current at VF pin IVF VF=0V Hiccup Section (CS pin) Item Threshold voltage of timer Voltage width of timer Symbol Conditions Difference voltage between timer-upper voltage and Latch VcsdLT VCC=18V, Ccs=10nF threshold voltage Timer Charge current Icschg2 -13 -10 -7 A Timer Charge current Icsdis2 7 10 13 A 179 256 333 ms Delay time of OLP Tolp1 The time of OLP Tolp2 Time ratio of OFF/ON time Konoff VCC=18V, Ccs=10nF VCC=18V, FA5604/06 1225 1792 2330 Ccs=10nF FA5605 2688 3840 4992 FA5604/06 - 7 - FA5605 - 15 - MIN. TYP. MAX. Unit Tolp2/Tolp1 ms － Under Voltage Lock Out Section (VCC pin) Item Symbol Conditions Startup threshold voltage VCCON 15.5 17.5 19.5 V Shutdown threshold voltage VCCOFF 8.5 9.7 10.5 V UVLO hysteresis width VCCHYS 6 7.8 10 V Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 8 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 Output Driver Section (OUT pin) Item Symbol Conditions MIN. TYP. MAX. Unit Low level output voltage VOL IOL=100mA, VCC=18V - 0.7 1.5 V High level output voltage VOH IOH=-100mA, VCC=18V 15 16.5 - V Rise time Tr CL=1nF (OUT pin) 20 40 100 ns Fall time Tf CL=1nF (OUT pin) 15 30 70 ns MIN. TYP. MAX. Unit 14.5 15.5 16.5 V MIN. TYP. MAX. Unit VCC=14V - - 2 A VCC = Start threshold voltage - 14 35 A - 1.6 3.0 mA - 195 250 A VCC=14V - 190 240 A VCC=11V - 185 240 A VCC=14V - 190 240 A Over Voltage Protection Section (VCC pin) Item VCC pin clamp voltage at OFF mode Symbol VzdL Conditions Icc=250A Power Supply Current Section (VCC pin) Item Symbol Stand-by current IccSTB Start-up current IccST Steady operating mode supply current IccOP1 OFF mode supply current Iccoff CS timer-off mode supply current Iccoff1 Latch-mode supply current IccLAT1 Conditions At No Load, VCC=18V, FB=3.25V,VF=5V,CS=open At No Load, VCC=14V, FB=0V,VF=0V,CS=0V Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 9 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 8. Characteristic curve Ta=25°C, VCC=18V, Rt=12kΩ, unless otherwise specified Parts tolerance and characteristics are not defined in all application described in this Data book. Oscillation frequency vs.Timing resistance VFB=3.25V,VVF=5V,CS=OPEN Oscillation freqency vs.FB pin voltage VVF=5V,CS=OPEN,VIS=0V FA5604 200 175 300 Oscillation frequency Fosc [kHz] Oscillation frequency Fosc [kHz] 350 250 200 150 100 150 125 100 75 50 25 50 0 0 5 10 15 Timing resistance Rt [kΩ] 20 25 0 200 FA5605/06 FA5604 150 125 100 75 These are the characteristics after changes of the frequency at overload. Fosc ≈ 165 kHz or 180 kHz when VVF = 5 V. 50 25 5 150 125 100 75 50 25 0 0 0 1 2 3 VF pin voltage VVF[V] 4 5 0 Fosc variation by supply voltage VFB=3.25V,VVF=5V,CS=OPEN 2.0 200 1.5 175 1.0 0.5 FA5605/06 0.0 FA5604 -0.5 -1.0 1 2 3 FB pin voltage VFB [V] 4 5 Oscillation frequency vs.FB pin voltage Oscillation frequency Fosc [kHz] Variation by supply voltage Fdv [%] 4 175 Oscillation frequency Fosc [kHz] Oscillation frequency Fosc [kHz] 175 2 3 FB pin voltage VFB [V] Oscillation frequency vs.FB pin voltage FA5605 VVF=5V,CS=OPEN,VIS=0V Oscillation frequency vs. VF pin voltage VFB=5V,CS=OPEN 200 1 FA5606 VVF=5V,CS=OPEN,VIS=0V 150 125 100 75 50 25 -1.5 0 -2.0 0 5 10 15 20 25 Supply voltage VCC [V] 30 35 0 40 1 2 3 FB pin voltage VFB [V] 4 5 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 10 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 Oscillation frequency vs.Junction temperature(FA5606/06) VFB=3.25V,VVF=5V,CS=OPEN 2.0 2.0 1.5 1.5 Variation by temperature Fdt [%] Variation by temperature Fdt [%] Oscillation frequency vs.Junction temperature (FA5604) VFB=3.25V,VVF=5V,CS=OPEN 1.0 0.5 100kHz 0.0 190kHz -0.5 300kHz -1.0 -1.5 1.0 0.5 100kHz 0.0 -0.5 190kHz -1.0 300kHz -1.5 -2.0 -2.0 -50 -25 0 25 50 75 100 Junction temperature Tj [ ℃] 125 150 -50 -25 CS current vs.CS pin voltage (Hiccup mode) FB=OPEN,VVF=0V 0 25 50 75 100 Junction temperature Tj [ ℃] 125 150 IS source current vs.IS pin voltage VFB=3.25V,VVF=5V 15 -35 -36 IS source current IIS [uA] CS current Ics [uA] 10 5 0 -5 -37 -38 -39 -40 -41 -42 -43 -10 -44 -15 0 1 2 3 4 CS pin voltage VCS [V] 5 6 -45 0.00 7 0.10 IS pin voltage VIS [V] 0.15 0.20 IS pin threshold voltage vs.Junction temperature CS pin current vs.CS pin voltage (operation mode) VFB=3.25V,VVF=5V 100 -150 80 -155 IS pin threshold voltage [mV] CS pin current Ics [uA] 0.05 60 40 20 0 -160 -165 -170 -175 -20 -180 0 1 2 3 4 CS pin voltage VCS [V] 5 6 7 -50 -25 0 25 50 75 100 Junction temperature Tj [ ℃] 125 150 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 11 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 ON duty cycle vs.FB pin voltage VVF=5V,CS=OPEN,VIS=0V FA5604 80 70 70 60 60 ON duty cycle [%] ON duty cycle [%] 80 50 40 30 50 40 30 20 20 10 10 0 0 1 2 3 FB pin voltage VFB [V] 4 0 -500 5 ON duty cycle vs.FB pin voltage FA5605 80 70 70 60 60 ON duty cycle [%] ON duty cycle [%] 80 VVF=5V,CS=OPEN,VIS=0V 50 40 30 10 4 0 -500 5 ON duty cycle vs.FB pin voltage VVF=5V,CS=OPEN,VIS=0V FA5606 80 70 60 60 50 40 30 -100 0 FA5606 10 0 0 -500 5 VVF=5V,CS=OPEN,VIS=0V 30 10 4 -300 -200 FB pin source current IFB [uA] 40 20 2 3 FB pin voltage VFB [V] -400 50 20 1 ON duty cycle vs.FB source current FA5605 VVF=5V,CS=OPEN,VIS=0V 80 70 0 0 ON duty cycle vs.FB pin source current ON duty cycle [%] ON duty cycle [%] 2 3 FB pin voltage VFB [V] -100 30 10 1 -300 -200 FB pin source current IFB [uA] 40 20 0 -400 50 20 0 ON duty cycle vs.FB source current VVF=5V,CS=OPEN,VIS=0V FA5604 -400 -300 -200 FB pin source current IFB [uA] -100 0 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 12 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 FB pin source current ｖ ｓ.ＦＢ pin voltage VVF=5V,CS=OPEN 0 -2.5 -100 FB pin source current IFB [uA] CS pin charge current Ics [uA] CS pin charge current vs.Junction temperature VFB=3.25V,VVF=5V 0.0 -5.0 -7.5 -10.0 -200 -300 -400 -12.5 -500 -15.0 -600 -50 -25 0 25 50 75 100 Junction temperature Tj [ ℃] 125 150 0 Low level output voltage vs.Supply voltage IOL=100mA,VFB=3.25V,VVF=5V,CS=OPEN 1 2 3 FB pin voltage VFB [V] 4 5 High level output voltage vs.Supply voltage IOH=-100mA,VFB=3.25V,VVF=5V,CS=OPEN 1.0 2.0 VCC-High level output voltage [V] Low level output voltage VOL [V] 1.8 0.8 0.6 0.4 0.2 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0.0 0 5 10 15 20 25 Supply voltage VCC [V] 30 35 0 40 Startup threshold voltage vs.Junction temperature 10 15 20 25 Supply voltage VCC [V] 30 35 40 125 150 Shutdown threshold voltage vs.Junction temperature 10.70 Shutdown threshold voltage VCCOFF [V] 18.00 Startup threshold voltage VCCON [V] 5 17.75 17.50 17.25 17.00 16.75 16.50 16.25 16.00 10.45 10.20 9.95 9.70 9.45 9.20 8.95 8.70 -50 -25 0 25 50 75 100 Junction temperature Tj [ ℃] 125 150 -50 -25 0 25 50 75 100 Junction temperature Tj [ ℃] Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 13 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 Operating mode supply current vs.Junction temperature Operating mode supply current vs.Supply voltage VFB=3.25V,VVF=5V,CS=OPEN,VIS=0V,No Load VFB=3.25V,VVF=5V,CS=OPEN,VIS=0V,No Load 1.75 Operating mode supply current ICCOP [mA] Operating mode supply current ICCOP [mA] 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.70 1.65 1.60 1.55 1.50 0 5 10 15 20 25 Supply voltage VCC [V] 30 35 40 -50 -25 0 25 50 75 100 Junction temperature Tj [ ℃] 125 150 Maximum duty cycle vs.Junction temperature VFB=3.25V,VVF=5V,CS=OPEN(Dmax) 80 70 Maximum duty cycle [%] FA5605/06 60 50 FA5604 40 30 20 10 0 -50 -25 0 25 50 75 100 Junction temperature Tj [ ℃] 125 150 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 14 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 OFF mode supply current vs.Supply voltage VFB=0V,VVF=0V,VCS=0V,VIS=0V 500 7 450 OFF mode supply current ICCOFF [uA] OFF mode supply current ICCOFF [mA] OFF mode supply current vs.Supply voltage VFB=0V,VVF=0V,VCS=0V,VIS=0V 8 6 5 4 3 2 1 0 400 350 300 250 200 150 100 50 0 0 5 10 15 20 25 Supply voltage VCC [V] 30 35 40 8 Latch mode supply current vs.Supply voltage VFB=0V,VVF=0V,CS=OPEN,VIS=0V 10 11 12 13 14 15 Supply voltage VCC [V] 16 17 18 Latch mode supply current vs.Supply voltage VFB=0V,VVF=0V,CS=OPEN,VIS=0V 500 Latch mode supply current IccLAT [uA] 8 Latch mode supply current ICCLAT [mA] 9 7 6 5 4 3 2 1 0 450 400 350 300 250 200 150 100 50 0 0 5 10 15 20 25 Supply voltage VCC [V] 30 35 40 8 9 10 11 12 13 14 15 Supply voltage VCC [V] 16 17 18 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 15 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 9. Description of each circuit (1)Oscillator A desired oscillation frequency can be set by the value of the resistor connected to the RT pin (Fig.1 recommended value is 100 kHz to 300 kHz). The built-in capacitor voltage oscillates between about 3V and 1V, with almost the same charging and discharging gradients (Fig.2). The oscillator waveform cannot be observed from the outside because the oscillator output is not pinned out. The oscillator output is connected to a PWM comparator. Rt=Small OSC 1 Rt=Large 3V RT Rt 1V ▽ GND Fig.1 Fig.2 This IC has the function that reducing the power consumption by decreasing frequency at light load. It according to the value of the FB pin voltage at light load (Fig.3). When the FB pin voltage is 1V (typ.), the switching frequency decreases to about 30% down of the set frequency. When at the overload, it corrects current limiting by decreasing frequency. The minimum switching frequency is about 10% down of the set frequency. Extending only the OFF period (at light load) 3V Dmax=FA5604:46% FA5605/06:70% ON OFF 1V OFF Fig.3 Difference Output voltage Vout Fosc As shown in Fig.4 (Fosc-VFB characteristics graph), there is a little difference at the point before the frequency is reduced. Check that this is not a problem for actual use. Because this IC adopts the frequency reduction method in which only the off period is extended, if the frequency is reduced at overload, the ON duty is also reduced, and therefore the output voltage is reduced. Consequently, the load current is reduced at the point in which it enters the drooping characteristics at overload (Fig 5). Volpon VthFBS The current is changed by the changed frequency. Output current Iout VFB Fig.5 Fig.4 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 16 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (2)PWM comparator 1 is Fig.6 shows the PWM comparator timing chart. The PWM comparator has three inputs. Oscillator output ○ 2 and FB pin voltage ○ 3 . The lower of two inputs ○ 2 and ○ 3 has priority and compared with CS pin voltage ○ 1 . While the voltage is lower than the oscillator output, the PWM comparator compared with oscillator output ○ output is high. While the voltage is higher than the oscillator output, the PWM comparator output is low. The OUT pin of the IC is controlled so that it is H at the bottom of triangular wave oscillation waveforms (Output MOSFET is ON) and L when the PWM comparator output is set to H (Output MOSFET is OFF). 2 controls soft start operation. The output pulse then begins to widen When the IC is started up, CS pin voltage ○ gradually. During normal operation, the output pulse width is determined within the maximum duty cycle 3 , to stabilize the output voltage. (FA5604:46%, FA5605/06:70%) set by FB pin voltage ○ (3.8V) ③FB pin voltage ③FB pin voltage ②CS pin voltage ①Oscillator output PWM ①Oscilator output ②CS pin voltage PWM comparator output OUT pin voltage Fig.6 (3)CS pin circuit The CS pin connects to the capacitor Ccs. The CS pin voltage varies depending on the charging voltage of this capacitor Ccs (Fig.7). When the power is turned on, the constant current source (10A) begins to charge capacitor Ccs. Because of that, the CS terminal voltage gradually increases as shown in Fig.6.The CS pin voltage is connected to the PWM comparator, which is characterized to make output based on the lowest of input voltages. The device enters soft-start mode while the CS pin voltage is between 1.0V and 3.0V. During normal operation, the CS pin voltage is clamped at 3.8V by internal zener diode. If the output voltage drops due to an overload and the VF pin voltage become 3V or less, the clamp voltage 3.8V is canceled and the CS pin voltage rises. The CS pin voltage is oscillate between 3.8V and 5.7V, and determined the time ratio of OLP hiccup. Moreover, the CS pin is connected to latch comparator. If the CS pin voltage rises to 7.3V (50sec) or more, comparator toggles to turn off, thereby shutting the output down. Since the CS pin is also connected to ON/OFF comparator, this circuit can be turned off to shut the output down by dropping the CS pin voltage below 0.60V. In this way, the CS pin can be used for soft-start, overload output shutdown, external latch, ON/OFF control by varying the voltage (Fig.8). Ccs ▽ CS VCC 8 OCP timer ON/OFF VF 7 0.75 / 0.60V OCP ▽ 10uA 3.8 3.8V PWM OUT OSC Hiccup (VVF＜3V) VCS(V) 7.3V ▽ ▽ Overvoltage (Latch) 7.3 5.7 Latch FB 2 15 6 3.8V Clamp (VVF＞3V) 3.0 1.0 0.75/0.60 0 Overload Soft start 1 RT OFF Mode ｔ Fig.8 Fig.7 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 17 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 Further details on the above four major functions of the CS pin are given below. (i)Soft start function Fig.9 shows the soft start operation timing chart. The CS pin is connected to capacitor Ccs. When the power is turned on, the constant current source (10A) begins to charge the capacitor. As shown in the timing chart, the CS pin voltage rises slowly. The CS pin is connected to the IC internal PWM comparator, and then the comparator output pulse slowly widens to cause a soft start as shown in the timing chart. After the soft start, the CS pin voltage is clamped at 3.8V by internal zener diode. FB pin voltage Oscillator output CS pin voltage OUT pin output Fig.9 (ii)Overload shutdown function Fig. 10 shows the timing chart of the CS terminal voltage (VCS) under overload condition. To achieve intermittent operation at overvoltage, apply a voltage proportional to the output voltage to VF terminal. If the output voltage is reduced by overvoltage or the like, the VF terminal voltage is reduced. If the VF terminal voltage is 3 V or more, the CS terminal voltage is clamped at 3.8 V and perform an output drooping operation. Subsequently, when the output voltage is reduced due to overload, short circuit, or the like, and the VF terminal voltage becomes less than 3 V, the CS terminal voltage oscillates between 3.8 V and 5.7 V. Intermittent operations are performed at switch-on during the count period of 1 to 64 and at switch-off during the count period of 65 to 512 (switching period ratio: 64/448 = 1 : 7) at FA5604/06, and at switch-on during the count period of 1 to 64 and at switch-off during the count period of 65 to 1024 (switching period ratio: 64/960 = 1 : 15) at FA5605. The intermittent function is achieved by three terminals: CS, FB, and VF terminals. For the detailed description, see item (6) below. VCS VVF＜3V 5.7V 1 2 64 65 1 3.8V SS 1024 (512) 3V 1V ON/OFF 2 Type Switching ON Switching OFF ON:OFF FA5604 FA5606 0～64 65～512 1:7 FA5605 0～64 65～1024 1 : 15 VVF＞3V(3.8V Clamp) Switching ON Switching OFF Switching ON Fig.10 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 18 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (iii)External latch function When the CS pin voltage exceeds 7.3V (50sec), the IC is stopped the switching. If the VCC voltage reduced to 9.7V (typ.) (ON threshold voltage of UVLO) or less, the latch hold mode can be released. After the latch hold mode, the CS pin voltage becomes 7.3V or less is maintained to this mode. However, it is necessary to keep supplying the consumption current 190A (VCC=14V) from input Vin through the startup resistor. When the current supplied from Vin is less than the consumption current of IC, VCC reduced to the UVLO voltage and the latch hold mode cannot be maintained. During normal operation, the CS pin voltage is clamped at 3.8V by internal zener diode. The VF pin is input to the voltage proportional to the output voltage In normal operation, the CS pin voltage is clamped at 3.8V by internal zener diode with maximum sink current 100A (max.). Therefore, to raise the CS pin voltage to 7.3V or more, 200A or a higher current needs to be supplied from the optocoupler. Set the current input to the CS pin to 2 mA or less. (iv)ON/OFF function The IC can be turned ON/OFF control via an external signal applied to the CS pin. Fig.11 shows the ON/OFF control circuit, and Fig.12 is a timing chart. The IC is turned off when the CS pin voltage is externally made to drop below 0.60V. The output enters Low voltage state. Required IC current consumption during shutdown is 185A (Vcc=10.5V), and this current must be supplied through the start up resistor. If the supplied current from Vin is lower than the current consumption, Vcc is reduced to the UVLO voltage and the turned off state for CS pin cannot be maintained. In case of turning on operation, open the CS pin and the CS pin voltage exceeds 1.0V. So the power supply begins operation with soft-start. ON/OFF Ccs ▽ ▽ CS VCC 8 OCP timer ON/OFF VF 7 0.75 / 0.60V ▽ OCP (3.8V) CS pin voltage 6 FB pin voltage 10uA OSC output Latch ON/OFF comparator (0.75/0.60V) 7.3V ▽ H 3.8V FB 2 ▽ OUT pin voltage L PWM OUT ON Mode OSC OFF Mode 1 Fig.12 RT Fig.11 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 19 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (4)Overcurrent limiting circuit This circuit detects the peak value of every drain current pulse (pulse by pulse method) of the main switching MOSFET to limit the overcurrent, and the detection threshold voltage is -0.17V with respect to the ground level. Fig. 13 shows overcurrent limiting circuit, and Fig.14 is the overcurrent timing chart. The drain current of the MOSFET is converted to voltage by resistor Rs and fed to the IS pin of the IC. If the detection voltage becomes -0.17V or less, the O.C.P comparator output is high, and the RS-FF output QB to Low. The OUT of this IC becomes L level at the moment, the MOSFET is turned off to shut off the current. The flip-flop output is reset on the next cycle to turn on the output again. This operation is repeated to limit the overcurrent. If the overcurrent limiting circuit malfunctions due to noise, place an RC filter between the IS pin and MOSFET as shown in Fig. 13. (See item 6 in “Design advice”) OSC output OUT OSC output -0.17V ▽ IS(-) O.C.P. OUT pin voltage R QB S F.F 3 L Rs 4 IS pin voltage OCP comparator (-0.17V) ▼ PGND GND C ▽ R H Fig.13 Fig.14 Over Over Current Current detection detection (5)Overload protection circuit (switching frequency control by VF pin) The voltage proportional to the output voltage is input the VF pin. If the output voltage drops due to an overload and so on, the FB pin voltage rises and the VF pin voltage decreases. When the FB pin voltage exceeds 3.5V, IC is operating the OLP mode. The VF pin voltage becomes 4.2V or less, the oscillatory frequency decreases according to the voltage value. In adds to overcurrent limiting (preceding clause 4), overload protect by decreasing the oscillatory frequency (See item 5 in “Design advice”) To a voltage proportional to the output voltage, apply the OUT terminal voltage smoothed in the case of the forward circuit, or apply the VCC voltage in the case of the flyback circuit (see Fig. 15). 6 OUT FA5604 VF 5 VCC FA5605/06 7 VF R4 C6 7 R4 C6 Forward circuit R6 Flyback circuit Fig.15 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 20 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (6)Overload protection circuit The IC contains an overload protection circuit (operation that switching turned ON/OFF in fixed time ratio). Fig.16 shows a timing chart at overload. During normal operation, the CS pin voltage is clamped at 3.8V by internal zener diode. The VF pin is input to the voltage proportional to the output voltage. If the output voltage drops due to an overload and so on, the FB pin voltage rises to raise the output voltage. If the FB pin voltage exceeds 3.5V, the IC toggles to overload protection (OLP) mode. The VF pin voltage decreases at the same time as output voltage. If the VF pin voltage reduced to 4.2V or less, switching frequency control is began at overload. Moreover, if the VF pin voltage becomes 3.0V or less, the clamp voltage is canceled and the capacitor Ccs, which is connected the CS pin, is charged by constant current source (10A). If the CS pin voltage rises to 5.8V or more, it toggles to discharge mode, and the capacitor is discharged by constant current source (10A). If the CS pin voltage reduced to 3.9V or less again, it toggles to charge mode, and the capacitor is charged. The CS terminal performs an oscillation operation between 3.8 V and 5.7 V by repeating the above operation. The intermittent operations are performed by counting the oscillation waveforms inside the IC and by making a setting so that the count period of 1 to 64 is the switching operation period and the count period of 65 to 512 (FA5604/06) or 65 to 1024 (FA5605) is the switching shutdown period (switching-on period: switching-off period: 64:448 = 1:7 or 64:960 = 1:15). The operation frequency during the intermittent operation is under the condition in which the frequency is reduced. OLP Mode Switching ON A B Switching OFF Switching ON C Switching OFF C OUT 3.5V FB VF 4.2V 3.0V 5.7V CS 3.8V A : Normal operation B : OLP operation (frequency contorol) C : OLP operation (frequency contorol + hiccup) Fig.16 (7)Undervoltage lockout circuit (U.V.L.O) The IC incorporates a circuit that prevents the IC from malfunctioning when the supply voltage drops. When the supply voltage is raised from 0V, the IC starts operation with VCC=17.5V (typ.). If the supply voltage drops, the output is shut down when VCC =9.7V (typ.). When the undervoltage lookout circuit operates, the output of the the OUT and CS pins go low to reset the IC. (8)Output circuit The IC contains a push-pull output stage and can directly drive the MOSFET. The absolute maximum rating of OUT pin peak current is +1.0A/-0.5A. But when using in actual circuit, the output peak current depends on the characteristics of the MOSFET, the resistance between the OUT pin and the MOSFET, supply voltage, temperature conditions. The output current causes loss of the output stage. The total loss caused by the operating current and the output current should be within the ratings in actual circuit. (See item 11 in “Design advice”) If the circuit turned off by undervoltage lockout circuit, the output of OUT pin become low level and the MOSFET is shut down. Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 21 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 10. Design advice (1)Deciding the startup circuit The connection methods of the startup circuit are as follows: connecting the starting resistor R1 before rectification (AC line) (Fig. 17); connecting the starting resistor R1 after rectification (DC line) (Fig. 18). When connecting the starting resistor before rectification, if the latch operates, a current applied to the IC from the starting resistor is stopped by stopping the AC input, and the latch can be reset in a significantly short time. On the other hand, if connecting the starting resistor after rectification, because a current is applied to the IC from the smoothing capacitor C1 of the main circuit through the starting resistor even if the AC input is stopped, it takes time to reset the latch. DB T1 DB C1 AC INPUT T1 C1 AC INPUT ▼ ▼ R1 VCC D1 R1 C2 VCC 6 ▽ FA5604/05/06 OUT C2 6 ▽ MOSFET 5 D1 FA5604/05/06 MOSFET 5 OUT Rs ▼ Rs ▼ Fig.17 Fig.18 If it is necessary to set the startup and shutdown voltages, connect the resistor R2 between the VCC and the GND as shown in Fig. 19. When connecting only the starting resistor R1, if setting a relatively large value for the starting resistor R1, the latch release voltage is more than the starting voltage. Under this condition, if the input voltage is reduced for some reason when the latch is stopped, release of the latch and startup may be performed repeatedly. It is recommended to insert the resistor R2 between the VCC and the GND in order to avoid this phenomenon. V1 R1 VCC C2 6 FA5604/05/06 GND D1 R2 ▽ 4 ▽ Fig.19 The following are the points for setting the starting resistance. Because the consumption current of the IC is low due to adoption of the CMOS process, it is possible to set a large value for the starting resistance. When determining the value of the starting resistance, the following three conditions shall be satisfied: (a) Start the IC when turning on the power. (b) Supply the IC consumption current at latch operation to maintain the latch condition. (c) Supply the IC consumption current during off-state of the on-off function to maintain the off-state. Note that these are the minimum conditions for using this IC and it is necessary to determine the value considering the starting time required for the setting. Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 22 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (1-1)If the startup/shutdown voltages are not set If the startup/shutdown voltages are not set, connect only the starting resistor R1. At this time, the starting resistor R1 shall satisfy the following three relational expressions. Set a relatively small value for R1 considering the temperature characteristics and the like. (a) To supply 35 A (max) of the startup current at 19.5 V (max) of the on threshold voltage of UVLO: (Condition for startup) R1 V 1 19.5 ·········· (1) 0.035 (b) To supply 230 A (max) of the IC consumption current (VCC = 10.5 V) during the latch operation: (Condition for the latch) R1 V 1 10.5 ········· (2) 0.23 (c) To supply 250 A (max) of the IC consumption current (VCC = 10.5 V) during off-state of the on-off function: (Condition for on-off state) R1 V 1 10.5 ······ (3) 0.25 Where, R1: starting resistance [kΩ] If connecting the starting resistor before rectification (AC line), VIN is: V1 If connecting the starting resistor after rectification (DC line), VIN is: V 1 2 Vac 2 Vac (Vac = an effective value of the AC input voltage) Example: On the condition of startup at Vac = 80 V (VIN = 113 V) or less when connecting the starting resistor after rectification Condition for startup: R1 113 19.5 R1 2.7 M 0.035 Condition for maintaining the latch: R1 113 10.5 R1 446 k 0.23 Condition for maintaining the off-state: R1 113 10.5 R1 410 k 0.25 Therefore, 400kΩ or less of the starting resistance is required. In the case of R1 = 200 kΩ: The approximate starting voltage is: VIN 0.035 200 19.5 26.5V The approximate latch release voltage is: VIN 0.23 200 10.5 56.5V As shown above, the latch release voltage is more than the starting voltage. If the input voltage is reduced for some reason when the latch is stopped, startup and release of the latch are performed repeatedly. If the latch release voltage is less than the starting voltage under the above condition, the starting resistance is about 40 kΩ or less and a large loss results. If neither the latch operation nor the on-off function is not used, it is enough to satisfy only the formula (1) Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 23 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (1-2)If the startup/shutdown voltages are set If the startup/shutdown voltages are set, connect the resistor R2 between the starting resistor R1 and the VCC-GND as shown in Fig. 19. At this time, the starting resistor R1 shall satisfy the following three relational expressions. Set a relatively small value for R1 considering the temperature characteristics and the like. (a) To supply 35 A (max) of the startup current at 19.5 V (max) of the on threshold voltage of UVLO: V 1 19.5 R1 (Condition for startup) 0.035 ····· (4) 19.5 R2 (b) To supply 230 A (max) of the IC consumption current (VCC = 10.5 V) during the latch operation: (Condition for the latch) R1 V 1 10.5 ········ (5) 10.5 0.23 R2 (c) To supply 250 A (max) of the IC consumption current (VCC = 10.5 V) during off-state of the on-off function: (Condition for on-off state) R1 V 1 10.5 10.5 0.25 R2 ····· (6) Where, R1: starting resistance [kΩ] If connecting the starting resistor before rectification (AC line), VIN is: If connecting the starting resistor after rectification (DC line), VIN is: V1 2 Vac V 1 2 Vac (Vac = an effective value of the AC input voltage) Example: On the condition that R2 = 22 kΩ and the startup at Vac = 80 V (VIN = 113 V) or less when connecting the starting resistor after rectification 113 19.5 Condition for startup: R1 0.035 19.5 22 Condition for maintaining the latch: R1 R1 101k 113 10.5 R1 145k 10.5 0.23 22 Condition for maintaining the off-state: R1 113 10.5 10.5 0.25 22 R1 141k Therefore, 101kΩ or less of the starting resistance is required. In the case of R1 = 100 kΩ: The approximate starting voltage is: VIN R1 0.035 The approximate latch release voltage is: 19.5 19.5 19.5 100 0.035 19.5 112V R2 22 VIN R1 0.23 10.5 10.5 10.5 100 0.23 22 10.5 81.2V R2 As shown above, the condition that the latch release voltage is less than the starting voltage is satisfied. If neither the latch operation nor the on-off function is not used, it is enough to satisfy only the formula (4). Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 24 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (2)Determining the VCC capacitor value To properly start the power supply, a certain value is required for the value is required for the capacitor connected to the VCC pin. Fig.20 shows the VCC voltage at startup when a proper value is given to the capacitor. When the input power is turned on, the capacitor connected to the VCC pin is charged via the startup resistor and the voltage increases. The IC is then in standby start and almost no current is consumed. (ICC < 2A) Thereafter, VCC reaches the OFF threshold voltage of UVLO (VCCON) and the IC begins operation. When the IC begins operation to make output, the IC operates based on the voltage from the auxiliary winding. When the IC is just starting up, however, it takes time for the voltage from the auxiliary winding to rise enough, and VCC drops during this period. Determine the VCC capacitor value so that VCC will not drop down to the ON threshold voltage of UVLO (VCCOFF) during this period. When the VCC capacitor is too small, VCC will drop down to the ON threshold voltage of UVLO before the auxiliary winding to rise. It becomes impossible to startup the power supply as VCC repeats the top and bottom between the VCCOFF and VCCON in this case (Fig.21). VCC VCC voltage at startup With a adequate capacitor VCC ON VCC must not Drop to VCCOFF VCC VCC voltage at startup With a inadequate capacitor VCC ON VCC OFF VCC OFF Auxiliary Winding voltage time time Fig.20 Fig.21 (3)The startup period In the case of the circuit in Fig. 22 (R1: starting resistance), the starting time Tst [ms] until the IC is started after the power is turned on is determined by the following approximate formula: Tst C 2 R1 ln 1 17.5 V1 ···················(7) In the case of the circuit in Fig. 23, the starting time Tst [ms] until the IC is started after the power is turned on is determined by the following approximate equation: Tst C 2 R 0 ln 1 Vvcc 17.5 ···················(8) R0 R1 R 2 R1 R 2 Vvcc R2 V1 R1 R 2 2 Vac (If the starting resistor is before rectification) (9) V1 2 Vac (If the starting resistor is afte rectification) (10) Where, R1: starting resistance [kΩ], C2: the capacitor between the VCC and the GND [uF], Vac: an effective value of the AC input voltage [V] R1 R1 VCC VCC C2 6 FA5604/05/05 D1 D1 C2 6 FA5604/05/06 ▽ R2 ▽ Fig.23 Fig.22 The above formulas are intended for approximate calculation of the starting time. Please note that the calculation results may not actually be the same as measured values because of the startup current or the like. Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 25 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 To shorten the startup period, the capacitor C2 or resistor R1 should be decreased. But in some case, such as when the load current of the power supply is changed rapidly, you may want to prolong the hold time of the VCC voltage over the VCC the OFF threshold. In this case, the capacitor C2 cannot be decreased and the resistor R1 should be decreased. But loss of the resistor R1 increases. In such case, the circuit shown in Fig.24 and Fig.25 is effective to shorten startup period without increasing the loss of the resistor R1. The capacitor C2 is decreased to shorten the startup period and, after the IC startup, VCC voltage supplied from C3 to prolong the hold time of the VCC voltage. The startup period of this circuit also is approximately given by the expression in (7) and (8). R1 VCC D1 C2 6 R1 D2 VCC C3 ▽ FA5604/05/06 C2 6 FA5604/05/06 Fig.24 D1 D2 C3 R2 ▽ Fig.25 (4)Feedback pin circuit Fig.26 shows an example of connection in which a feedback signal is input to the FB pin. If this circuit causes power supply instability, connect R3 and C4 as shown in Fig.26 to decrease the frequency gain. Set R3 between several 10Ω to several kΩ and C4 between several 1000pF to 1F. In noise is applied to the FB pin, the output pulses may be lacked or disturbed. In this case, connect a capacitor C5 as shown in Fig.26 to suppress the noise applied to the FB pin. Set the capacitor of C5 less than 1/10 of capacitance of C4 and connect C5 as near the IC as possible. 5 FA5604/05/06 GND 4 2 ▽ FB Rs ▼ C5 R3 ▽ OUT C4 PC1 ▽ Fig.26 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 26 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (5)The correct overcurrent limiting protection The output power at overvoltage is limited by the overcurrent limiting function of the IC. However, in general, the characteristics that the voltage is reduced while the current is increased is shown as indicated in “(1) Not corrected” in Fig. 27. Output voltage For this IC, as shown in Fig. 28, it is possible to correct the overcurrent limit in order to obtain the output characteristics like (2) by smoothing the OUT terminal voltage by R4 and C6 and apply it to the VF terminal for the forward circuit, or by applying the VCC voltage to the VF terminal for the flyback circuit. In addition, it is possible to obtain the output characteristics like (3) by adding R5 and D3 to correct it 6 OUT (1)Without correction FA5604 5 VF (3)With correction (+R5,D3) 7 VCC FA5605/06 D3 R4 VF 7 R4 R5 (2)With correction C6 R6 C6 Output current Fig.27 Fig.28 Note that if correcting the drooping characteristics at the power supply for which a hiccup operation is used, the power supply may not start because a hiccup operation is started at the startup depending on the CS terminal capacity (soft start) and the drooping correction constant (Fig. 29). If the power supply starts normally If the power supply cannot starts normally Fig.29 Because this IC adopts the frequency reduction method in which only the off period is extended, if the frequency is reduced at overload, the ON duty is also reduced, and therefore the output voltage is reduced. Consequently, the load current is reduced at the point in which it enters the drooping characteristics at overload (see Fig. 5 on p. 16). Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 27 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (6)Preventing malfunction caused by noise Noise applied to each pin may cause malfunction of the IC. If noise causes malfunction, see the notes summarized below and confirm in actual circuit to prevent malfunction. 1 The IS pin for overcurrent limiting function detects the MOSFET current converted to the voltage. The parasitic ○ capacitor and inductor of the MOSFET, transformer, wiring, etc. cause a noise in switching operation. If this switching noise causes a malfunction of overcurrent limiting function, insert the RC filter into IS pin as shown in Fig.13. Connect this capacitor as near the IC as possible to suppress noise effectively. 2 If noise is applied to the FB pin, the output pulses may be disturbed. In this case, see .item (4) in Design advice. ○ 3 Relatively large noise may occur at the VCC pin because large current flows from VCC pin to drive the MOSFET. ○ Then noise may cause malfunction of the IC. In addition, the IC may stop operation when VCC voltage drops below the off threshold voltage by noise. Mind that capacitance and characteristics of the capacitor connected between VCC and GND pin not to allow the large noise at the VCC pin. To prevent malfunction, connect several 10F electrolytic capacitor and about 0.1F ceramic capacitor as near the IC as possible to suppress noise effective (Connect the ceramic capacitor nearer the IC than the electrolytic capacitor by priority). 4 RT terminal may cause a malfunction. It is recommended to install a capacitor of about 100 pF between the RT ○ terminal and the GND. The line regulation may also be improved by this measure. (7)Preventing malfunction caused by negative voltage applied ton a pin When large negative voltage is applied to each IC pin, a parasitic element in the IC may operate and cause malfunction. Be careful not allow the voltage applied to each pin to drop below -0.3V. Especially for the OUT pin, voltage oscillation caused after the MOSFET turns off may be applied to the OUT pin via the parasitic capacitance of the MOSFET, causing the negative voltage to be applied to the OUT pin. If the voltage falls below -0.3V, add a Schottky diode between the OUT pin and the ground as shown in Fig.30. The forward voltage of the Schottky diode can suppress the voltage applied to the OUT pin. Use the low forward voltage of the Schottky diode. Similarly, be careful not to cause the voltages at other pins fall below -0.3V. OUT FA5604/05/06 GND 5 4 SBD ▽ Fig.30 (8)Gate circuit configuration To adjust switching speeds or prevent oscillation at gate terminals, resistors are normally inserted between the power MOSFET gate terminal to be driven and the OUT pin of the IC. You may prefer to decide on the drive current independently, to turn the MOSFET on and off. If so, connect the MOSFET gate terminal to the OUT pin of the IC as shown in Fig.31. In this circuit, Rg1 and Rg2 restrict the current when the MOSFET is turned on, and only Rg1 restricts the current when it is turned off. Rg1 Rg2 FA5604/05/06 5 OUT Fig.31 Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 28 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (9)External latch (overvoltage protection on secondary side) Fig.32 shows the overvoltage shutdown circuit based on the signal from the secondary side. The optocoupler output transistor is connected between the CS and VCC pins. When the output voltage is put in the overvoltage state, the optocoupler output transistor goes on to raise the CS pin voltage via resistor R2. When the CS pin voltage exceeds the reference voltage (7.3V) of internal comparator, the IC enters the OFF latch mode and shuts the output down. The IC consumes current 190A (typ.) (VCC=14V) in latch mode. This circuit must be supplied via startup resistor R1.The overvoltage protection circuit can be reset by lowering the supply voltage VCC to below 9.7V or forcing the CS pin voltage below 7.3V. In normal operation, the CS pin voltage is clamped by the 3.8V zener diode with maximum sink current 100A (max.). Therefore, to raise the CS pin voltage to 7.3V or more, 200A or a higher current needs to be supplied from the optocoupler. Set the current input to the CS pin to 2mA or less. Vin Vout C1 R1 ▼ PGND R2 PC Cs ▽ VCC C2 6 ▽ CS 8 FA5604 4 GND ▽ Fig.32 (10)Not used the overload shutdown function As explained by pre-block (6), the clamp CS pin voltage (3.8V) is canceled at overload (VFB>3.5V, VVF<3V), and the CS pin voltage oscillates and counts between 3.8V and 5.7V. The overload shutdown function is prevented by clamping the CS pin voltage on the outside. Fig.33 shows the CS pin voltage is clamped by internal zener diode ZD. In this case, because of zener current Iz is 10 A, please set the zener voltage to between 3.8V to 5.7V. VCS=Vz=3.8V to 5.7V ····································· (11) Moreover, when the overvoltage protection function is made effective, you set external pull-up to exceed the latch threshold voltage 7.3V by using the zener diode ZD and the resistor R (Fig.28). in that case, the zener voltage VZ should consider the voltage (R×Iz) of the resistor R. VCS=Vz+(R×Iz)=3.8V to 5.7V ····················· (12) When the IC operate of overvoltage protection, to raise the CS pin voltage to 7.3V or more, 200A to 2mA current needs to be supplied. In this case, because the zener current Izovp (1mA etc) differs from Iz=10A, the zener voltage Vzovp differs from Vz. VCS=Vzovp+(R×Izovp)≧7.3V ····················· (13) Because a method in which the VF pin is not reduced to less than 3 V interferes with reduction of the frequency, it is recommended to use a method in which the CS pin is clamped by the Zener diode. R2 Cs ▽ VCC C2 6 ▽ PC CS ZD Vz 8 FA5604/05/06 4 Cs ▽ GND ▽ ▽ VCC C2 6 ▽ CS R 8 ZD Vz FA5604/05/06 Fig.33 4 Fig.34 ▽ GND ▽ Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 29 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 (11)Loss calculation IC loss must be confirmed to use the IC within the ratings. Since it is hard to directly measure IC loss, some examples of calculating approximate IC loss are given below. (11-1) Calculation example 1 Suppose the supply voltage is VCC, IC current consumption is ICC, the total gate charge of the power MOSFET is Qg, and the switching frequency is fosc. Total IC loss Pd can be calculated by: Pd ≈ VCC×(ICC+Qg×fosc) ·············· (14) This expression calculates an approximate value of Pd, which is normally a little larger than the actual loss. Since various conditions such as temperature characteristics apply, thoroughly verify the appropriateness of the calculation under all applicable conditions. Example: When VCC=18V, ICC=3mA (max.) is obtained from the specifications. Suppose Qg=80nC and fosc=190kHz. Pd ≈ 18V× (3mA+80nC×190kHz) ≈ 328mW (11-2) Calculation example 2 The IC loss consists of the loss caused by operation of the control circuit and the loss caused at the output circuit to drive the power MOSFET. 1 Loss at the control circuit ○ The loss caused by operation of the IC control circuit is calculated by the supply voltage and IC current consumption. When the supply voltage is VCC and IC current consumption is ICC, loss Pcon at the control circuit is: Pcon=VCC×ICC ················· (15) Example: When VCC=18V, ICC=1.6mA (max.) is obtained from the specifications. The typical IC loss is given by: Pcon=18V × 1.6mA ≈ 29mW 2 Loss at the output circuit ○ The output circuit of the IC is a MOSFET push-pull circuit. When the ON resistances of MOSFETs making up the output circuit are Ron and Roff, the resistances can be determined as shown below based on VCC=18V obtained from the output characteristics shown in the specifications: Ron=15Ω (typ), Roff=7Ω (typ) When the total gate charge of the power MOSFET is Qg, the switching frequency is fosc, the supply voltage is VCC and gate resistance is Rg, the loss (Pdr) caused at the IC output circuit is given by: Ron 1 Roff Pdr VCC Qg fosc 2 Rg Ron Rg Roff ·······················(16) When gate resistance differs between ON and OFF as shown in Fig.31, the loss is given by: 1 Ron Roff Pdr VCC Qg fosc 2 Rg 1 Rg 2 Ron Rg 1 Roff ···············(17) Example: When VCC=18V, Qg=80nC, fosc=190 kHz and Rg=10, the typical IC loss is given by: Pdr 1 7 15 18V 80nC 190kHz 2 10 15 10 7 =138mW Total loss The total loss (Pd) of the IC is the sum of the control circuit loss (Pcon) and the output circuit loss (Pdr) calculated previously: Pd=Pop+Pdr ················ (18) Example: 1 and ○ 2 above are: The standard IC loss under the conditions used in ○ Pd=Pcon+Pdr=29mW+138mW=167mW Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 30 http://www.fujielectric.co.jp/products/semiconductor/ FA5604/5605/5606 11 .Application circuit Forward Input ; 85Vac to 132Vac Output ; 24Vdc,6.3A (150W) Note: This application circuit example is a reference for explaining the typical usage of this IC and does not guarantee the operations and characteristics. Fuji Electric Co., Ltd. AN-033E Rev.1.2 April-2011 31 http://www.fujielectric.co.jp/products/semiconductor/