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PD - 9.1236
IRLI630G
HEXFET® Power MOSFET
Isolated Package
High Voltage Isolation = 2.5KVRMS
Sink to Lead Creepage Dist. 4.8mm
Logic-Level Gate Drive
RDS(ON) Specified at VGS = 4V & 5V
Fast Switching
Ease of paralleling
VDSS = 200V
RDS(on) = 0.40Ω
ID = 6.2A
Description
Third Generation HEXFETs from International Rectifier provide the designer
with the best combination of fast switching, ruggedized device design, low onresistance and cost-effectiveness.
The TO-220 Fullpak eliminates the need for additional insulating hardware in
commercial-industrial applications. The moulding compound used provides a
high isolation capability and a low thermal resistance between the tab and external
heatsink. This isolation is equivalent to using a 100 micron mica barrier with
standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip
or by a single screw fixing.
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 5.0V
Continuous Drain Current, VGS @ 5.0V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
6.2
3.9
25
35
0.28
±10
125
6.2
3.5
5.0
-55 to + 150
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient
To Order
Min.
Typ.
Max.
Units
––––
––––
––––
––––
3.6
65
°C/W
Revision 0
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IRLI630G
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(ON)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
LS
Internal Source Inductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
IGSS
Min.
200
–––
–––
–––
1.0
4.8
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.27
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
8.0
57
38
33
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.40
VGS = 5.0V, ID = 3.7A
Ω
0.50
VGS = 4.0V, ID = 3.1A
2.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 50V, ID = 5.4A
25
VDS = 200V, VGS = 0V
µA
250
VDS = 160V, VGS = 0V, TJ = 125°C
100
VGS = 10V
nA
-100
VGS = -10V
40
ID = 9.0A
5.5
nC VDS = 160V
24
VGS = 10V, See Fig. 6 and 13
–––
VDD = 100V
ns
–––
ID = 9.0A
–––
RG = 6.0Ω
–––
RD = 11Ω, See Fig. 10
Between lead,
––– 4.5 –––
6mm (0.25in.)
nH
from package
––– 7.5 –––
and center of die contact
––– 1100 –––
VGS = 0V
––– 220 –––
pF
VDS = 25V
––– 70 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
–––
–––
6.2
–––
–––
25
–––
–––
–––
–––
230
1.7
2.0
350
2.6
A
V
ns
µC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 6.2A, VGS = 0V
TJ = 25°C, IF = 9.0A
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
ISD ≤ 9.0A, di/dt ≤ 120A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 150°C
VDD = 25V, starting TJ = 25°C, L = 2.4mH
RG = 25Ω, IAS = 6.2A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
To Order
t=60s, ƒ=60Hz
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IRLI630G
100
100
VGS
7.50V
5.00V
4.00V
3.50V
3.00V
2.75V
2.50V
BOTTOM 2.25V
VGS
7.50V
5.00V
4.00V
3.50V
3.00V
2.75V
2.50V
BOTTOM 2.25V
TOP
I , Drain-to-Source Current (A)
D
I , Drain-to-Source Current (A)
D
TOP
10
1
2.25V
20µs PULSE WIDTH
Tc = 25°C
0.1
0.1
1
10
2.25V
1
20µs PULSE WIDTH
TC = 150°C
0.1
A
100
10
0.1
Fig 1. Typical Output Characteristics,
TC = 25oC
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
10
TJ = 150°C
1
TJ = 25°C
0.1
VDS = 50V
20µs PULSE WIDTH
3.0
3.5
4.0
4.5
100
A
Fig 2. Typical Output Characteristics,
TC = 150oC
100
2.5
10
VDS , Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
0.01
2.0
1
A
5.0
VGS , Gate-to-Source Voltage (V)
2.5
ID = 9.0A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 5.0V
0
20
40
60
TJ , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
To Order
A
80 100 120 140 160
Fig 4. Normalized On-Resistance
Vs. Temperature
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IRLI630G
10
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = Cds + C gd
VGS , Gate-to-Source Voltage (V)
C, Capacitance (pF)
2000
1500
Ciss
1000
Coss
500
Crss
A
0
1
10
I D = 9.0A
VDS = 160V
VDS = 100V
VDS = 40V
8
6
4
2
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
100
20
30
40
A
Q G , Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
10 0
OPERATION IN THIS AREA LIMITED
BY R DS(on)
ID , Drain Current (A)
ISD , Reverse Drain Current (A)
10
10
TJ = 150°C
TJ = 25°C
1
VGS = 0V
0.1
0
0.4
0.8
1.2
A
1.6
10
100µs
1ms
1
10ms
0.1
VSD , Source-to-Drain Voltage (V)
100ms
TC = 25°C
TJ = 150°C
Single Pulse
1
A
10
100
1000
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 8. Maximum Safe Operating Area
To Order
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IRLI630G
RD
VDS
VGS
7.0
D.U.T.
RG
VDD
ID, Drain Current (Amps)
6.0
5.0 V
5.0
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
4.0
Fig 10a. Switching Time Test Circuit
3.0
2.0
1.0
0.0
25
50
75
100
125
A
150
TC, Case Temperature (°C)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
Thermal Response (ZthJC )
10
1
D = 0.50
0.20
0.10
0.1
PDM
0.05
t
0.02
0.01
t
2
N o te s :
1 . D u ty fa c to r D = t / t
1 2
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001
1
2 . P e a k TJ = P D M x Z th J C + T C
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
To Order
A
10A
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5.0V
Fig 12a. Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
IRLI630G
300
ID
2.8A
3.9A
BOTTOM 6.2A
TOP
250
200
150
100
50
0
VDD = 50V
25
50
A
75
100
125
150
Starting TJ , Juntion Temperature (°C)
Fig 12b. Unclamped Inductive Waveforms
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
5.0V
Fig 13a. Basic Gate Charge Waveform
To Order
Fig 13b. Gate Charge Test Circuit
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IRLI630G
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
*
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
To Order
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IRLI630G
Package Outline
TO-220 Full-Pak
Part Marking Information
TO-220 Full-Pak
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY:
Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39) 1145
10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR
SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371
Data and specifications subject to change without notice.
To Order