LINER LTC6088HDHC-TRPBF Dual/quad 14mhz, rail-to-rail cmos amplifi er Datasheet

LTC6087/LTC6088
Dual/Quad 14MHz,
Rail-to-Rail CMOS Amplifiers
FEATURES
DESCRIPTION
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The LTC®6087/LTC6088 are dual/quad, low noise, low
offset, rail-to-rail input/output, unity-gain stable CMOS
operational amplifiers that feature 1pA of input bias current. A 14MHz gain bandwidth and 7.2V/μs slew rate,
combined with low noise (10nV/√Hz) and a low 0.75mV
offset, make the LTC6087/LTC6088 useful in a variety of
applications. The 1.1mA supply current and the shutdown
mode are ideal for signal processing applications which
demand performance with minimal power.
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Low Offset Voltage: 750μV Maximum
Low Offset Drift: 5μV/°C Maximum
Input Bias Current:
1pA (Typical at 25°C)
15pA (Typical at 85°C)
Rail-to-Rail Inputs and Outputs
Gain Bandwidth Product: 14MHz
CMRR: 70dB Minimum
PSRR: 93dB Minimum
Input Noise Voltage Density: 12nV/√Hz
Supply Current: 1.1mA per Amp
Shutdown Current: 2.3μA per Amp
2.7V to 5.5V Operation Voltage
Available in 8-Lead MSOP and 10-Lead DFN
Packages (LTC6087), 16-Lead SSOP and DFN
Packages (LTC6088)
The LTC6087/LTC6088 has an output stage which swings
within 30mV of either supply rail to maximize signal dynamic range in low supply applications. The input common
mode range includes the entire supply voltage. These op
amps are specified on power supply voltages of 3V and
5V from –40°C to 125°C.
The dual amplifier LTC6087 is available in 8-lead MSOP
and 10-lead DFN packages. The quad amplifier LTC6088
is available in 16-lead SSOP and DFN packages.
APPLICATIONS
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Portable Test Equipment
Medical Equipment
Audio
Data Acquisition
High Impedance Transducer Amplifier
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
TYPICAL APPLICATION
LTC6087 Input Bias Current
vs Temperature
Single Supply Shock/Vibration Sensor Amplifier
VS
VS
100k
+
100k
MURATA SHOCK
SENSOR
PKGS-00MX1
520pF, 0.57pC/g
www.murata.com
0.1μF 1/2 LTC6087
+
1/2 LTC6087
–
–
1k
1%
100M
100pF
100k
1%
VOUT
570mV/g
16Hz TO 10kHz
VS = 2.7V TO 5.5V
INPUT BIAS CURRENT (pA)
1000
VS = 5V
VCM = 2.5V
100
10
60878 TA01a
1
25
40
55
70
85 100
TEMPERATURE (°C)
115
130
60878 TA01b
60878fb
1
LTC6087/LTC6088
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V+ to V–) ...................................6V
Input Voltage...................................................... V– to V+
Input Current....................................................... ±10mA
SHDNA/SHDNB Voltage ..................................... V– to V+
Output Short-Circuit Duration (Note 2) ............ Indefinite
Operating Temperature Range (Note 3)
LTC6087C/LTC6088C ........................... –40°C to 85°C
LTC6087H/LTC6088H ......................... –40°C to 125°C
Specified Temperature Range (Note 4)
LTC6087C/LTC6088C ............................... 0°C to 70°C
LTC6087H/LTC6088H ......................... –40°C to 125°C
Junction Temperature ........................................... 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MS8, GN16 Only ............................................... 300°C
PIN CONFIGURATION
TOP VIEW
B
V+
OUTB
–INB
+INB
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 200°C/W
OUTA
1
–INA
2
+INA
3
V–
4
SHDNA
5
+INA
2
3
V+
4
+INB
5
–INB
6
OUTB
7
NC
8
–
+A
D
15 –IND
14 +IND
13
+
–B
+
C–
8 –INB
B
7 +INB
6 SHDNB
TOP VIEW
16 OUTD
+
–
–INA
1
9 OUTB
11
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 43°C/W
EXPOSED PAD (PIN 11) IS V–, MUST BE SOLDERED TO PCB
TOP VIEW
OUTA
10 V+
–
+A
V–
12 +INC
11 –INC
10 OUTC
9
NC
GN PACKAGE
16-LEAD PLASTIC SSOP NARROW
TJMAX = 150°C, θJA = 110°C/W
OUTA
1
16 OUTD
–INA
2
+INA
3
V+
4
+INB
5
–INB
6
OUTB
7
10 OUTC
NC
8
9
–
+A
+
–
–
+A
8
7
6
5
+
–
1
2
3
4
+
–
TOP VIEW
OUTA
–INA
+INA
V–
D
14 +IND
13 V–
17
+
–B
15 –IND
+
C–
12 +INC
11 –INC
NC
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 43°C/W
EXPOSED PAD (PIN 17) IS V–, MUST BE SOLDERED TO PCB
60878fb
2
LTC6087/LTC6088
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC6087CDD#PBF
LTC6087HDD#PBF
LTC6087CMS8#PBF
LTC6087HMS8#PBF
LTC6088CDHC#PBF
LTC6088HDHC#PBF
LTC6088CGN#PBF
LTC6088HGN#PBF
LTC6087CDD#TRPBF
LTC6087HDD#TRPBF
LTC6087CMS8#TRPBF
LTC6087HMS8#TRPBF
LTC6088CDHC#TRPBF
LTC6088HDHC#TRPBF
LTC6088CGN#TRPBF
LTC6088HGN#TRPBF
LCTX
LCTX
LTCTY
LTCTY
6088
6088
6088
6088H
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
8-Lead Plastic MSOP
8-Lead Plastic MSOP
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
16-Lead Plastic SSOP
16-Lead Plastic SSOP
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full specified
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted.
C SUFFIX
SYMBOL PARAMETER
MIN
LTC6087MS8, LTC6088GN
LTC6087DD, LTC6088DHC
LTC6087MS8, LTC6088GN
LTC6087DD, LTC6088DHC
l
l
ΔVOS/ΔT Input Offset Voltage Drift (Note 6)
LTC6087MS8, LTC6088GN
LTC6087DD, LTC6088DHC
l
l
IB
Guaranteed by 5V Test
VOS
IOS
en
in
Offset Voltage (Note 5)
CONDITIONS
Input Bias Current (Notes 5, 7)
Input Offset Current (Notes 5, 7)
CMRR
PSRR
VOUT
MAX
MIN
±330 ±750
±330 ±1100
±900
±1350
±2
±2
±5
±5
TYP
MAX
UNITS
±330 ±750
±330 ±1100
±1100
±1600
μV
μV
μV
μV
±2
±2
1
●
0.5
●
±5
±5
μV/°C
μV/°C
500
pA
pA
150
pA
pA
1
40
Guaranteed by 5V Test
0.5
30
Input Noise Voltage Density
f = 1kHz
f = 10kHz
12
10
12
10
nV/√Hz
nV/√Hz
Input Noise Voltage
0.1Hz to 10Hz
2.5
2.5
μVP-P
Input Noise Current Density (Note 8)
f = 1Hz
Input Capacitance
Differential Mode
Common Mode
f = 100kHz
Common Mode Rejection Ratio
0V ≤ VCM ≤ 3V
Power Supply Rejection Ratio
0.56
●
Input Common Mode Range
CIN
TYP
H SUFFIX
V–
0.56
V+
V–
2.7
4.2
VS = 2.7V to 5.5V
fA/√Hz
V+
V
2.7
4.2
pF
pF
64
63
80
64
61
80
●
dB
dB
93
90
115
93
85
115
●
dB
dB
Output Voltage, High (Referred to V+)
No Load
ISOURCE = 1mA
ISOURCE = 5mA
●
●
●
5
25
120
15
50
210
5
25
120
20
50
230
mV
mV
mV
Output Voltage, Low (Referred to V–)
No Load
ISINK = 1mA
ISINK = 5mA
●
●
●
5
25
120
25
50
210
5
25
120
30
60
240
mV
mV
mV
60878fb
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LTC6087/LTC6088
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full specified
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted.
C SUFFIX
SYMBOL PARAMETER
CONDITIONS
AVOL
Large-Signal Voltage Gain
RLOAD = 10k, 0.5V ≤ VOUT ≤ 2.5V
ISC
Output Short-Circuit Current
SR
Slew Rate
GBW
Gain Bandwidth Product (fTEST = 20kHz) RLOAD = 50k
MIN
TYP
●
500
300
●
25
21
Source and Sink
AV = 1
H SUFFIX
MAX
MIN
TYP
3000
500
30
3000
35
25
18
35
mA
mA
7.2
V/μs
14
MHz
MHz
7.2
●
10
9
14
10
8
MAX
UNITS
V/mV
V/mV
Φ0
Phase Margin
RL = 10k, CL = 45pF, AV = 1
45
45
Deg
tS
Settling Time 0.1%
VSTEP = 2V, AV = –1, RL = 1k
1
1
μs
IS
Supply Current (per Amplifier)
No Load
●
1.05
1.05
1.20
1.25
1.05
1.05
1.20
1.35
mA
mA
Shutdown, VSHDNx ≤ 0.8V
●
0.2
1
0.2
1
μA
Supply Voltage Range
Guaranteed by the PSRR Test
●
Channel Separation
fS = 10kHz
Shutdown Logic
SHDNx High
SHDNx Low
Shutdown Current (per Amplifier)
VS
2.7
5.5
2.7
–120
●
●
5.5
V
–120
2
dB
2
0.8
V
V
0.8
tON
Turn-On Time
VSHDNx = 0.8V to 2V
6
6
μs
tOFF
Turn-Off Time
VSHDNx = 2V to 0.8V
2
2
μs
Leakage of SHDN Pin
VSHDNx = 0V
●
0.1
0.5
0.1
0.5
μA
The l denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C.
Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted.
C SUFFIX
SYMBOL PARAMETER
VOS
Offset Voltage (Note 5)
ΔVOS/ΔT Input Offset Voltage Drift (Note 6)
IB
IOS
en
in
CONDITIONS
LTC6087MS8, LTC6088GN
LTC6087DD, LTC6088DHC
LTC6087MS8, LTC6088GN
LTC6087DD, LTC6088DHC
l
l
LTC6087MS8, LTC6088GN
LTC6087DD, LTC6088DHC
l
l
TYP
H SUFFIX
MAX
MIN
±330 ±750
±330 ±1100
±900
±1350
±2
±2
Input Bias Current (Notes 5, 7)
±5
±5
TYP
MAX
UNITS
±330 ±750
±330 ±1100
±1100
±1600
μV
μV
μV
μV
±2
±2
1
●
0.5
●
±5
±5
μV/°C
μV/°C
500
pA
pA
150
pA
pA
1
40
Input Offset Current (Notes 5, 7)
0.5
30
Input Noise Voltage Density
f = 1kHz
f = 10kHz
12
10
12
10
nV/√Hz
nV/√Hz
Input Noise Voltage
0.1Hz to 10Hz
2.5
2.5
μVP-P
Input Noise Current Density (Note 8)
f = 1Hz
Input Capacitance
Differential Mode
Common Mode
0.56
●
Input Common Mode Range
CIN
MIN
V–
0.56
V+
V–
fA/√Hz
V+
V
f = 100kHz
2.7
4.2
2.7
4.2
pF
pF
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LTC6087/LTC6088
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full specified
temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted.
C SUFFIX
H SUFFIX
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MIN
TYP
CMRR
0V ≤ VCM ≤ 5V
84
70
66
84
●
70
68
dB
dB
93
90
115
93
85
115
●
dB
dB
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
VS = 2.7V to 5.5V
MAX
MAX
UNITS
Output Voltage, High (Referred to V+)
No Load
ISOURCE = 1mA
ISOURCE = 5mA
●
●
●
5
20
110
15
50
190
5
20
110
20
50
210
mV
mV
mV
Output Voltage, Low (Referred to V–)
No Load
ISINK = 1mA
ISINK = 5mA
●
●
●
5
20
110
25
50
200
5
20
110
30
60
220
mV
mV
mV
AVOL
Large-Signal Voltage Gain
RLOAD = 10k, 0.5V ≤ VOUT ≤ 4.5V
ISC
Output Short-Circuit Current
SR
Slew Rate
GBW
Gain Bandwidth Product (fTEST = 20kHz) RLOAD = 50k
VOUT
1000
500
6000
1000
50
6000
●
28
25
45
28
22
45
●
mA
mA
7.2
V/μs
14
MHz
MHz
47
Deg
Source and Sink
AV = 1
7.2
●
10
9
14
10
8
V/mV
V/mV
Φ0
Phase Margin
RL = 10k, CL = 45pF, AV = 1
tS
Settling Time 0.1%
VSTEP = 2V, AV = –1, RL = 1k
0.8
IS
Supply Current (per Amplifier)
No Load
●
1.05
1.05
1.25
1.30
1.05
1.05
1.25
1.40
mA
mA
Shutdown Current (per Amplifier)
Shutdown, VSHDNx ≤ 1.2V
●
2.3
5
2.3
5
μA
Supply Voltage Range
Guaranteed by the PSRR Test
●
5.5
V
Channel Separation
fS = 10kHz
Shutdown Logic
SHDNx High
SHDNx Low
VS
tON
Turn-On Time
VSHDNx = 1.2V to 3.5V
tOFF
Turn-Off Time
VSHDNx = 3.5V to 1.2V
Leakage of SHDN Pin
VSHDNx = 0V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: A heat sink may be required to keep the junction temperature
below the absolute maximum. This depends on the power supply voltage
and the total output current.
Note 3: The LTC6087C/LTC6088C are guaranteed functional over the
operating temperature range of –40°C to 85°C. The LTC6087H/LTC6088H
are guaranteed functional over the operating temperature range of –40°C
to 125°C.
Note 4: The LTC6087C/LTC6088C are guaranteed to meet specified
performance from 0°C to 70°C. The LTC6087C/LTC6088C are designed,
characterized and expected to meet specified performance from –40°C to
125ºC but are not tested or QA sampled at these temperatures.
47
2.7
0.8
5.5
2.7
–120
●
●
●
μs
–120
3.5
dB
3.5
1.2
1.2
V
V
6
6
μs
2
2
μs
0.4
1
0.4
1
μA
The LTC6087H/LTC6088H are guaranteed to meet specified performance
from –40°C to 125°C.
Note 5: ESD (electrostatic discharge) sensitive device. ESD protection
devices are used extensively internal to the LTC6087/LTC6088; however,
high electrostatic discharge can damage or degrade the device. Use proper
ESD handling precautions.
Note 6: This parameter is not 100% tested.
Note 7: This specification is limited by high speed automated test
capability. See Typical Performance Characteristic curves for actual
performance.
Note 8: Current noise is calculated from:
in = √2qIB,
where q = 1.6 • 10–19 coulombs.
60878fb
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LTC6087/LTC6088
TYPICAL PERFORMANCE CHARACTERISTICS
VOS Distribution
VOS vs VCM
LTC6087MS8
VS = 5V
10 VCM = 0.5V
TA = 25°C
22
0.8
20
0.6
PERCENT OF UNITS (%)
0.4
VOS (mV)
8
6
4
0.2
0
–0.2
–0.4
–0.6 V = 5V
S
–0.8 TA = 25°C
REPRESENTATIVE PARTS
–1.0
0 0.5 1 1.5 2 2.5 3
VCM (V)
2
0
–1
–0.7 –0.4 –0.1 0.2
VOS (mV)
0.5
0.8
14
12
10
8
6
2
3.5
4
4.5
0
5
VS = 5V
100
TA = 85°C
10
TA = 25°C
1
0.1
–1.2
–0.4 0.4 1.2 2.0
DISTRIBUTION (μV/°C)
80
2.8
60878 G03
VS = 5V
VCM = 2.5V
TA = 25°C
90
TA = 125°C
–2
0.1Hz to 10Hz Output Voltage
Noise
Input Noise Voltage vs Frequency
100
INPUT NOISE VOLTAGE (nV/√Hz)
INPUT BIAS CURRENT (pA)
16
60878 G02
Input Bias Current vs
Common Mode Voltage
1000
LTC6087MS8
VS = 5V
VCM = 2.5V
TA = –40°C TO 125°C
4
60878 G01
10000
18
INPUT NOISE VOLTAGE (1μV/DIV)
PERCENTAGE OF UNITS (%)
VOS Drift Distribution
1.0
12
70
60
50
40
30
20
VS = 5V
VCM = 2.5V
10
0.01
0
0
0.5
1 1.5 2 2.5 3 3.5 4 4.5
COMMON MODE VOLTAGE (V)
5
10
100
1k
10k
FREQUENCY (Hz)
60878 G05
60878 G06
60878 G07
Output Voltage Swing vs
Load Current
Input Noise Current vs Frequency
Supply Current vs Supply Voltage
5.0
500
1.2
PER AMPLIFIER
VCM = 0.5V
1.0 TA = 25°C
VS = 5V
4.5 VCM = 2.5V
300
200
100
4.0
3.0
2.5
2.0
1.5
1.0
0.5
0
1
10
100
1000
FREQUENCY (Hz)
10000 100000
60878 G04
SOURCE
3.5
SUPPLY CURRENT (mA)
400
OUTPUT VOLTAGE SWING (V)
NOISE CURRENT (fA/√Hz)
TIME (1s/DIV)
100k
0
0.1
TA = 125°C
TA = 25°C
TA = –55°C
SINK
0.8
0.6
0.4
0.2
0
1
10
LOAD CURRENT (mA)
100
60878 G08
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
SUPPLY VOLTAGE (V)
69878 G09
60878fb
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LTC6087/LTC6088
TYPICAL PERFORMANCE CHARACTERISTICS
Open-Loop Gain vs Frequency
80
PER AMPLIFIER
VCM = 0.5V
1.4
60
50
VS = 5V
1.2
PHASE
GAIN (dB)
1.1
VS = 3V
40
40
GAIN
30
20
20
0
0.8
10
–20
0.7
0
–40
0.6
–10
0.5
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
–20
10k
0.9
VS = 5V
VS = 3V
100k
80
1M
10M
FREQUENCY (Hz)
VS = 5V
VCM = 2.5V
TA = 25°C
60
NEGATIVE
SUPPLY
40
30
20
10
40
30
20
10
0
–10
10k
10k
100k
1M
FREQUENCY (Hz)
10M
10
AV = 10
1
AV = 2
AV = 1
0.1
VS = 5V
AV = 1
RL = ∞
10k
100M
10M
100k 1M
FREQUENCY (Hz)
Small-Signal Response
Large-Signal Response
60878 G16
60878 G15
100M
Large-Signal Response
1V/DIV
1V/DIV
200ns/DIV
200ns/DIV
60878 G14
60878 G13
VS = 5V
AV = 1
RL = ∞
CL = 33pF
100M
VS = 5V
VCM = 2.5V
100 TA = 25°C
0.001
1k
1M
10M
FREQUENCY (Hz)
Small-Signal Response
0.01
–10
100k
60878 G12
0
100mV/DIV
PSRR (dB)
50
Output Impedance vs Frequency
70
50
–80
100M
60
1000
OUTPUT IMPEDANCE (Ω)
POSITIVE
SUPPLY
70
60878 G11
PSRR vs Frequency
90
80
–60
60878 G10
100
90
100mV/DIV
1.0
VS = 5V
VCM = 2.5V
RL = 1k
TA = 25°C
100
PHASE (DEG)
SUPPLY CURRENT (mA)
CL = 5pF
100
RL = 1k
VCM = VS/2
80
TA = 25°C
60
70
1.3
CMRR vs Frequency
110
120
CMRR (dB)
Supply Current vs Temperature
1.5
VS = 5V
AV = 1
RL = ∞
2μs/DIV
60878 G17
VS = 5V
AV = –1
RL = 1k
1μs/DIV
60878 G18
60878fb
7
LTC6087/LTC6088
TYPICAL PERFORMANCE CHARACTERISTICS
Disabled Output Impedance
vs Frequency
VS = 5V
VCM = 1V
AV = 1
TA = 25°C
10000
1000
100
40
VS = 5V
70 VCM = 2.5V
AV = 1
60
OVERSHOOT (%)
OUTPUT IMPEDANCE (kΩ)
100000
10
1
RS = 10Ω
RS = 50Ω
40
30
–
+
10k
100k
FREQUENCY (Hz)
1M
RS
CL
5
0
100
CAPACITIVE LOAD (pF)
100
CAPACITIVE LOAD (pF)
10
1000
Total Harmonic Distortion + Noise
vs Frequency
1
VS = 5V
VCM = 2.5V
TA = 25°C
1000
60878 G22
60878 G21
Total Harmonic Distortion + Noise
vs Frequency
0.1
VS = 3V
VCM = 1.5V
RL = 10k
VS = 5V
VCM = 2.5V
RL = 10k
–105
–110
–115
THD + NOISE (%)
–100
THD + NOISE (%)
CHANNEL SEPARATON (dB)
–
+
RS = 50Ω
CL
10
Channel Separation vs Frequency
–95
1k
15
0
10M
RS = 10Ω
1k
20
10
60878 G20
–90
30pF
25
RS
10
1k
VS = 5V
35 VCM = 2.5V
AV = –1
30
50
20
0.1
100
Overshoot vs Capacitive Load
Overshoot vs Capacitive Load
80
OVERSHOOT (%)
1000000
0.1
AV = 1, VIN = 2VP-P
AV = 1, VIN = 1VP-P
0.01
0.01
–120
AV = 1, VIN = 1VP-P
AV = –2, VIN = 1VP-P
–125
–130
0.01
AV = 2, VIN = 1VP-P
AV = –2, VIN = 1VP-P
AV = 1, VIN = 2VP-P
AV = 2, VIN = 1VP-P
0.1
1
10
FREQUENCY (MHz)
100
0.001
0.01
0.1
1
10
FREQUENCY (kHz)
60878 G23
100
0.1
VS = 5V
AT 20kHz
VS = 5V
AT 1kHz
60878 G25
AV = 1
VCM = VS/2 AT 1kHz
0.01
VS = 5V, VIN = 2VP-P
0.001
0.001
0.0001
100
VS = 3V, VIN = 1VP-P
THD + NOISE (%)
THD + NOISE (%)
0.01
1
10
FREQUENCY (kHz)
Total Harmonic Distortion + Noise
vs Load Resistance
0.1
VS = 3V
AT 1kHz
0.1
60878 G24
Total Harmonic Distortion + Noise
vs Output Voltage
VS = 3V
AT 20kHz
0.001
0.01
RL = 10k
VCM = VS/2
AV = 1
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
OUTPUT VOLTAGE (VP-P)
60878 G26
0.0001
0.1
1
10
LOAD RESISTANCE TO GROUND (kΩ)
100
60878 G27
60878fb
8
LTC6087/LTC6088
PIN FUNCTIONS
SHDNA: Shutdown Pin of Amplifier A, active low and only
available with the LTC 6087DD. An internal current source
pulls the pin to V+ when floating.
OUT: Amplifier Output.
–IN: Inverting Input.
+IN: Noninverting Input.
SHDNB: Shutdown Pin of Amplifier B, active low and only
available with the LTC 6087DD. An internal current source
pulls the pin to V+ when floating.
V+: Positive Supply.
V–: Negative Supply.
NC: Not internally connected
Exposed Pad: Connected to V–.
APPLICATIONS INFORMATION
package. With fine PCB design rules, you can also provide
a guard ring around the inputs.
Rail-to-Rail Input
The input stage of LTC6087/LTC6088 combines both PMOS
and NMOS differential pairs, extending its input common
mode voltage to both positive and negative supply voltages.
At high input common mode range, the NMOS pair is on.
At low common mode range, the PMOS pair is on. The
transition happens when the common voltage is between
1.3V and 0.9V below the positive supply.
Achieving Low Input Bias Current
The DD and DHC packages are leadless and make contact
to the PCB beneath the package. Solder flux used during
the attachment of the part to the PCB can create leakage
current paths and can degrade the input bias current performance of the part. All inputs are susceptible because
the backside paddle is connected to V– internally. As the
input voltage or V– changes, a leakage path can be formed
and alter the observed input bias current. For lowest bias
current use the LTC6087/LTC6088 in the leaded MSOP/GN
For example, in high source impedance applications such
as pH probes, photo diodes, strain gauges, et cetera, the
low input bias current of these parts requires a clean
board layout to minimize additional leakage current into a
high impedance signal node. A mere 100GΩ of PC board
resistance between a 5V supply trace and input trace near
ground potential adds 50pA of leakage current. This leakage is far greater than the bias current of the operational
amplifier. A guard ring around the high impedance input
traces driven by a low impedance source equal to the
input voltage prevents such leakage problems. The guard
ring should extend as far as necessary to shield the high
impedance signal from any and all leakage paths. Figure 1
shows the use of a guard ring in a unity-gain configuration.
In this case the guard ring is connected to the output and
is shielding the high impedance noninverting input from
V–. Figure 2 shows the inverting gain configuration.
OUT
R
NO SOLDER MASK
OVER THE GUARD RING
NO LEAKAGE
CURRENT
OUT
LTC6087
IN–
LTC6087
R
IN–
VIN
R
IN+
IN+
LEAKAGE
CURRENT
GND
GUARD
RING
V–
V–
60878 F01
Figure 1. Sample Layout. Unity-Gain Configuration. Using Guard
Ring to Shield High Impedance Input from Board Leakage
60878 F02
Figure 2. Sample Layout. Inverting Gain Configuration. Using
Guard Ring to Shield High Impedance Input from Board Leakage
60878fb
9
LTC6087/LTC6088
APPLICATIONS INFORMATION
Rail-to-Rail Output
The output stage of the LTC6087/LTC6088 swings within
30mV of the supply rails when driving high impedance
loads, in other words when no DC load current is present.
See the Typical Performance Characteristics for curves of
output swing versus load current. The class AB design of
the output stage enables the op amp to supply load currents which are much greater than the quiescent supply
current. For example, the room temperature short circuit
current is typically 45mA.
10k
10k
5V
5V
+
LTC6087
(DD PACKAGE)
A
10k
–
INA
SHDN
A
10k
10k
10k
OUT
10pF
+
5V
B
10k
–
INB
10pF
Capacitive Load
SEL = 5V, OUT = –INA
SEL = 0V, OUT = –1NB
10k
LTC6087/LTC6088 can drive capacitive load up to 100pF in
unity gain. The capacitive load driving capability increases
as the amplifier is used in higher gain configurations. A
small series resistance between the output and the load
further increases the amount of capacitance the amplifier
can drive.
5V
SEL
SHDN
B
FAIRCHILD
NC7SZ04 OR
EQUIVALENT
60878 F03
Figure 3. Inverting Amplifier with Muxed Output
SHDN Pins
Noise
Pins 5 and 6 are used for power shutdown when the
LTC6087 is in the DD package. If they are floating, internal
current sources pull Pins 5 and 6 to V+ and the amplifiers
operate normally. In shutdown the amplifier output is
high impedance and each amplifier draws less than 5μA
current. This feature allows the part to be used in muxed
output applications as shown in Figure 3.
In the frequency region above 1kHz, the LTC6087/LTC6088
shows good noise voltage performance. In this region,
noise can be dominated by the total source resistance of the
particular application. Specifically, these amplifiers exhibit
the noise of a 10k resistor, meaning it is desirable to keep
the source and feedback resistance at or below this value,
i.e., RS + RG||RFB ≤ 10k. Above this total source impedance,
the noise voltage is dominated by the resistor.
ESD
The LTC6087/LTC6088 has reverse-biased ESD protection
diodes on all inputs and outputs as shown in the Simplified
Schematic. If these pins are forced beyond either supply,
unlimited current will flow through these diodes. If the
current is transient and limited to one hundred milliamps
or less, no damage to the device will occur.
At low frequency, noise current can be estimated from the
expression in = √2qIB, where q = 1.6 • 10–19 coulombs.
Equating √4kTRΔf and R√2qIBΔf shows that for source
resistor below 50GΩ the amplifier noise is dominated by
the source resistance. Noise current rises with frequency.
See the curve Noise Current vs Frequency in the Typical
Performance Characteristics section.
The amplifier input bias current is the leakage current of
these ESD diodes. This leakage is a function of the temperature and common mode voltage of the amplifier, as
shown in the Typical Performance Characteristics.
60878fb
10
LTC6087/LTC6088
SIMPLIFIED SCHEMATIC
V+
R1
M10
R2
M11
M8
I1
1μA
V–
C1
+
–
V+
I2
A1
VBIAS
D4
M5
V+
+IN
V+
D7
V+
D3
OUTPUT
CONTROL
M6 M7
M1 M2
D8
–IN
V–
D5
D2
BIAS
GENERATION
SHDN
A2
+
–
V–
C2
D1
NOTE: SHDN IS ONLY AVAILABLE
V– IN THE DFN10 PACKAGE
V–
OUT
D6
V–
M3
M9
M4
R3
R4
60878 SS
60878fb
11
LTC6087/LTC6088
PACKAGE DESCRIPTION
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
0.889 p 0.127
(.035 p .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.42 p 0.038
(.0165 p .0015)
TYP
3.00 p 0.102
(.118 p .004)
(NOTE 3)
0.65
(.0256)
BSC
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
DETAIL “A”
0o – 6o TYP
GAUGE PLANE
1
0.53 p 0.152
(.021 p .006)
DETAIL “A”
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 p 0.0508
(.004 p .002)
MSOP (MS8) 0307 REV F
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
60878fb
12
LTC6087/LTC6088
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
0.675 p 0.05
3.50 p 0.05
1.65 p 0.05
2.15 p 0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 p 0.05
0.50
BSC
2.38 p 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 p 0.10
(4 SIDES)
R = 0.115
TYP
6
0.38 p 0.10
10
1.65 p 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
(DD) DFN 1103
5
0.200 REF
1
0.25 p 0.05
0.50 BSC
0.75 p 0.05
0.00 – 0.05
2.38 p 0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60878fb
13
LTC6087/LTC6088
PACKAGE DESCRIPTION
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 p .005
16 15 14 13 12 11 10 9
.254 MIN
.009
(0.229)
REF
.150 – .165
.229 – .244
(5.817 – 6.198)
.0165 p .0015
.150 – .157**
(3.810 – 3.988)
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
.015 p .004
s 45o
(0.38 p 0.10)
.007 – .0098
(0.178 – 0.249)
.0532 – .0688
(1.35 – 1.75)
2 3
4
5 6
7
8
.004 – .0098
(0.102 – 0.249)
0o – 8o TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.008 – .012
(0.203 – 0.305)
TYP
.0250
(0.635)
BSC
GN16 (SSOP) 0204
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
60878fb
14
LTC6087/LTC6088
PACKAGE DESCRIPTION
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 p 0.05
3.50 p 0.05
1.65 p 0.05
2.20 p 0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 p 0.05
0.50 BSC
4.40 p 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
5.00 p 0.10
(2 SIDES)
R = 0.20
TYP
3.00 p 0.10
(2 SIDES)
9
0.40 p 0.10
16
1.65 p 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
0.200 REF
1
0.25 p 0.05
0.50 BSC
0.75 p 0.05
4.40 p 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60878fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC6087/LTC6088
TYPICAL APPLICATIONS
Negative-Going and Positive-Going Photodiode TIAs on ±5V Supplies
CF
2pF
RF
100k
5V
1.5k
5V
1N4148
5V
IPD
+
PHOTODIODE
~3pF
VOUT
0V – IPD • RF
1/2 LTC6087
–
IPD
–
PHOTODIODE
~3pF
VOUT
0V + IPD • RF
1/2 LTC6087
+
1N4148
–5V
RF
–5V 100k
1.5k
NOTE: DIFFERENT DEVICES.
NOT THE SAME LTC6087
CF
2pF
60878 TA02
–5V
Almost Rail-to-Rail (0.3V to VCC) Gain-of-30 Current Sense Amplifier
LOAD
–
VSENSE
ISENSE
+
RSENSE
VS
1007
1%
GAIN OF 2 STAGE
VCC
+
RCOMP
10k
GAIN OF 15 STAGE
1/2 LTC6087
–
CCOMP
1nF
2N7002
+
2007
1%
1/2 LTC6087
–
FULL-SCALE VSENSE = 100mV (3V OUT).
FOR SMALL SIGNALS, INPUT OPERATION IS
RAIL-TO-RAIL (VS = 5mV to VCC).
FOR FULL SCALE, INPUT OPERATION IS 0.3V TO RAIL.
WORST-CASE INPUT OFFSET VOLTAGE = 1.8mV.
OUT
140k
1%
10k
1%
60878 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC2051/LTC2052
Dual/Quad Zero-Drift Op Amps
3μV VOS(MAX), 30nV/°C VOS Drift (MAX)
LTC6078/LTC6079
Dual/Quad Micropower Precision Rail-to-Rail Op Amps 25μV VOS(MAX), 0.7μV/°C VOS Drift (MAX), 1pA IBIAS(MAX)
LTC6240
Single Low Noise Rail-to-Rail Output Op Amp
7nV/√Hz Noise, 1pA IBIAS(MAX), 10V/μs Slew Rate
LTC6241/LTC6242
Dual/Quad Low Noise Rail-to-Rail Output Op Amps
7nV/√Hz Noise, 0.2pA IBIAS, 18MHz Gain Bandwidth
LTC6244
Dual 50MHz Rail-to-Rail Op Amps
100μV VOS(MAX), 1pA IBIAS, 40V/μs Slew Rate
60878fb
16 Linear Technology Corporation
LT 0608 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007
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