Order this document by MC34067/D The MC34067/MC33067 are high performance zero voltage switch resonant mode controllers designed for off–line and dc–to–dc converter applications that utilize frequency modulated constant off–time or constant deadtime control. These integrated circuits feature a variable frequency oscillator, a precise retriggerable one–shot timer, temperature compensated reference, high gain wide bandwidth error amplifier, steering flip–flop, and dual high current totem pole outputs ideally suited for driving power MOSFETs. Also included are protective features consisting of a high speed fault comparator, programmable soft–start circuitry, input undervoltage lockout with selectable thresholds, and reference undervoltage lockout. These devices are available in dual–in–line and surface mount packages. • Zero Voltage Switch Resonant Mode Operation • • • • • • • • • Variable Frequency Oscillator with a Control Range Exceeding 1000:1 Precision One–Shot Timer for Controlled Off–Time HIGH PERFORMANCE ZERO VOLTAGE SWITCH RESONANT MODE CONTROLLERS SEMICONDUCTOR TECHNICAL DATA P SUFFIX PLASTIC PACKAGE CASE 648 16 Internally Trimmed Bandgap Reference 1 4.0 MHz Error Amplifier Dual High Current Totem Pole Outputs Selectable Undervoltage Lockout Thresholds with Hysteresis Enable Input DW SUFFIX PLASTIC PACKAGE CASE 751G (SO–16L) Programmable Soft–Start Circuitry Low Startup Current for Off–Line Operation 16 1 PIN CONNECTIONS 16 One–Shot RC Osc Charge 1 15 VCC Osc RC 2 Osc Control Current 3 Simplified Block Diagram VCC 15 Enable / 9 UVLO Adjust 1 Osc Charge 2 Osc RC Oscillator 3 Control Current One–Shot 11 5.0 V Reference Vref Vref UVLO Variable Frequency Oscillator Steering Flip–Flop One–Shot Gnd 4 13 Power Gnd Vref 5 12 Drive Output B Error Amp Out 6 11 CSoft–Start Inverting Input 7 10 Fault Input Enable/UVLO 9 Adjust Noninverting Input 8 14 16 Error Amp 6 Output Noninverting 8 Input Inverting Input 7 Soft–Start VCC UVLO / Enable 5 14 Drive Output A (Top View) Output A 12 Output B 2.5 V Clamp 13 Pwr Gnd ORDERING INFORMATION Error Amp 10 Soft–Start Fault Detector Fault Input Device Operating Temperature Range MC34067DW 4 Ground MC34067P MC33067DW MC33067P TA = 0 to + 70°C TA = – 40° to + 85°C Motorola, Inc. 1999 MOTOROLA ANALOG IC DEVICE DATA Package SO–16L Plastic DIP SO–16L Plastic DIP Rev 1, 05/99 1 MC34067 MC33067 MAXIMUM RATINGS Rating Symbol Value Unit VCC 20 V Drive Output Current, Source or Sink (Note 1) Continuous Pulsed (0.5 µs, 25% Duty Cycle IO 0.3 1.5 Error Amplifier, Fault, One–Shot, Oscillator and Soft–Start Inputs Vin – 1.0 to + 6.0 V Vin(UVLO) – 1.0 to VCC V PD RθJA 862 145 mW °C/W PD RθJA 1.25 100 W °C/W Operating Junction Temperature TJ + 150 °C Operating Ambient Temperature MC34067 MC33067 TA Power Supply Voltage UVLO Adjust Input A Power Dissipation and Thermal Characteristics DW Suffix, Plastic Package, Case 751G TA = 25°C Thermal Resistance, Junction–to–Air P Suffix, Plastic Package, Case 648 TA = 25°C Thermal Resistance, Junction–to–Air °C 0 to + 70 – 40 to + 85 Storage Temperature Tstg °C – 55 to + 150 ELECTRICAL CHARACTERISTICS (VCC = 12 V [Note 2], ROSC= 18.2 k, RVFO = 2940, COSC = 300 pF, RT = 2370 k, CT = 300 pF, CL = 1.0 nF. For typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies [Note 3], unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Vref 5.0 5.1 5.2 V Line Regulation (VCC = 10 TO 18 V) Regline – 1.0 20 mV Load Regulation (IO = 0 mA to 10 mA) Regload – 1.0 20 mV Vref 4.9 – 5.3 V REFERENCE SECTION Reference Output Voltage (IO = 0 mA, TJ = 25°C) Total Output Variation Over Line, Load, and Temperature Output Short Circuit Current IO 25 100 190 mA Reference Undervoltage Lockout Threshold Vth 3.8 4.3 4.8 V VIO – 1.0 10 mV Input Bias Current (VCM = 1.5 V) IIB – 0.2 1.0 µA Input Offset Current (VCM = 1.5 V) IIO – 0 0.5 µA Open Loop Voltage Gain (VCM = 1.5 V, VO = 2.0 V) AVOL 70 100 – dB Gain Bandwidth Product (f = 100 kHz) GBW 3.0 5.0 – MHz Input Common Mode Rejection Ratio (VCM = 1.5 to 5.0 V) CMR 70 95 – dB Power Supply Rejection Ratio (VCC = 10 to 18 V, f = 120 Hz) PSR 80 100 – dB Output Voltage Swing High State Low State VOH VOL 2.8 – 3.2 0.6 – 0.8 ERROR AMPLIFIER Input Offset Voltage (VCM = 1.5 V) V NOTES: 1. Maximum package power dissipation limits must be observed. 2. Adjust VCC above the Startup threshold before setting to 12 V. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Tlow = 0°C for the MC34067 Thigh = + 70°C for MC34067 = – 40°C for the MC33067 Thigh = + 85°C for MC33067 2 MOTOROLA ANALOG IC DEVICE DATA MC34067 MC33067 ELECTRICAL CHARACTERISTICS (VCC = 12 V [Note 2], ROSC= 18.2 k, RVFO = 2940, COSC = 300 pF, RT = 2370 k, CT = 300 pF, CL = 1.0 nF. For typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies [Note 3], unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Frequency (Error Amp Output Low) TA = 25°C Total Variation (VCC = 10 to 18 V, TA = TLow to THigh fOSC(low) 500 490 525 – 540 550 Frequency (Error Amp Output High) TA = 25°C Total Variation (VCC = 10 to 18 V, TA = TLow to THigh fOSC(high) 1900 1850 2050 – 2150 2200 Vin – 2.5 – tBlank 235 225 250 – 270 280 VOL – – 9.5 9.0 0.8 1.5 10.3 9.7 1.2 2.0 – – VOL(UVLO) – 0.8 1.2 V Output Voltage Rise Time (CL = 1.0 nF) tr – 20 50 ns Output Voltage Fall Time (CL = 1.0 nF) tf – 15 50 ns Input Threshold Vth 0.93 1.0 1.07 V Input Bias Current (VPin 10 = 0 V) IIB – – 2.0 – 10 µA tPLH(In/Out) – 60 100 ns Ichg 4.5 9.0 14 µA Idischg 3.0 8.0 – mA Startup Threshold, VCC Increasing Enable/UVLO Adjust Pin Open Enable/UVLO Adjust Pin Connected to VCC Vth(UVLO) 14.8 8.0 16 9.0 17.2 10 Minimum Operating Voltage After Turn–On Enable/UVLO Adjust Pin Open Enable/UVLO Adjust Pin Connected to VCC VCC(min) 8.0 7.6 9.0 8.6 10 9.6 Enable/UVLO Adjust Shutdown Threshold Voltage Vth(Enable) 6.0 7.0 – Enable/UVLO Adjust Input Current (Pin 9 = 0 V) Iin(Enable) – – 0.2 – 1.0 ICC – – 0.5 27 0.8 35 OSCILLATOR Oscillator Control Input Voltage, Pin 3 @ 25°C kHz kHz V ONE–SHOT Drive Output Off–Time TA = 25°C Total Variation (VCC = 10 to 18 V, TA = TLow to THigh ns DRIVE OUTPUTS Output Voltage Low State (ISink = 20 mA) Low State (ISink = 200 mA) High State (ISource = 20 mA) High State (ISource = 200 mA) Output Voltage with UVLO Activated (VCC = 6.0 V, ISink = 1.0 mA) V VOH FAULT COMPARATOR Propagation Delay to Drive Outputs (100 mV Overdrive) SOFT–START Capacitor Charge Current (VPin 11 = 2.5 V) Capacitor Discharge Current (VPin 11 = 2.5 V) UNDERVOLTAGE LOCKOUT V V V mA TOTAL DEVICE Power Supply Current (Enable/UVLO Adjust Pin Open) Startup (VCC = 13.5 V) Operating (fOSC = 500 kHz) (Note 2) mA NOTES: 1. Maximum package power dissipation limits must be observed. 2. Adjust VCC above the Startup threshold before setting to 12 V. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Tlow = 0°C for the MC34067 Thigh = + 70°C for MC34067 = – 40°C for the MC33067 Thigh = + 85°C for MC33067 MOTOROLA ANALOG IC DEVICE DATA 3 MC34067 MC33067 500 3500 COSC = 300 pF COSC = 200 pF 400 COSC = 500 pF 300 VCC = 12 V RVFO = ∞ RT = ∞ CT = 500 pF TA = 25°C 200 100 0 Figure 2. Oscillator Frequency versus Oscillator Control Current f OSC , OSCILLATOR FREQUENCY (kHz) ROSC, OSCILLATOR TIMING RESISTOR (kΩ ) Figure 1. Oscillator Timing Resistor versus Discharge Time Oscillator Discharge Time is Measured at the Drive Outputs. 0 20 40 60 80 tdischg, OSCILLATOR DISCHARGE TIME (µs) VCC = 12 V TA = 25°C ROSC = 18.2 k 3000 2500 2000 COSC = 300 pF 1500 1000 100 500 0 0 400 800 1200 1600 IOSC, OSCILLATOR CONTROL CURRENT (mA) Figure 4. One–Shot Timing Resistor versus Period 60 0.35 RT, TIMING RESISTOR (k Ω ) 0.30 0.25 0.20 0.15 0.10 0.05 0 0.5 1.0 1.5 2.0 2.5 IOSC, OSCILLATOR CONTROL CURRENT (mA) 3.0 50 40 VCC = 12 V VO = 2.0 V RL = 100 k TA = 25°C Gain 30 70 20 80 10 90 0 –10 – 20 10 k Phase Phase Margin = 64° 100 k 1.0M f, FREQUENCY (Hz) 100 110 120 10M ∇ 4 60 0, EXCESS PHASE (DEGREES) A VOL, OPEN LOOP VOLTAGE GAIN (dB) Figure 5. Open Loop Voltage Gain and Phase versus Frequency 50 VCC = 12 V COSC = 500 pF ROSC = 100 k TA = 25°C 30 CT = 200 pF 20 CT = 300 pF CT = 500 pF 10 400 One–Shot Period is Measured at the Drive Outputs. 3.0 0.1 V ref , REFERENCE OUTPUT VOLTAGE CHANGE (mV) Vsat, OUTPUT SATURATION VOLTAGE (V) Figure 3. Error Amp Output Saturation Voltage versus Oscillator Control Current 2000 0.3 0.6 1.0 3.0 tOS, ONE–SHOT PERIOD (µs) 6.0 10 Figure 6. Reference Output Voltage Change versus Temperature *Vref = 5.0 V 0 – 10 – 20 *Vref = 5.0 V VCC = 12 V RL = ∞ *Vref at TA = 25°C – 30 – 40 – 50 – 55 *Vref = 5.0 V – 25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 MOTOROLA ANALOG IC DEVICE DATA Figure 7. Reference Voltage Change versus Source Current Figure 8. Drive Output Saturation Voltage versus Load Current 0 V sat , OUTPUT SATURATION VOLTAGE (V) V ref , REFERENCE OUTPUT VOLTAGE CHANGE (mV) MC34067 MC33067 TA = – 40°C –10 TA = – 20°C – 20 TA = –125°C – 30 – 40 – 50 VCC = 12 V 0 20 ∇ 40 60 80 Iref, REFERENCE SOURCE CURRENT (mA) 100 0 TA = 25°C – 2.0 3.0 TA = – 40°C 2.0 TA = 25°C Source Saturation (Load to VCC) 1.0 0 0 V OL , SOFT–START SATURATION VOLTAGE (V) CL = 1.0 nF TA = 25 °C 1.6 0.8 0 0 VCC = 12 V CL = 1.0 nF TA = 25 °C 1200 800 400 50 60 70 ICC, INPUT SUPPLY CURRENT (mA) MOTOROLA ANALOG IC DEVICE DATA 80 2.0 4.0 6.0 8.0 Idchg, CAPACITOR DISCHARGE CURRENT (mA) 10 Figure 12. Supply Current versus Supply Voltage I CC, SUPPLY CURRENT (mA) f, FREQUENCY (kHz) VCC = 12 V Pin 10 = Vref TA = 25 °C 24 2000 40 1.0 2.4 Figure 11. Operating Frequency versus Supply Current 30 0.4 0.6 0.8 IO, OUTPUT LOAD CURRENT (A) 3.2 20 ns/DIV 0 0.2 Gnd Figure 10. Soft–Start Saturation Voltage versus Capacitor Discharge Current 10% 1600 VCC = 12 V 80 µs Pulsed Load 120 Hz Rate TA = – 40°C – 3.0 Figure 9. Drive Output Waveform 90% Source Saturation (Load to Ground) VCC –1.0 90 TA = 25 °C 20 Enable/UVLO Adjust Pin Open 16 12 8.0 Enable/UVLO Adjust Pin to VCC 4.0 0 0 4.0 8.0 12 VCC, SUPPLY VOLTAGE (V) 16 20 5 MC34067 MC33067 Figure 13. MC34067 Representative Block Diagram VCC 15 50k Enable / UVLO Adjust 7.0k 7.0k 9 50k 5.1V Reference VCC UVLO 8.0V Q1 4.2/4.0V Q2 2 IOSC 4.9V/3.6V One–Shot RC CT Oscillator 16 Control Current RT IOSO 14 13 One–Shot 3.1V 3 RVFO Error Amp Output 6 8 Noninverting Input Inverting Input 7 Soft–Start Output A Steering Flip–Flop Q T RQ Oscillator OSC RC COSC Vref D1 1 ROSC 5 Vref UVLO Vref OSC Charge Vref Power Ground Output B 12 4.9V/3.6V Fault Comparator Error Amp Clamp Fault Input 10 1.0V 9.0µA Error Amp 11 4 Ground Timing Diagram 5.1 V COSC 3. 6 V One–Shot 5.1 V 3.6 V Output A Output B tOS tOS tOS Error Amp output high, minimum IOSC current occurring at minimum input voltage, maximum load. 6 tOS tOS tOS Error Amp output low, maximum IOSC current occurring at maximum input voltage, minimum load. MOTOROLA ANALOG IC DEVICE DATA MC34067 MC33067 OPERATING DESCRIPTION Introduction As power supply designers have strived to increase power conversion efficiency and reduce passive component size, high frequency resonant mode power converters have emerged as attractive alternatives to conventional pulse–width modulated control. When compared to pulse–width modulated converters, resonant mode control offers several benefits including lower switching losses, higher efficiency, lower EMI emission, and smaller size. A new integrated circuit has been developed to support this trend in power supply design. The MC34067 Resonant Mode Controller is a high performance bipolar IC dedicated to variable frequency power control at frequencies exceeding 1.0 MHz. This integrated circuit provides the features and performance specifically for zero voltage switching resonant mode power supply applications. The primary purpose of the control chip is to provide a fixed off–time to the gates of external power MOSFETs at a repetition rate regulated by a feedback control loop. Additional features of the IC ensure that system startup and fault conditions are administered in a safe, controlled manner. A simplified block diagram of the IC is shown on the front page, which identifies the main functional blocks and the block–to–block interconnects. Figure 13 is a detailed functional diagram which accurately represents the internal circuitry. The various functions can be divided into two sections. The first section includes the primary control path which produces precise output pulses at the desired frequency. Included in this section are a variable frequency Oscillator, a One–Shot, a pulse Steering Flip–Flop, a pair of power MOSFET Drivers, and a wide bandwidth Error Amplifier. The second section provides several peripheral support functions including a voltage reference, undervoltage lockout, Soft–Start circuit, and a fault detector. Primary Control Path The output pulse width and repetition rate are regulated through the interaction of the variable frequency Oscillator, One–Shot timer and Error Amplifier. The Oscillator triggers the One–Shot which generates a pulse that is alternately steered to a pair of totem pole output drivers by a toggle Flip–Flop. The Error Amplifier monitors the output of the regulator and modulates the frequency of the Oscillator. High speed Schottky logic is used throughout the primary control channel to minimize delays and enhance high frequency characteristics. Oscillator The characteristics of the variable frequency Oscillator are crucial for precise controller performance at high operating frequencies. In addition to triggering the One–Shot timer and initiating the output deadtime, the oscillator also determines the initial voltage for the one–shot capacitor. The Oscillator is designed to operate at frequencies exceeding 1.0 MHz. The Error Amplifier can control the oscillator frequency over a 1000:1 frequency range, and both the minimum and maximum frequencies are easily and accurately programmed by the proper selection of external components. MOTOROLA ANALOG IC DEVICE DATA The functional diagram of the Oscillator and One–Shot timer is shown in Figure 14. The oscillator capacitor (COSC) is initially charged by transistor Q1. When COSC exceeds the 4.9 V upper threshold of the oscillator comparator, the base of Q1 is pulled low allowing COSC to discharge through the external resistor, (ROSC), and the oscillator control current, (IOSC). When the voltage on COSC falls below the comparator’s 3.6 V lower threshold, Q1 turns on and again charges COSC. COSC charges from 3.6 V to 5.1 V in less than 50 ns. The high slew rate of COSC and the propagation delay of the comparator make it difficult to control the peak voltage. This accuracy issue is overcome by clamping the base of Q1 through a diode to a voltage reference. The peak voltage of the oscillator waveform is thereby precisely set at 5.1 V. Figure 14. Oscillator and One–Shot Timer + OSC Charge VOE Vref + VOE Q1 D1 1 OSC RC ROSC COSC 2 Oscillator IOSC 4.9V/3.6V One–Shot RC CT RT Oscillator 10 Control Current IOSO 3 RVFO 6 Error Amp Output One–Shot 4.9V/3.6V 3.1V Error Amp Charge The frequency of the Oscillator is modulated by varying the current flowing out of the Oscillator Control Current (IOSC) pin. The IOSC pin is the output of a voltage regulator. The input of the voltage regulator is tied to the variable frequency oscillator. The discharge current of the Oscillator increases by increasing the current out of the IOSC pin. Resistor RVFO is used in conjunction with the Error Amp output to change the IOSC current. Maximum frequency occurs when the Error Amplifier output is at its low state with a saturation voltage of 0.1 V at 1.0 mA. The minimum oscillator frequency will result when the IOSC current is zero, and COSC is discharged through the external resistor (ROSC). This occurs when the Error Amplifier output is at its high state of 2.5 V. The minimum and maximum oscillator frequencies are programmed by the proper selection of resistor ROSC and RVFO. The minimum frequency is programmed by ROSC using Equation 1: 1 – t PD t (max) – 70 ns ƒ(min) R OSC = = 0.348 C OSC C OSC ȏ n ǒ 5.1 Ǔ 3.6 where tPD is the internal propagation delay. (1) 7 MC34067 MC33067 The maximum oscillator frequency is set by the current through resistor RVFO. The current required to discharge COSC at the maximum oscillator frequency can be calculated by Equation 2: I (max) = C OSC 5.1 – 3.6 1 ƒ(max) = 1.5COSC ƒ(max) 5.1 – 3.6 = IR ε OSC ROSC = 1.5 R OSC ε ǒ– Oscillator Control Current (2) 1 ƒ (min) R OSC COSC 3.1V 3 IOSC The discharge current through ROSC must also be known and can be calculated by Equation 3: ǒ– Figure 15. Error Amplifier and Clamp RVFO 6 Error Amp Charge Error Amp Output 8 Noninverting Input Ǔ Inverting Input Ǔ (3) 7 Error Amp 1 ƒ (min) R OSC COSC Resistor RVFO can now be calculated by Equation 4: 2.5 – V EAsat RVFO = (4) I(max) – I R OSC One–Shot Timer The One–Shot is designed to disable both outputs simultaneously providing a deadtime before either output is enabled. The One–Shot capacitor (C T ) is charged concurrently with the oscillator capacitor by transistor Q1, as shown in Figure 14. The one–shot period begins when the oscillator comparator turns off Q1, allowing CT to discharge. The period ends when resistor RT discharges CT to the threshold of the One–Shot comparator. The lower threshold of the One–Shot is 3.6 V. By choosing CT, RT can by solved by Equation 5: t OS t OS RT = = (5) 0.348 C T C T ȏ n ǒ 5.1 Ǔ 3.6 When the Error Amplifier output is coupled to the IOSC pin by RVFO, as illustrated in Figure 15, it provides the Oscillator Control Current, IOSC. The output swing of the Error Amplifier is restricted by a clamp circuit to improve its transient recovery time. Output Section The pulse(tOS), generated by the Oscillator and One–Shot timer is gated to dual totem–pole output drives by the Steering Flip–Flop shown in Figure 16. Positive transitions of tOS toggle the Flip–Flop, which causes the pulses to alternate between Output A and Output B. The flip–flop is reset by the undervoltage lockout circuit during startup to guarantee that the first pulse appears at Output A. Figure 16. Steering Flip–Flop and Output Drivers VOE ± Output A Errors in the threshold voltage and propagation delays through the output drivers will affect the One–Shot period. To guarantee accuracy, the output pulse of the control chip is trimmed to within 5% of 250 ns with nominal values of RT and CT. The outputs of the Oscillator and One–Shot comparators are OR’d together to produce the pulse tOS, which drives the Flip–Flop and output drivers. The output pulse (tOS) is initiated by the Oscillator and terminated by the One–Shot comparator. With zero–voltage resonant mode converters, the oscillator discharge time should never be set less than the one–shot period. Error Amplifier A fully accessible high performance Error Amplifier is provided for feedback control of the power supply system. The Error Amplifier is internally compensated and features dc open loop gain greater than 70 dB, input offset voltage of less than 10 mV and a guaranteed minimum gain–bandwidth product of 2.5 MHz. The input common mode range extends from 1.5 V to 5.1 V, which includes the reference voltage. 8 Steering Flip–Flop Q T 14 Power Ground Pwr Gnd RQ 13 VOE ± Output B 12 Pwr Gnd The totem–pole output drivers are ideally suited for driving power MOSFETs and are capable of sourcing and sinking 1.5 A. Rise and fall times are typically 20 ns when driving a 1.0 nF load. High source/sink capability in a totem–pole driver normally increases the risk of high cross conduction current during output transitions. The MC34067 utilizes a unique design that virtually eliminates cross conduction, thus controlling the chip power dissipation at high frequencies. A separate power ground pin is provided to isolate the sensitive analog circuitry from large transient currents. MOTOROLA ANALOG IC DEVICE DATA MC34067 MC33067 Figure 17. Undervoltage Lockout and Reference VCC 15 50k Enable / UVLO Adjust 7.0k Vref 7.0k 5.1V Reference 9 50k 8.0V Vref 5 Vref UVLO VCC UVLO 4.2/4.0V UVLO PERIPHERAL SUPPORT FUNCTIONS The MC34067 Resonant Controller provides a number of support and protection functions including a precision voltage reference, undervoltage lockout comparators, soft–start circuitry, and a fault detector. These peripheral circuits ensure that the power supply can be turned on and off in a controlled manner and that the system will be quickly disabled when a fault condition occurs. Undervoltage Lockout and Voltage Reference Separate undervoltage lockout comparators sense the input VCC voltage and the regulated reference voltage as illustrated in Figure 17. When VCC increases to the upper threshold voltage, the VCC UVLO comparator enables the Reference Regulator. After the Vref output of the Reference Regulator rises to 4.2 V, the Vref UVLO comparator switches the UVLO signal to a logic zero state enabling the primary control path. Reducing VCC to the lower threshold voltage causes the VCC UVLO comparator to disable the Reference Regulator. The Vref UVLO comparator then switches the UVLO output to a logic one state disabling the controller. The Enable/UVLO Adjust pin allows the power supply designer to select the VCC UVLO threshold voltages. When this pin is open, the comparator switches the controller on at 16 V and off at 9.0 V. If this pin is connected to the VCC terminal, the upper and lower thresholds are reduced to 9.0 V and 8.6 V, respectively. Forcing the Enable/UVLO Adjust pin low will pull the VCC UVLO comparator input low (through an internal diode) turning off the controller. The Reference Regulator provides a precise 5.1 V reference to internal circuitry and can deliver up to 10 mA to external loads. The reference is trimmed to better than 2% initial accuracy and includes active short circuit protection. Fault Detector The high speed Fault Comparator illustrated in Figure 18 can protect a power supply from destruction under fault conditions. The Fault Input pin connects to the input of the Fault Comparator. The Fault Comparator output connects to the output drivers. This direct path reduces the propagation MOTOROLA ANALOG IC DEVICE DATA delay from the Fault Input to the A and B outputs to typically 70 ns. The Fault Comparator output is also OR’d with the UVLO output from the Vref UVLO comparator to produce the logic output labeled “UVLO+Fault”. This signal disables the Oscillator and One–Shot by forcing both the COSC and CT capacitors to be continually charged. Figure 18. Fault Detector and Soft–Start UVLO UVLO + Fault Fault Fault Comparator Input 10 9.0µA 1.0V Ea Clamp CSoft–Start Soft–Start Buffer 11 6 Ground Soft–Start Circuit The Soft–Start circuit shown in Figure 18 forces the variable frequency Oscillator to start at the maximum frequency and ramp downward until regulated by the feedback control loop. The external capacitor at the CSoft–Start terminal is initially discharged by the UVLO+Fault signal. The low voltage on the capacitor passes through the Soft–Start Buffer to hold the Error Amplifier output low. After UVLO+Fault switches to a logic zero, the soft–start capacitor is charged by a 9.0 µA current source. The buffer allows the Error Amplifier output to follow the soft–start capacitor until it is regulated by the Error Amplifier inputs. The soft–start function is generally applicable to controllers operating below resonance and can be disabled by simply opening the CSoft–Start terminal. 9 MC34067 MC33067 APPLICATIONS INFORMATION The MC34067 is specifically designed for zero voltage switching (ZVS) quasi–resonant converter (QRC) applications. The IC is optimized for double–ended push–pull or bridge type converters operating in continuous conduction mode. Operation of this type of ZVS with resonant properties is similar to standard push–pull or bridge circuits in that the energy is transferred during the transistor on–time. The difference is that a series resonant tank is usually introduced to shape the voltage across the power transistor prior to turn–on. The resonant tank in this topology is not used to deliver energy to the output as is the case with zero current switch topologies. When the power transistor is enabled the voltage across it should already be zero, yielding minimal switching loss. Figure 19 shows a timing diagram for a half–bridge ZVS QRC. An application circuit is shown in Figure 20. The circuit built is a dc to dc half–bridge converter delivering 75 W to the output from a 48 V source. When building a zero voltage switch (ZVS) circuit, the objective is to waveshape the power transistor’s voltage waveform so that the voltage across the transistor is zero when the device is turned on. The purpose of the control IC is to allow a resonant tank to waveshape the voltage across the power transistor while still maintaining regulation. This is accomplished by maintaining a fixed deadtime and by varying the frequency; thus the effective duty cycle is changed. Primary side resonance can be used with ZVS circuits. In the application circuit, the elements that make the resonant tank are the primary leakage inductance of the transformer (LL) and the average output capacitance (COSS) of a power MOSFET (CR). The desired resonant frequency for the application circuit is calculated by Equation 6: ƒr = 10 1 2π L L 2C R In the application circuit, the operating voltage is low and the value of COSS versus Drain Voltage is known. Because the COSS of a MOSFET changes with drain voltage, the value of the CR is approximated as the average COSS of the MOSFET. For the application circuit the average COSS can be calculated by Equation 7: CR = 2 * C OSS measured at 1 V 2 in (7) The MOSFET chosen fixes CR and that LL is adjusted to achieve the desired resonant frequency. However, the desired resonant frequency is less critical than the leakage inductance. Figure 19 shows the primary current ramping toward its peak value during the resonant transition. During this time, there is circulating current flowing through the secondary inductance, which effectively makes the primary inductance appear shorted. Therefore, the current through the primary will ramp to its peak value at a rate controlled by the leakage inductance and the applied voltage. Energy is not transferred to the secondary during this stage, because the primary current has not overcome the circulating current in the secondary. The larger the leakage inductance, the longer it takes for the primary current to slew. The practical effect of this is to lower the duty cycle, thus reducing the operating range. The maximum duty cycle is controlled by the leakage inductance, not by the MC34067. The One–Shot in the MC34067 only assures that the power switch is turned on under a zero voltage condition. Adjust the one–shot period so that the output switch is activated while the primary current is slewing but before the current changes polarity. The resonant stage should then be designed to be as long as the time for the primary current to go to zero amps. (6) MOTOROLA ANALOG IC DEVICE DATA MC34067 MC33067 Figure 19. Application Timing Diagram 5.1 V COSC 3.6 V One–Shot 5.1 V 3.6 V Output A Output B Vin 1/2 Vin 0V + Iprimary 0A – Iprimary Vin/Turns Ratio Output Diode Voltage MOTOROLA ANALOG IC DEVICE DATA 11 12 VFB 2.7k 18k 6 4.0 mV = ±0.039% 25 mVp–p 83.5% 84.2% V in = 48 V, I O = 15 A, fswitch = 1.0 MHz V in = 48 V, I O = 10 A, fswitch = 1.7 MHz V in = 48 V, I O = 15 A, fswitch = 1.0 MHz Output Ripple Efficiency 20 mV = ±0.198% Results V in = 48 V, IO = 10 A to 15 A Conditions 4 V in = 40 V to 56 V, IO =15 A 11 7 8 220pF Reference Regulator Load Regulation Test 0.01 1500pF 1.1k 10k 3 10 2 1 9 15 Line Regulation 16k 1.6k 330pF 100pF 330pF 10 VCC Figure 20. Application Circuit 1N5819 470 T2 3.9k 1.0k 1.0k MTP33N10E 100 1.0 1.0 100 T3 1N5819 x 4 CTL MBR2535 500pF 51, 0.5W 30 L1 = 1.8µ VFB 2 L2 = 100ns Insulators = Berquist Sil–Pad 1500 Heatsinks = AAVID Engineering Inc. 533402B02552 with clip MC34067–5803 L2 = 5 turns #48 AWG (1300 strands litz wire) Core: 0.5″ diameter air code Inductance = 100 nH L1 = 2 turns #48 AWG (1300 strands litz wire) Core: Philips 3F3 EP10–3F3 Bobbin: Philips EP10PCB1–8 Inductance = 1.8 µH T3 = Coilcraft D1870 (100 turns) T2 = All windings: 8 turns #36 AWG Core: Philips 3F3 EP7–3F3 Bobbin: Philips EP7PCB1–6 T1 = Primary: 12 turns #48 AWG (1300 strands litz wire) Secondary: 6 turns center tapped #48 AWG (1300 strands litz wire) Core: Philips 3F3 4312 020 4124 Bobbin: Philips 4322 021 3525 Primary Leakage Inductance = 1.0 µH 470pF 10 12 13 14 5 Vin = 36 – 56V Vout = 5.0V MC34067 MC33067 MOTOROLA ANALOG IC DEVICE DATA MC34067 MC33067 Figure 21. Printed Circuit Board and Component Layout 3.875″ 5.0″ (Bottom View) (Top View) MOTOROLA ANALOG IC DEVICE DATA 13 MC34067 MC33067 OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 648–08 ISSUE R –A– 16 9 1 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M T A M DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 DW SUFFIX PLASTIC PACKAGE CASE 751G–03 (SO–16L) ISSUE B A D 9 1 8 h X 45 _ E M 0.25 8X H B M 16 q 16X M 14X e T A S B S 14 A1 L A 0.25 DIM A A1 B C D E e H h L B B NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. SEATING PLANE T q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 10.15 10.45 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ C MOTOROLA ANALOG IC DEVICE DATA MC34067 MC33067 Motorola reserves the right to make changes without further notice to any products herein. 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MOTOROLA ANALOG IC DEVICE DATA 15 MC34067 MC33067 Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 1–303–675–2140 or 1–800–441–2447 JAPAN: Motorola Japan Ltd.; SPD, Strategic Planning Office, 141, 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan. 81–3–5487–8488 Customer Focus Center: 1–800–521–6274 Mfax: [email protected] – TOUCHTONE 1–602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, Motorola Fax Back System – US & Canada ONLY 1–800–774–1848 2, Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. – http://sps.motorola.com/mfax/ 852–26668334 HOME PAGE: http://motorola.com/sps/ 16 ◊ MC34067/D MOTOROLA ANALOG IC DEVICE DATA