FEATURES FUNCTIONAL BLOCK DIAGRAM Low insertion loss: 0.7 dB typical at 2.0 GHz High input third-order intercept (IP3): >60 dBm typical Single positive control: 0 V or 3 V Small, surface-mount, 8-lead, 2 mm × 2 mm LFCSP package HMC1055 NIC 1 8 RF2 GND 2 7 VCTL GND 3 6 VDD NIC 4 5 RF1 APPLICATIONS PACKAGE BASE Cellular infrastructure Wireless infrastructure Mobile radios Test equipment GND 13718-001 Data Sheet 0.5 GHz to 4.0 GHz, GaAs, SPST Switch HMC1055 Figure 1. GENERAL DESCRIPTION The HMC1055 is a low cost, gallium arsenide (GaAs), singlepole, single-throw (SPST) switch in a surface-mount LFCSP package. This switch offers low insertion loss, high isolation, and exceptional third-order intermodulation performance that make it ideal for many cellular and wireless infrastructure applications from 0.5 GHz to 4.0 GHz. Rev. A The HMC1055 operates with single positive supply voltage and a single positive control voltage at very low dc currents. RF1 is reflective open, whereas RF2 is terminated to 50 Ω in the off state. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com HMC1055 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Interface Schematics .....................................................................5 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................6 Functional Block Diagram .............................................................. 1 Theory of Operation .........................................................................8 General Description ......................................................................... 1 Applications Information .................................................................9 Revision History ............................................................................... 2 Evaluation Printed Circuit Board (PCB)....................................9 Specifications..................................................................................... 3 Evaluation Board Schematic and Artwork ................................9 Absolute Maximum Ratings ............................................................ 4 Outline Dimensions ....................................................................... 10 ESD Caution .................................................................................. 4 Ordering Guide .......................................................................... 10 Pin Configuration and Function Descriptions ............................. 5 REVISION HISTORY 2/16—v00.0912 to Rev. A This Hittite Microwave Products data sheet has been reformatted to meet the styles and standards of Analog Devices, Inc. Changed NC to NIC ...................................................... Throughout Changes to Title, Features Section, Applications Section, Figure 1, and General Description Section ................................... 1 Changes to Table 1 ............................................................................ 3 Changes to Table 2 ............................................................................ 4 Added Figure 2; Renumbered Sequentially .................................. 5 Changes to Table 3 ............................................................................ 5 Deleted Typical Application Circuit............................................... 5 Changes to Figure 5 ...........................................................................6 Changes to Figure 11 and Figure 12 ...............................................7 Changes to Theory of Operation Section and Table 4 .................8 Added Applications Information Section, Evaluation Printed Circuit Board Section, Evaluation Board Schematic and Artwork Section, and Figure 13; Renumbered Sequentially .......9 Changes to Table 5.............................................................................9 Updated Outline Dimensions ....................................................... 10 Changes to Ordering Guide .......................................................... 10 Rev. A | Page 2 of 10 Data Sheet HMC1055 SPECIFICATIONS VDD = 3 V , VCTL = 0 V or VDD, TA = 25°C, 50 Ω system, unless otherwise noted. Table 1. Parameter FREQUENCY INSERTION LOSS ISOLATION RETURN LOSS On State Off State INPUT LINEARITY Input 0.1 dB Compression (P0.1dB) Input Third-Order Intercept (IP3) SWITCHING CHARACTERISTICS Rise/Fall Time (tRISE, tFALL) On/Off Time (tON, tOFF) CURRENT Supply (IDD) Control (ICTL) Test Conditions/Comments 0.5 GHz to 2.0 GHz 2.0 GHz to 4.0 GHz 0.5 GHz to 2.0 GHz 2.0 GHz to 4.0 GHz 0.7 1.4 36 28 Unit GHz dB dB dB dB 0.5 GHz to 2.0 GHz, RF1 and RF2 ports 2.0 GHz to 4.0 GHz, RF1 and RF2 ports 0.5 GHz to 2.0 GHz, RF2 port 2.0 GHz to 4.0 GHz, RF2 port 0.5 GHz to 4.0 GHz 27 25 12 24 dB dB dB dB Two-tone input power = 15 dBm each tone 28 >60 dBm dBm 10% to 90% RF 50% VCTL to 90% RF 40 50 ns ns VDD = 3 V to 5 V 0 V or VDD 0.2 <5 mA µA Rev. A | Page 3 of 10 Min 0.5 Typ Max 4.0 HMC1055 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 2. Parameter RF Input Power (VDD = 3 V, TCASE = 85°C) Supply Voltage Control Voltage Range Continuous Power Dissipation, PDISS Thermal Resistance, θJC (Channel to Package Bottom) Channel Temperature Operating Temperature Range Storage Temperature Range Reflow Temperature ESD Sensitivity, Human Body Model (HBM) Rating 34 dBm 6.0 V −0.2 V to VDD + 0.2 V 0.88 W 74°C/W 150°C −40°C to +85°C −65°C to +150°C 260°C (MSL1 Rating) 250 V (Class 1A) Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. ESD CAUTION Rev. A | Page 4 of 10 Data Sheet HMC1055 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NIC 1 8 RF2 GND 2 HMC1055 7 VCTL GND 3 TOP VIEW (Not to Scale) 6 VDD 5 RF1 NOTES 1. NIC = NOT INTERNALLY CONNECTED. 2. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED TO RF/DC GROUND. 13718-002 NIC 4 Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No. 1, 4 2, 3 5 6 7 8 Mnemonic NIC GND RF1 VDD VCTL RF2 EPAD Description Not Internally Connected. These pins are not internally connected but can be grounded. Ground. These pins must be connected to RF ground. RF Input. This pin is dc-coupled and matched to 50 Ω. A blocking capacitor is required. Supply Voltage Pin. Control Input Pin. RF Output. This pin is dc-coupled and matched to 50 Ω. A blocking capacitor is required. Exposed Pad. The exposed pad must be connected to RF/dc ground. INTERFACE SCHEMATICS R 13718-003 VCTL C 13718-004 GND Figure 4. VCTL Interface Schematic Figure 3. GND Interface Schematic Rev. A | Page 5 of 10 HMC1055 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 0 0 +85°C +25°C –40°C –10 –20 ISOLATION (dB) INSERTION LOSS (dB) –1 –2 –3 –30 –40 –50 –4 +85°C +25°C –40°C 0 1 2 3 4 5 FREQUENCY (GHz) –70 13718-005 –5 Figure 5. Insertion Loss vs. Frequency over Temperature, VDD = 3 V, VCTL = 3 V 0 2 3 4 5 FREQUENCY (GHz) Figure 8. Isolation vs. Frequency over Temperature, VDD = 3 V, VCTL = 0 V 0 +85°C +25°C –40°C –5 RETURN LOSS (dB) –10 –15 –20 –10 –15 –20 –25 –25 –30 –30 1 2 3 4 5 FREQUENCY (GHz) –35 13718-006 –35 0 +85°C +25°C –40°C –5 0 1 2 3 4 5 FREQUENCY (GHz) Figure 6. RF1 Return Loss vs. Frequency over Temperature, VDD = 3 V, VCTL = 3 V Figure 9. RF2 Return Loss vs. Frequency over Temperature, VDD = 3 V, VCTL = 3 V 0 0 13718-009 0 RETURN LOSS (dB) 1 13718-008 –60 +85°C +25°C –40°C –5 RETURN LOSS (dB) –4 –6 –10 –15 –20 –25 –8 +85°C +25°C –40°C –10 0 1 2 3 4 FREQUENCY (GHz) 5 Figure 7. RF1 Return Loss vs. Frequency over Temperature, VDD = 3 V, VCTL = 0 V –35 0 1 2 3 4 FREQUENCY (GHz) Figure 10. RF2 Return Loss vs. Frequency over Temperature, VDD = 3 V, VCTL = 0 V Rev. A | Page 6 of 10 5 13718-010 –30 13718-007 RETURN LOSS (dB) –2 Data Sheet HMC1055 80 35 +85°C +25°C –40°C 30 INPUT P0.1dB (dBm) 70 65 60 20 15 55 +85°C +25°C –40°C 1.0 1.5 2.0 2.5 FREQUENCY (GHz) 3.0 3.5 4.0 10 0.5 13718-011 50 0.5 25 Figure 11. Input IP3 vs. Frequency Over Temperature, VDD = 3 V, VCTL = 3 V 1.0 1.5 2.0 2.5 FREQUENCY (GHz) 3.0 3.5 4.0 13718-012 INPUT IP3 (dBm) 75 Figure 12. Input P0.1dB vs. Frequency Over Temperature, VDD = 3 V, VCTL = 3 V Rev. A | Page 7 of 10 HMC1055 Data Sheet THEORY OF OPERATION The HMC1055 requires a single-supply voltage applied to the VDD pin. Bypassing capacitors are recommended on the supply line to minimize RF coupling. The HMC1055 is controlled via a single digital control voltage applied to the VCTL pin. When the VCTL pin is high, the switch is set to the on state, by which an insertion loss path is provided from RF1 to RF2. When the VCTL pin is low, the switch is set to the off state, by which RF2 is isolated from RF1 and terminated to 50 Ω, whereas RF1 becomes reflective open (see Table 4). Table 4. Truth Table Supply Voltage (VDD) 3V 5V 1 Control Voltage (VCTL)1 0V 3V 0V 5V Control voltage tolerances are ±0.2 V dc. The HMC1055 is internally matched to 50 Ω at the RF1 and RF2 pins; therefore, no external matching components are required. The RF1 and RF2 pins are dc-coupled, and dc blocking capacitors are required on the RF lines. Rev. A | Page 8 of 10 Switch Mode (RF1 to RF2) Off On Off On Data Sheet HMC1055 APPLICATIONS INFORMATION EVALUATION BOARD SCHEMATIC AND ARTWORK 1 NIC RF2 VCTL U1 HMC1055 8 7 5 6 RF1 GND VDD J1 1 2 3 RF1 C2 330pF C3 330pF RF2 1 J2 C1 1nF J3 C4 330pF DEPOP J5 DEPOP J4 C5 330pF DEPOP 1 1 J6 DEPOP Figure 13. Evaluation Board Schematic Table 5. List of Materials for EVAL01-HMC1055LP2C Item J1, J2 J3, J4 C1 C2, C3 U1 PCB Description PCB mount, SMA, RF connector DC pin 1 nF capacitor, 0402 package 330 pF capacitor, 0402 package HMC1055 SPST switch 600-00215-00-1 evaluation PCB 13718-014 The RF input and output ports (RF1 and RF2) are connected through 50 Ω transmission lines to the SMA connectors, J1 and J2, respectively. The RF1 and RF2 ports are ac-coupled with capacitors of an appropriate value to ensure broadband performance. A thru calibration line connects J5 and J6; this transmission line is used to estimate the loss of the PCB over the environmental conditions being evaluated. GND The package ground pins are connected directly to the ground plane. The supply voltage and control voltage must be connected to the dc pins, J3 and J4, respectively, of the evaluation board. One decoupling capacitor is populated on the supply trace to filter high frequency noise. NIC All RF and dc traces are routed on the top copper layer. The RF transmission lines are designed using a coplanar waveguide (CPWG) model, with a width of 16 mil, spacing of 13 mil, and dielectric thickness of 10 mil, to have a characteristic impedance of 50 Ω. The inner and bottom layers are grounded planes to provide a solid ground for the RF transmission lines. For optimal electrical and thermal performance, as many vias as possible are arranged around the transmission lines and under the package exposed pad. The evaluation board layout shown in Figure 14 serves as a recommendation for optimal and stable performance, as well as for improvement of thermal efficiency. 4 The HMC1055 evaluation board is constructed of a 4-layer material with a copper thickness of 0.7 mil on each layer. Every copper layer is separated with a dielectric material. The top dielectric material is 10 mil RO4350. The middle and bottom dielectric materials are FR-4, used for mechanical strength and overall board thickness of approximately 62 mil, which allows SMA connectors to be slipped in at the board edges. Figure 14. Evaluation Board Layout—Top View Rev. A | Page 9 of 10 13718-013 EVALUATION PRINTED CIRCUIT BOARD (PCB) HMC1055 Data Sheet OUTLINE DIMENSIONS 1.25 1.20 1.15 2.05 2.00 SQ 1.95 0.50 BSC 8 5 PIN 1 INDEX AREA 0.65 0.60 0.55 EXPOSED PAD 0.40 0.35 0.30 4 TOP VIEW SEATING PLANE SIDE VIEW 0.05 MAX 0.02 NOM 0.30 0.25 0.20 0.35 BSC FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 0.20 REF 10-21-2015-A PKG-000000 1.00 0.90 0.80 1 BOTTOM VIEW Figure 15. 8-Lead Lead Frame Chip Scale Package [LFCSP] 2 mm × 2 mm Body and 0.90 mm Package Height (CP-8-26) Dimensions shown in millimeters ORDERING GUIDE Model1 HMC1055LP2CE Temperature Range −40°C to +85°C MSL Rating2 MSL1 Package Description 8-Lead Lead Frame Chip Scale Package [LFCSP] Package Option CP-8-26 HMC1055LP2CETR −40°C to +85°C MSL1 8-Lead Lead Frame Chip Scale Package [LFCSP] CP-8-26 EVAL01-HMC1055LP2C 1 2 3 Evaluation Board HMC1055LP2CE and HMC1055LP2CETR are RoHS compliant parts. See the Absolute Maximum Ratings section. XXXX is the 4-digit lot number. ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13718-0-2/16(A) Rev. A | Page 10 of 10 Branding3 H1055 XXXX H1055 XXXX