ON NCT72DMNR2G Temperature monitor with series resistance cancellation Datasheet

NCT72
+15C Temperature Monitor
with Series Resistance
Cancellation
The NCT72 is a dual-channel digital thermometer and
undertemperature/overtemperature alarm, intended for use in PCs and
thermal management systems. It is pin and register compatible with the
NCT1008 but the NCT72 allows the user to pull the ALERT pin to
1.8 V without increasing the device Idd. A feature of the NCT72 is
series resistance cancellation, where up to 1.5 kW (typical) of resistance
in series with the temperature monitoring diode can be automatically
cancelled from the temperature result, allowing noise filtering. The
NCT72 has a configurable ALERT output and an extended, switchable
temperature measurement range.
The NCT72 can measure the temperature of a remote thermal diode
accurate to ±1°C and the ambient temperature accurate to ±3°C. The
temperature measurement range defaults to 0°C to +127°C, compatible
with the NCT1008, but it can be switched to a wider measurement range
of −64°C to +191°C.
The NCT72 communicates over a 2-wire serial interface, compatible
with system management bus (SMBus/I2C) standards. The default
SMBus/I2C address of the NCT72 is 0x4C. An NCT72D is available
with an SMBus/I2C address of 0x4D. This is useful if more than one
NCT72 is used on the same SMBus/I2C.
An ALERT output signals when the on-chip or remote temperature is
out of range. The THERM output is a comparator output that allows
on/off control of a cooling fan. The ALERT output can be reconfigured
as a second THERM output, if required.
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WDFN8
CASE 511AT
PIN ASSIGNMENT
VDD
1
8
SCLK
D+
2
7
SDATA
D−
3
6
THERM
4
5
•
•
•
•
•
•
•
•
•
•
MARKING DIAGRAMS
1
7xMG
G
WDFN8
On-chip and Remote Temperature Sensor
0.25°C Resolution/1°C Accuracy on Remote Channel
1°C Resolution/1°C Accuracy on Local Channel
Series Resistance Cancellation Up to 1.5 kW
Extended, Switchable Temperature Measurement Range
0°C to +127°C (Default) or –64°C to +191°C
Pin and Register Compatible with NCT1008
Remote THERM Limit of 108°C
2-wire SMBus/I2C Serial Interface with SMBus Alert Support
Programmable Over/Undertemperature Limits
Offset Registers for System Calibration
Up to Two Overtemperature Fail-safe THERM Outputs
Small 8-lead DFN
240 mA Operating Current, 5 mA Standby Current
Compatible with 1.8 V Logic
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
June, 2017 − Rev. 5
7x
M
G
= Device Code (Where x = C or D)
= Date Code
= Pb-Free Package
(Note: Microdot may be in either location)
1
NCT
72x
ALYWG
G
8
DFN8
x
A
L
Y
W
G
= C or D
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
• Smart Phones
• Desktop and Notebook Computers
• Smart Batteries
© Semiconductor Components Industries, LLC, 2012
ALERT/
THERM2
GND
(Top View)
Features
•
•
•
•
•
DFN8
CASE 506BJ
See detailed ordering and shipping information in the package
dimensions section on page 18 of this data sheet.
1
Publication Order Number:
NCT72/D
NCT72
• Automotive
• Embedded Systems
D−
3
LOCAL TEMPERATURE
VALUE REGISTER
LOCAL TEMPERATURE
LOW-LIMIT REGISTER
A-TO-D
CONVERTER
ANALOG
MUX
BUSY
RUN/STANDBY
REMOTE TEMPERATURE
VALUE REGISTER
LOCAL TEMPERATURE
HIGH-LIMIT REGISTER
DIGITAL MUX
2
ADDRESS POINTER
REGISTER
LIMIT COMPARATOR
D+
CONVERSION RATE
REGISTER
DIGITAL MUX
ON-CHIP
TEMPERATURE
SENSOR
REMOTE OFFSET
REGISTER
REMOTE TEMPERATURE
LOW-LIMIT REGISTER
REMOTE TEMPERATURE
HIGH-LIMIT REGISTER
LOCAL THERM
LIMIT REGISTERS
EXTERNAL THERM
LIMIT REGISTERS
CONFIGURATION
REGISTERS
EXTERNAL DIODE OPEN-CIRCUIT
INTERRUPT
MASKING
STATUS REGISTER
NCT72
SMBus/I2C INTERFACE
1
5
7
8
4
VDD
GND
SDATA
SCLK
THERM
6
ALERT/THERM2
Figure 1. Functional Block Diagram
Table 1. PIN ASSIGNMENT
Pin No.
Mnemonic
1
VDD
Positive Supply, 2.8 V to 3.6 V.
Description
2
D+
Positive Connection to Remote Temperature Sensor.
3
D−
Negative Connection to Remote Temperature Sensor.
4
THERM
5
GND
6
ALERT/THERM2
7
SDATA
Logic Input/Output, SMBus Serial Data. Open-drain Output. Requires pullup resistor.
8
SCLK
Logic Input, SMBus Serial Clock. Requires pullup resistor.
Open-drain Output. Can be used to turn a fan on/off or throttle a CPU clock in the event of an
overtemperature condition. Requires pullup resistor.
Supply Ground Connection.
Open-drain Logic Output Used as Interrupt or SMBus ALERT. This can also be configured as a
second THERM output. Requires pullup resistor.
NOTE: The ground slug on 3x3 package can be left unconnected.
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2
NCT72
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Positive Supply Voltage (VDD) to GND
Rating
Unit
−0.3, +3.6
V
−0.3 to VDD + 0.3
V
D− to GND
−0.3 to +0.6
V
SCLK, SDATA, ALERT, THERM
−0.3 to +3.6
V
Input Current, SDATA, THERM
−1, +50
mA
D+
±1
mA
1,500
V
150
°C
−65 to +150
°C
Input Current, D−
ESD Rating, All Pins (Human Body Model)
Maximum Junction Temperature (TJ MAX)
Storage Temperature Range
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
NOTE: This device is ESD sensitive. Use standard ESD precautions when handling.
Table 3. THERMAL CHARACTERISTICS (Note 1)
Package Type
8-lead DFN
qJA
qJC
Unit
142
43.74
°C/W
1. qJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.
Table 4. SMBus/I2C TIMING SPECIFICATIONS (Note 1)
1.
2.
3.
4.
Parameter
Limit at TMIN and TMAX
Unit
fSCLK
400
kHz max
Description
−
tLOW
1.3
ms min
Clock Low Period, between 10% Points
tHIGH
0.6
ms min
Clock High Period, between 90% Points
tR
300
ns max
Clock/Data Rise Time
tF
300
ns max
Clock/Data Fall Time
tSU; STA
600
ns min
Start Condition Setup Time
tHD; STA (Note 2)
600
ns min
Start Condition Hold Time
tSU; DAT (Note 3)
100
ns min
Data Setup Time
tSU; STO (Note 4)
600
ns min
Stop Condition Setup Time
tBUF
1.3
ms min
Bus Free Time between Stop and Start Conditions
Guaranteed by design, but not production tested.
Time from 10% of SDATA to 90% of SCLK.
Time for 10% or 90% of SDATA to 10% of SCLK.
Time for 90% of SCLK to 10% of SDATA.
tF
t LOW
t HD; STA
tR
SCLK
t HD; STA
t HD; DAT
t HIGH
t SU; STA
t SU; DAT
t SU; STO
SDATA
t BUF
STOP START
START
Figure 2. Serial Bus Timing
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3
STOP
NCT72
Table 5. ELECTRICAL CHARACTERISTICS (TA = −40°C to +125°C, VDD = 2.8 V to 3.6 V, unless otherwise noted)
Conditions
Parameter
Min
Typ
Max
Unit
Power Supply
2.8
3.30
3.6
V
Average Operating Supply Current, IDD
0.0625 Conversions/Sec Rate (Note 1)
Standby Mode
−
−
240
5.0
350
30
mA
Undervoltage Lockout Threshold
VDD Input, Disables ADC, Rising Edge
−
2.55
−
V
1.0
−
2.56
V
−
−
−
−
±1.0
±1.5
°C
−
−
±2.5
Supply Voltage, VDD
Power-on Reset Threshold
Temperature-to-digital Converter
Local Sensor Accuracy
3.0 V to 3.6 V
0°C ≤ TA ≤ +70°C
0°C ≤ TA ≤ +85°C
Local Sensor Accuracy
2.8 V to 3.6 V
−20°C ≤ TA ≤ +110°C
°C
−
1.0
−
°C
Remote Diode Sensor Accuracy
3.0 V to 3.6 V
0°C ≤ TA ≤ +70°C, −55°C ≤ TD (Note 2) ≤ +150°C
0°C ≤ TA ≤ +85°C, −55°C ≤ TD (Note 2) ≤ +150°C
−40°C ≤ TA ≤ +100°C, −55°C ≤ TD (Note 2) ≤ +150°C
−
−
−
−
−
−
±1.0
±1.5
±2.5
°C
Remote Diode Sensor Accuracy
3.3 V
−20°C ≤ TA ≤ +70°C, −55°C ≤ TD ≤ +150°C
−
−
±1.0
°C
Remote Diode Sensor Accuracy
2.8 V to 3.6 V
0°C ≤ TA ≤ +70°C, −20°C ≤ TD ≤ +110°C
−20°C ≤ TA ≤ +110°C, TD = +40°C
−
−
−
−
±1.5
±2.25
°C
−
0.25
−
°C
Resolution
Resolution
Remote Sensor Source Current
High Level (Note 3)
Middle Level (Note 3)
Low Level (Note 3)
−
−
−
220
82
13.5
−
−
−
mA
Conversion Time
From Stop Bit to Conversion Complete, One-shot
Mode with Averaging Switched On
−
40
52
ms
One-shot Mode with Averaging Off
(That Is, Conversion Rate = 16-, 32-, or
64-conversions per Second)
−
6.0
8.0
ms
Resistance split evenly on both the D+ and D– inputs
−
1.5
−
kW
Maximum Series Resistance Cancelled
Open-drain Digital Outputs (THERM, ALERT/THERM2)
Output Low Voltage, VOL
IOUT = −6.0 mA
−
−
0.4
V
High Level Output Leakage Current, IOH
VOUT = VDD
−
0.1
1.0
mA
Logic Input High Voltage, VIH SCLK, SDATA
1.4
−
−
V
Logic Input Low Voltage, VIL SCLK, SDATA
−
−
0.8
V
−
500
−
mV
−
−
0.4
V
−1.0
−
+1.0
mA
−
5.0
−
pF
SMBus/I2C Interface (Note 3 and 4)
Hysteresis
SDA Output Low Voltage, VOL
IOUT = −6.0 mA
Logic Input Current, IIH, IIL
SMBus Input Capacitance, SCLK, SDATA
SMBus Clock Frequency
1.
2.
3.
4.
5.
−
−
400
kHz
SMBus Timeout (Note 5)
User Programmable
−
25
64
ms
SCLK Falling Edge to SDATA Valid Time
Master Clocking in Data
−
−
1.0
ms
See Table 9 for information on other conversion rates.
Guaranteed by characterization, but not production tested.
Guaranteed by design, but not production tested.
See SMBus/I2C Timing Specifications section for more information.
Disabled by default. Detailed procedures to enable it are in the Serial Bus Interface section of the datasheet.
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4
NCT72
TYPICAL PERFORMANCE CHARACTERISTICS
3.5
DEV 1
DEV 2
DEV 3
DEV 4
DEV 5
DEV 6
DEV 7
3.0
2.5
2.0
DEV 8
DEV 9
DEV 10
DEV 11
DEV 12
DEV 13
DEV 14
DEV 15
DEV 16
MEAN
HIGH 4R
LOW 4R
TEMPERATURE ERROR (°C)
TEMPERATURE ERROR (°C)
3.5
1.5
1.0
0.5
0
−0.5
DEV 1
DEV 2
DEV 3
DEV 4
DEV 5
DEV 6
DEV 7
3.0
2.5
2.0
DEV 15
DEV 16
HIGH 4R
LOW 4R
1.5
1.0
0.5
0
−0.5
−1.0
−50
0
50
100
−1.0
−50
150
0
TEMPERATURE (°C)
50
100
150
TEMPERATURE (°C)
Figure 3. Local Temperature Error vs. Temperature
Figure 4. Remote Temperature Error vs. Actual
Temperature
10
0
5
TEMPERATURE ERROR (°C)
TEMPERATURE ERROR (°C)
DEV 8
DEV 9
DEV 10
DEV 11
DEV 12
DEV 13
DEV 14
D+ To GND
0
−5
−10
D+ To VDD
−15
−20
−2
−4
−6
−8
−10
DEV 3
−12
DEV 2
−14
DEV 4
−16
−25
−18
1
10
100
0
5
LEAKAGE RESISTANCE (MW)
Figure 5. Temperature Error vs. D+/D− Leakage
Resistance
1000
10
15
20
25
CAPACITANCE (nF)
Figure 6. Temperature Error vs. D+/D− Capacitance
422
DEV 2BC
900
420
DEV 2BC
800
418
600
500
IDD (mA)
IDD (mA)
700
DEV 4BC
400
414
DEV 3BC
DEV 4BC
DEV 3BC
300
416
412
200
410
100
0
0.01
0.1
1
10
408
3.0
100
CONVERSION RATE (Hz)
3.1
3.2
3.3
3.4
3.5
3.6
VDD (V)
Figure 7. Operating Supply Current vs.
Conversion Rate
Figure 8. Operating Supply Current vs. Voltage
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NCT72
TYPICAL PERFORMANCE CHARACTERISTICS (Cont’d)
4.4
35
DEV 2BC
DEV 3BC
DEV 4BC
DEV 2
4.2
30
25
DEV 3
ISTBY (mA)
IDD (mA)
4.0
3.8
DEV 4
3.6
20
15
3.4
10
3.2
5
3.0
3.0
0
3.1
3.2
3.3
3.4
3.5
1
3.6
10
VDD (V)
Figure 9. Standby Supply Current vs. Voltage
1000
Figure 10. Standby Supply Current vs. Clock
Frequency
80
TEMPERATURE ERROR (°C)
25
TEMPERATURE ERROR (°C)
100
FSCL (kHz)
20
100 mV
15
10
50 mV
20 mV
5
70
100 mV
60
50
40
30
50 mV
20
10
20 mV
0
−10
0
0
100
200
300
400
500
0
600
100
200
Figure 11. Temperature Error vs. Common-mode
Noise Frequency
TEMPERATURE ERROR (°C)
400
500
600
Figure 12. Temperature Error vs. Differential-mode
Noise Frequency
60
50
40
30
20
10
0
0
300
NOISE FREQUENCY (MHz)
NOISE FREQUENCY (MHz)
500
1000
1500
2000
SERIES RESISTANCE (W)
Figure 13. Temperature Error vs. Series Resistance
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6
NCT72
Theory of Operation
Temperature Measurement Method
The NCT72 is a local and remote temperature sensor and
over/under temperature alarm, with the added ability to
automatically cancel the effect of 1.5 kW (typical) of
resistance in series with the temperature monitoring diode.
When the NCT72 is operating normally, the on-board ADC
operates in a free running mode. The analog input
multiplexer alternately selects either the on-chip
temperature sensor to measure its local temperature or the
remote temperature sensor. The ADC digitizes these signals
and the results are stored in the local and remote temperature
value registers.
The local and remote measurement results are compared
with the corresponding high, low, and THERM temperature
limits, stored in eight on-chip registers. Out-of-limit
comparisons generate flags that are stored in the status
register. A result that exceeds the high temperature limit or
the low temperature limit causes the ALERT output to
assert. The ALERT output also asserts if an external diode
fault is detected. Exceeding the THERM temperature limits
causes the THERM output to assert low. The ALERT output
can be reprogrammed as a second THERM output.
The limit registers are programmed and the device
controlled and configured via the serial SMBus. The
contents of any register are also read back via the SMBus.
Control and configuration functions consist of switching
the device between normal operation and standby mode,
selecting the temperature measurement range, masking or
enabling the ALERT output, switching Pin 6 between
ALERT and THERM2, and selecting the conversion rate.
A simple method of measuring temperature is to exploit
the negative temperature coefficient of a diode, measuring
the base emitter voltage (VBE) of a transistor operated at
constant current. However, this technique requires
calibration to null the effect of the absolute value of VBE,
which varies from device to device.
The technique used in the NCT72 measures the change in
VBE when the device operates at three different currents.
Previous devices used only two operating currents, but it is
the use of a third current that allows automatic cancellation
of resistances in series with the external temperature sensor.
Figure 14 shows the input signal conditioning used to
measure the output of an external temperature sensor. This
figure shows the external sensor as a substrate transistor, but
it can equally be a discrete transistor. If a discrete transistor
is used, the collector is not grounded but is linked to the base.
To prevent ground noise interfering with the measurement,
the more negative terminal of the sensor is not referenced to
ground, but is biased above ground by an internal diode at
the D− input. C1 may be added as a noise filter
(a recommended maximum value of 1,000 pF). However, a
better option in noisy environments is to add a filter, as
described in the Noise Filtering section. See the Layout
Considerations section for more information on C1.
To measure DVBE, the operating current through the
sensor is switched among three related currents. As shown
in Figure 14, N1 × I and N2 × I are different multiples of the
current, I. The currents through the temperature diode are
switched between I and N1 × I, giving DVBE1; and then
between I and N2 × I, giving DVBE2. The temperature is
then calculated using the two DVBE measurements. This
method also cancels the effect of any series resistance on the
temperature measurement.
The resulting DVBE waveforms are passed through a
65 kHz low-pass filter to remove noise and then to a
chopper-stabilized amplifier. This amplifies and rectifies the
waveform to produce a dc voltage proportional to DVBE.
The ADC digitizes this voltage producing a temperature
measurement. To reduce the effects of noise, digital filtering
is performed by averaging the results of 16 measurement
cycles for low conversion rates. At rates of 16-, 32-, and
64-conversions/second, no digital averaging occurs.
Signal conditioning and measurement of the internal
temperature sensor are performed in the same manner.
Series Resistance Cancellation
Parasitic resistance to the D+ and D− inputs to the NCT72,
seen in series with the remote diode, is caused by a variety
of factors, including PCB track resistance and track length.
This series resistance appears as a temperature offset in the
remote sensor’s temperature measurement. This error
typically causes a 0.5°C offset per ohm of parasitic
resistance in series with the remote diode.
The NCT72 automatically cancels the effect of this series
resistance on the temperature reading, giving a more
accurate result, without the need for user characterization of
this resistance. The NCT72 is designed to automatically
cancel typically up to 1.5 kW of resistance. By using an
advanced temperature measurement method, this process is
transparent to the user. This feature permits resistances to be
added to the sensor path to produce a filter, allowing the part
to be used in noisy environments. See the section on Noise
Filtering for more details.
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NCT72
I
N1 × I
N2 × I
VDD
IBIAS
VOUT+
D+
REMOTE
SENSING
TRANSISTOR
To ADC
C1*
D−
VOUT−
BIAS
DIODE
LOW-PASS FILTER
fC = 65 kHz
*CAPACITOR C1 IS OPTIONAL. IT IS ONLY NECESSARY IN NOISY ENVIRONMENTS. C1 = 1,000 pF MAX.
Figure 14. Input Signal Conditioning
Temperature Measurement Results
The extended temperature range is selected by setting
Bit 2 of the configuration register to 1. The temperature
range is 0°C to 127°C when Bit 2 equals 0. A valid result is
available in the next measurement cycle after changing the
temperature range.
In extended temperature mode, the upper and lower
temperature that can be measured by the NCT72 is limited
by the remote diode selection. The temperature registers can
have values from −64°C to +191°C. However, most
temperature sensing diodes have a maximum temperature
range of −55°C to +150°C. Above +150°C, they may lose
their semiconductor characteristics and approximate
conductors instead. This results in a diode short. In this case,
a read of the temperature result register gives the last good
temperature measurement. Therefore, the temperature
measurement on the external channel may not be accurate
for temperatures that are outside the operating range of the
remote sensor.
It should be noted that although both local and remote
temperature measurements can be made while the part is in
extended temperature mode, the NCT72 itself should not be
exposed to temperatures greater than those specified in the
absolute maximum ratings section. Further, the device is
only guaranteed to operate as specified at ambient
temperatures from −40°C to +120°C.
The results of the local and remote temperature
measurements are stored in the local and remote temperature
value registers and compared with limits programmed into
the local and remote high and low limit registers.
The local temperature value is in Register 0x00 and has a
resolution of 1°C. The external temperature value is stored
in two registers, with the upper byte in Register 0x01 and the
lower byte in Register 0x10. Only the two MSBs in the
external temperature low byte are used giving the external
temperature measurement a resolution of 0.25°C. Table 6
lists the data format for the external temperature low byte.
Table 6. EXTENDED TEMPERATURE RESOLUTION
(REMOTE TEMPERATURE LOW BYTE)
Extended Resolution
Remote Temperature
Low Byte
0.00°C
0 000 0000
0.25°C
0 100 0000
0.50°C
1 000 0000
0.75°C
1 100 0000
When reading the full external temperature value, read the
LSB first. This causes the MSB to be locked (that is, the
ADC does not write to it) until it is read. This feature ensures
that the results read back from the two registers come from
the same measurement.
Temperature Data Format
The NCT72 has two temperature data formats. When the
temperature measurement range is from 0°C to 127°C
(default), the temperature data format for both internal and
external temperature results is binary. When the
measurement range is in extended mode, an offset binary
data format is used for both internal and external results.
Temperature values are offset by 64°C in the offset binary
data format. Examples of temperatures in both data formats
are shown in Table 7.
Temperature Measurement Range
The temperature measurement range for both internal and
external measurements is, by default, 0°C to +127°C.
However, the NCT72 can be operated using an extended
temperature range. The extended measurement range is
−64°C to +191°C. Therefore, the NCT72 can be used to
measure the full temperature range of an external diode,
from −55°C to +150°C.
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8
NCT72
Temperature Value Registers
Table 7. TEMPERATURE DATA FORMAT
(TEMPERATURE HIGH BYTE)
The NCT72 has three registers to store the results of local
and remote temperature measurements. These registers can
only be written to by the ADC and can be read by the user
over the SMBus/I2C. The local temperature value register is
at Address 0x00.
The external temperature value high byte register is at
Address 0x01, with the low byte register at Address 0x10.
The power-on default for all three registers is 0x00.
Offset Binary
(Note 1)
Temperature
Binary
–55°C
0 000 0000
(Note 2)
0 000 1001
0°C
0 000 0000
0 100 0000
+1°C
0 000 0001
0 100 0001
+10°C
0 000 1010
0 100 1010
+25°C
0 001 1001
0 101 1001
+50°C
0 011 0010
0 111 0010
+75°C
0 100 1011
1 000 1011
+100°C
0 110 0100
1 010 0100
+125°C
0 111 1101
1 011 1101
+127°C
0 111 1111
1 011 1111
+150°C
0 111 1111
(Note 3)
1 101 0110
Configuration Register
The configuration register is Address 0x03 at read and
Address 0x09 at write. Its power-on default is 0x00. Only
four bits of the configuration register are used. Bit 0, Bit 1,
Bit 3, and Bit 4 are reserved; the user does not write to them.
Bit 7 of the configuration register masks the ALERT
output. If Bit 7 is 0, the ALERT output is enabled. This is the
power-on default. If Bit 7 is set to 1, the ALERT output is
disabled. This applies only if Pin 6 is configured as ALERT.
If Pin 6 is configured as THERM2, then the value of Bit 7
has no effect.
If Bit 6 is set to 0, which is power-on default, the device
is in operating mode with ADC converting. If Bit 6 is set to
1, the device is in standby mode and the ADC does not
convert. The SMBus does, however, remain active in
standby mode; therefore, values can be read from or written
to the NCT72 via the SMBus. The ALERT and THERM
outputs are also active in standby mode. Changes made to
the registers in standby mode that affect the THERM or
ALERT outputs cause these signals to be updated.
Bit 5 determines the configuration of Pin 6 on the NCT72.
If Bit 5 is 0 (default), then Pin 6 is configured as an ALERT
output. If Bit 5 is 1, then Pin 6 is configured as a THERM2
output. Bit 7, the ALERT mask bit, is only active when Pin 6
is configured as an ALERT output. If Pin 6 is set up as a
THERM2 output, then Bit 7 has no effect.
Bit 2 sets the temperature measurement range. If Bit 2 is
0 (default value), the temperature measurement range is set
between 0°C to +127°C. Setting Bit 2 to 1 sets the
measurement range to the extended temperature range
(−64°C to +191°C).
1. Offset binary scale temperature values are offset by 64°C.
2. Binary scale temperature measurement returns 0°C for all
temperatures < 0°C.
3. Binary scale temperature measurement returns 127°C for all
temperatures > 127°C.
The user can switch between measurement ranges at any
time. Switching the range likewise switches the data format.
The next temperature result following the switching is
reported back to the register in the new format. However, the
contents of the limit registers do not change. It is up to the
user to ensure that when the data format changes, the limit
registers are reprogrammed as necessary. More information
on this is found in the Limit Registers section.
NCT72 Registers
The NCT72 contains 22, 8-bit registers in total. These
registers store the results of remote and local temperature
measurements, high and low temperature limits, and
configure and control the device. See the Address Pointer
Register section through the Consecutive ALERT Register
section of this data sheet for more information on the NCT72
registers. Additional details are shown in Table 8 through
Table 12. The entire register map is available in Table 13.
Table 8. CONFIGURATION REGISTER BIT
ASSIGNMENTS
Address Pointer Register
The address pointer register itself does not have, nor does
it require, an address because the first byte of every write
operation is automatically written to this register. The data
in this first byte always contains the address of another
register on the NCT72 that is stored in the address pointer
register. It is to this register address that the second byte of
a write operation is written, or to which a subsequent read
operation is performed.
The power-on default value of the address pointer register
is 0x00. Therefore, if a read operation is performed
immediately after power-on, without first writing to the
address pointer, the value of the local temperature is returned
because its register address is 0x00.
Bit
Function
Power-on
Default
7
MASK1
0 = ALERT Enabled
1 = ALERT Masked
0
6
RUN/STOP
0 = Run
1 = Standby
0
5
ALERT/
THERM2
0 = ALERT
1 = THERM2
0
4, 3
Reserved
2
1, 0
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9
Name
Temperature
Range Select
Reserved
0
0 = 0°C to 127°C
1 = Extended Range
0
0
NCT72
Conversion Rate Register
provided that applies to both THERM channels. This
hysteresis value can be reprogrammed to any value after
powerup (Register Address 0x21).
It is important to remember that the temperature limits
data format is the same as the temperature measurement data
format. Therefore, if the temperature measurement uses
default binary, then the temperature limits also use the
binary scale. If the temperature measurement scale is
switched, however, the temperature limits do not
automatically switch. The user must reprogram the limit
registers to the desired value in the correct data format. For
example, if the remote low limit is set at 10°C with the
default binary scale, the limit register value is 0000 1010b.
If the scale is switched to offset binary, the value in the low
temperature limit register needs to be reprogrammed to
0100 1010b.
The conversion rate register is Address 0x04 at read and
Address 0x0A at write. The lowest four bits of this register
are used to program the conversion rate by dividing the
internal oscillator clock by 1, 2, 4, 8, 16, 32, 64, 128, 256,
512, or 1024 to give conversion times from 15.5 ms
(Code 0x0A) to 16 seconds (Code 0x00). For example, a
conversion rate of eight conversions per second means that
beginning at 125 ms intervals, the device performs a
conversion on the internal and the external temperature
channels.
The conversion rate register can be written to and read
back over the SMBus/I2C. The higher four bits of this
register are unused and must be set to 0. The default value
of this register is 0x08, giving a rate of 16 conversions per
second. Use of slower conversion times greatly reduces the
device power consumption.
Status Register
The status register is a read-only register at Address 0x02.
It contains status information for the NCT72.
When Bit 7 of the status register is high, it indicates that
the ADC is busy converting. The other bits in this register
flag the out-of-limit temperature measurements (Bit 6 to
Bit 3, and Bit 1 to Bit 0) and the remote sensor open circuit
(Bit 2).
If Pin 6 is configured as an ALERT output, the following
applies: If the local temperature measurement exceeds its
limits, Bit 6 (high limit) or Bit 5 (low limit) of the status
register asserts to flag this condition. If the remote
temperature measurement exceeds its limits, then Bit 4
(high limit) or Bit 3 (low limit) asserts. Bit 2 asserts to flag
an open circuit condition on the remote sensor. These five
flags are NOR’ed together, so if any of them is high, the
ALERT interrupt latch is set and the ALERT output goes
low.
Reading the status register clears the five flags, Bit 6 to
Bit 2, provided the error conditions causing the flags to be
set have gone away. A flag bit can be reset only if the
corresponding value register contains an in-limit
measurement or if the sensor is good.
The ALERT interrupt latch is not reset by reading the
status register. It resets when the ALERT output has been
serviced by the master reading the device address, provided
the error condition has gone away and the status register flag
bits are reset.
When Flag 1 and/or Flag 0 are set, the THERM output
goes low to indicate that the temperature measurements are
outside the programmed limits. The THERM output does
not need to be reset, unlike the ALERT output. Once the
measurements are within the limits, the corresponding status
register bits are automatically reset and the THERM output
goes high. The user may add hysteresis by programming
Register 0x21. The THERM output is reset only when the
temperature falls to limit value minus the hysteresis value.
When Pin 6 is configured as THERM2, only the high
temperature limits are relevant. If Flag 6 and/or Flag 4 are
Table 9. CONVERSION RATE REGISTER CODES
Code
Conversion/Second
Time
0x00
0.0625
16 s
0x01
0.125
8s
0x02
0.25
4s
0x03
0.5
2s
0x04
1
1s
0x05
2
500 ms
0x06
4
250 ms
0x07
8
125 ms
0x08
16
62.5 ms
0x09
32
31.25 ms
0x0A
64
15.5 ms
0x0B to 0xFF
Reserved
−
Limit Registers
The NCT72 has eight limit registers: high, low, and
THERM temperature limits for both local and remote
temperature measurements. The remote temperature high
and low limits span two registers each, to contain an upper
and lower byte for each limit. There is also a THERM
hysteresis register. All limit registers can be written to, and
read back over, the SMBus. See Table 13 for details of the
limit register addresses and their power-on default values.
When Pin 6 is configured as an ALERT output, the high
limit registers perform a > comparison, while the low limit
registers perform a ≤ comparison. For example, if the high
limit register is programmed with 80°C, then measuring
81°C results in an out-of-limit condition, setting a flag in the
status register. If the low limit register is programmed with
0°C, measuring 0°C or lower results in an out-of-limit
condition.
Exceeding either the local or remote THERM limit asserts
THERM low. When Pin 6 is configured as THERM2,
exceeding either the local or remote high limit asserts
THERM2 low. A default hysteresis value of 10°C is
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10
NCT72
set, the THERM2 output goes low to indicate that the
temperature measurements are outside the programmed
limits. Flag 5 and Flag 3 have no effect on THERM2. The
behavior of THERM2 is otherwise the same as THERM.
Table 11. SAMPLE OFFSET REGISTER CODES
Offset Value
0x11
0x12
−128°C
1000 0000
00 00 0000
−4°C
1111 1100
00 00 0000
−1°C
1111 1111
00 000000
−0.25°C
1111 1111
10 00 0000
0°C
0000 0000
00 00 0000
+0.25°C
0000 0000
01 00 0000
+1°C
0000 0001
00 00 0000
+4°C
0000 0100
00 00 0000
+127.75°C
0111 1111
11 00 0000
Table 10. STATUS REGISTER BIT ASSIGNMENTS
Bit
Name
7
BUSY
6
LHIGH
(Note 1)
Function
1 when ADC Is Converting
1 when Local High Temperature Limit is
Tripped
5
LLOW
(Note 1)
1 when Local Low Temperature Limit is
Tripped
4
RHIGH
(Note 1)
1 when Remote High Temperature Limit
is Tripped
3
RLOW
(Note 1)
1 when Remote Low Temperature Limit
is Tripped
2
OPEN
(Note 1)
1 when Remote Sensor is an Open
Circuit
1
RTHRM
1 when Remote THERM Limit is Tripped
0
LTHRM
1 when Local THERM Limit is Tripped
One-shot Register
1. These flags stay high until the status register is read or they are
reset by POR unless Pin 6 is configured as THERM2. Then, only
Bit 2 remains high until the status register is read or is reset by
POR.
The one-shot register is used to initiate a conversion and
comparison cycle when the NCT72 is in standby mode, after
which the device returns to standby. Writing to the one-shot
register address (0x0F) causes the NCT72 to perform a
conversion and comparison on both the internal and the
external temperature channels. This is not a data register as
such, and it is the write operation to Address 0x0F that
causes the one-shot conversion. The data written to this
address is irrelevant and is not stored.
Offset Register
Consecutive ALERT Register
Offset errors can be introduced into the remote
temperature measurement by clock noise or when the
thermal diode is located away from the hot spot. To achieve
the specified accuracy on this channel, these offsets must be
removed.
The offset value is stored as a 10-bit, twos complement
value in Register 0x11 (high byte) and Register 0x12 (low
byte, left justified). Only the upper two bits of Register 0x12
are used. The MSB of Register 0x11 is the sign bit. The
minimum, programmable offset is −128°C, and the
maximum is +127.75°C. The value in the offset register is
added to, or subtracted from, the measured value of the
remote temperature.
The offset register powers up with a default value of 0°C
and has no effect unless the user writes a different value to
it.
The value written to this register determines how many
out-of-limit measurements must occur before an ALERT is
generated. The default value is that one out-of-limit
measurement generates an ALERT. The maximum value
that can be chosen is 4. The purpose of this register is to
allow the user to perform some filtering of the output. This
is particularly useful at the fastest three conversion rates,
where no averaging takes place. This register is at
Address 0x22.
Table 12. CONSECUTIVE ALERT REGISTER CODES
NOTE:
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11
Register Value
Number of Out-of-limit
Measurements Required
yxxx 000x
1
yxxx 001x
2
yxxx 011x
3
yxxx 111x
4
x = don’t care bits, and y = SMBus timeout bit.
Default = 0. See SMBus section for more information.
NCT72
Table 13. LIST OF REGISTERS
Read Address (Hex)
Write Address (Hex)
Not Applicable
Not Applicable
Address Pointer
Name
Undefined
Power-on Default
00
Not Applicable
Local Temperature Value
0000 0000 (0x00)
01
Not Applicable
External Temperature Value High Byte
0000 0000 (0x00)
02
Not Applicable
Status
Undefined
03
09
Configuration
0000 0000 (0x00)
04
0A
Conversion Rate
0000 1000 (0x08)
05
0B
Local Temperature High Limit
0101 0101 (0x55) (85°C)
06
0C
Local Temperature Low Limit
0000 0000 (0x00) (0°C)
07
0D
External Temperature High Limit High Byte
0101 0101 (0x55) (85°C)
08
0E
External Temperature Low Limit High Byte
0000 0000 (0x00) (0°C)
Not Applicable
0F (Note 1)
10
Not Applicable
One-shot
External Temperature Value Low Byte
0000 0000
11
11
External Temperature Offset High Byte
0000 0000
12
12
External Temperature Offset Low Byte
0000 0000
13
13
External Temperature High Limit Low Byte
0000 0000
14
14
External Temperature Low Limit Low Byte
0000 0000
19
19
External THERM Limit
0110 1100 (0x6C) (108°C)
20
20
Local THERM Limit
0101 0101 (0x55) (85°C)
21
21
THERM Hysteresis
0000 1010 (0x0A) (10°C)
22
22
Consecutive ALERT
0000 0001 (0x01)
FE
Not Applicable
Manufacturer ID
0100 0001 (0x41)
1. Writing to Address 0x0F causes the NCT72 to perform a single measurement. It is not a data register, and it does not matter what data is
written to it.
Serial Bus Interface
slave peripherals connected to the serial bus
respond to the start condition and shift in the next
eight bits, consisting of a 7-bit address (MSB first)
plus an R/W bit, which determines the direction of
the data transfer, that is, whether data is written to,
or read from, the slave device. The peripheral
whose address corresponds to the transmitted
address responds by pulling the data line low
during the low period before the ninth clock pulse,
known as the acknowledge bit. All other devices
on the bus remain idle while the selected device
waits for data to be read from or written to it. If the
R/W bit is a 0, the master writes to the slave
device. If the R/W bit is a 1, the master reads from
the slave device.
2. Data is sent over the serial bus in a sequence of
nine clock pulses, eight bits of data followed by an
acknowledge bit from the slave device. Transitions
on the data line must occur during the low period
of the clock signal and remain stable during the
high period, since a low-to-high transition when
the clock is high can be interpreted as a stop
signal. The number of data bytes that can be
transmitted over the serial bus in a single read or
write operation is limited only by what the master
and slave devices can handle.
Control of the NCT72 is carried out via the serial bus. The
NCT72 is connected to this bus as a slave device, under the
control of a master device.
The NCT72 has an SMBus/I2C timeout feature. When this
is enabled, the SMBus/I2C times out after typically 25 ms of
no activity. However, this feature is not enabled by default.
Bit 7 of the consecutive alert register (Address = 0x22)
should be set to enable it.
Addressing the Device
In general, every SMBus/I2C device has a 7-bit device
address, except for some devices that have extended 10-bit
addresses. When the master device sends a device address
over the bus, the slave device with that address responds.
The NCT72 is available with one device address, 0x4C
(1001 100b). An NCT72D is also available.
The NCT72D has an SMBus/I2C address of 0x4D
(1001 101b). This is to allow two NCT72 devices on the
same bus, or if the default address conflicts with an existing
device on the SMBus/I2C. The serial bus protocol operates
as follows:
1. The master initiates a data transfer by establishing
a start condition, defined as a high-to-low
transition on SDATA, the serial data line, while
SCLK, the serial clock line, remains high. This
indicates that an address/data stream follows. All
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NCT72
write operations contain either one or two bytes,
while read operations contain one byte.
3. When all data bytes have been read or written,
stop conditions are established. In write mode, the
master pulls the data line high during the tenth
clock pulse to assert a stop condition. In read
mode, the master device overrides the
acknowledge bit by pulling the data line high
during the low period before the ninth clock pulse.
This is known as no acknowledge. The master
takes the data line low during the low period
before the tenth clock pulse, then high during the
tenth clock pulse to assert a stop condition.
Any number of bytes of data are transferable over
the serial bus in one operation, but it is not
possible to mix read and write in one operation
because the type of operation is determined at the
beginning and cannot subsequently be changed
without starting a new operation. For the NCT72,
To write data to one of the device data registers, or to read
data from it, the address pointer register must be set so that
the correct data register is addressed. The first byte of a write
operation always contains a valid address that is stored in the
address pointer register. If data is to be written to the device,
the write operation contains a second data byte that is written
to the register selected by the address pointer register.
This procedure is illustrated in Figure 15. The device
address is sent over the bus followed by R/W set to 0. This
is followed by two data bytes. The first data byte is the
address of the internal data register to be written to, which
is stored in the address pointer register. The second data byte
is the data to be written to the internal data register.
1
9
9
1
SCLK
A6
SDATA
A5
START BY
MASTER
A4
A3
A2
A1
R/W
A0
D7
FRAME 1
SERIAL BUS ADDRESS BYTE
D6
D5
D4
D3
D2
D1
D0
ACK. BY
NCT72
FRAME 2
ADDRESS POINTER REGISTER BYTE
ACK. BY
NCT72
1
9
SCLK (CONTINUED)
SDATA (CONTINUED)
D7
D6
D5
D4
D3
D2
D1
FRAME 3
DATA BYTE
D0
ACK. BY STOP BY
NCT72 MASTER
Figure 15. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
1
9
9
1
SCLK
SDATA
A6
START BY
MASTER
A5
A4
A3
A2
A1
A0
FRAME 1
SERIAL BUS ADDRESS BYTE
R/W
D7
ACK. BY
NCT72
D6
D5
D4
D3
D2
D1
D0
ACK. BY
NCT72
FRAME 2
ADDRESS POINTER REGISTER BYTE
STOP BY
MASTER
Figure 16. Writing to the Address Pointer Register Only
9
1
1
9
SCLK
SDATA
A6
START BY
MASTER
A5
A4
A3
A2
A1
A0 R/W
FRAME 1
SERIAL BUS ADDRESS BYTE
D7
ACK. BY
NCT72
D6
D5
D4
D3
D2
D0
ACK. BY
NCT72
FRAME 2
ADDRESS POINTER REGISTER BYTE
Figure 17. Reading Data from a Previously Selected Register
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13
D1
STOP BY
MASTER
NCT72
When reading data from a register there are two
possibilities.
• If the address pointer register value of the NCT72 is
unknown or not the desired value, it is first necessary to
set it to the correct value before data can be read from
the desired data register. This is done by writing to the
NCT72 as before, but only the data byte containing the
register read address is sent, because data is not to be
written to the register see Figure 16.
A read operation is then performed consisting of the
serial bus address, R/W bit set to 1, followed by the
data byte read from the data register see Figure 17.
• If the address pointer register is known to be at the
desired address, data can be read from the corresponding
data register without first writing to the address pointer
register and the bus transaction shown in Figure 16 can
be omitted.
1. SMBALERT is pulled low.
2. Master initiates a read operation and sends the
alert response address (ARA = 0001 100). This is
a general call address that must not be used as a
specific device address.
3. The device whose ALERT output is low responds
to the alert response address and the master reads
its device address. As the device address is seven
bits, an LSB of 1 is added. The address of the
device is now known and it can be interrogated in
the usual way.
4. If more than one device’s ALERT output is low,
the one with the lowest device address takes
priority, in accordance with normal SMBus
arbitration.
Once the NCT72 has responded to the alert response
address, it resets its ALERT output, provided that the error
condition that caused the ALERT no longer exists. If the
SMBALERT line remains low, the master sends the ARA
again, and so on until all devices whose ALERT outputs
were low have responded.
NOTES:It is possible to read a data byte from a data register without
first writing to the address pointer register. However, if the
address pointer register is already at the correct value, it is
not possible to write data to a register without writing to the
address pointer register because the first data byte of a write
is always written to the address pointer register.
Low Power Standby Mode
The NCT72 can be put into low power standby mode by
setting Bit 6 of the configuration register. When Bit 6 is low,
the NCT72 operates normally. When Bit 6 is high, the ADC
is inhibited, and any conversion in progress is terminated
without writing the result to the corresponding value
register. However, the SMBus is still enabled. Power
consumption in the standby mode is reduced to 5 mA if there
is no SMBus activity, or 30 mA if there are clock and data
signals on the bus.
When the device is in standby mode, it is possible to
initiate a one-shot conversion of both channels by writing to
the one-shot register (Address 0x0F), after which the device
returns to standby. It does not matter what is written to the
one-shot register, all data written to it is ignored. It is also
possible to write new values to the limit register while in
standby mode. If the values stored in the temperature value
registers are outside the new limits, an ALERT is generated,
even though the NCT72 is still in standby.
Some of the registers have different addresses for read and
write operations. The write address of a register must be
written to the address pointer if data is to be written to that
register, but it may not be possible to read data from that
address. The read address of a register must be written to
the address pointer before data can be read from that
register.
ALERT Output
This is applicable when Pin 6 is configured as an ALERT
output. The ALERT output goes low whenever an
out-of-limit measurement is detected, or if the remote
temperature sensor is open circuit. It is an open-drain output
and requires a pullup resistor to VDD. Several ALERT outputs
can be wire-OR’ed together, so that the common line goes
low if one or more of the ALERT outputs goes low.
The ALERT output can be used as an interrupt signal to a
processor, or as an SMBALERT. Slave devices on the SMBus
cannot normally signal to the bus master that they want to
talk, but the SMBALERT function allows them to do so.
One or more ALERT outputs can be connected to a
common SMBALERT line that is connected to the master.
When the SMBALERT line is pulled low by one of the
devices, the following procedure occurs (see Figure 18):
1.8 V Logic Operation
The NCT72 is 1.8 V logic compatible; this means that the
communication lines (SDA and SCL) ALERT/THERM2
and THERM can be pulled up to a 1.8 V supply while still
remaining within the device Idd spec.
MASTER RECEIVES SMBALERT
START
ALERT RESPONSE
ADDRESS
MASTER SENDS
ARA AND READ
COMMAND
RD ACK
DEVICE
ADDRESS
Sensor Fault Detection
NO
STOP
ACK
At its D+ input, the NCT72 contains internal sensor fault
detection circuitry. This circuit can detect situations where
an external remote diode is either not connected or
incorrectly connected to the NCT72. A simple voltage
comparator trips if the voltage at D+ exceeds VDD − 1.0 V
(typical), signifying an open circuit between D+ and D−.
The output of this comparator is checked when a conversion
is initiated. Bit 2 of the status register (open flag) is set if a
DEVICE SENDS
ITS ADDRESS
Figure 18. Use of SMBALERT
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14
NCT72
risen. The user can use the THERM output to turn on a fan
to cool the system, if the temperature continues to increase.
This method ensures that there is a fail-safe mechanism to
cool the system, without the need for host intervention.
fault is detected. If the ALERT pin is enabled, setting this
flag causes ALERT to assert low.
If the user does not wish to use an external sensor with the
NCT72, tie the D+ and D− inputs together to prevent
continuous setting of the open flag.
TEMPERATURE
1005C
The NCT72 Interrupt System
905C
The NCT72 has two interrupt outputs, ALERT and
THERM. Both have different functions and behavior.
ALERT is maskable and responds to violations of software
programmed temperature limits or an open-circuit fault on
the external diode. THERM is intended as a fail-safe
interrupt output that cannot be masked.
If the external or local temperature exceeds the
programmed high temperature limits, or equals or exceeds
the low temperature limits, the ALERT output is asserted
low. An open-circuit fault on the external diode also causes
ALERT to assert. ALERT is reset when serviced by a master
reading its device address, provided the error condition has
gone away and the status register has been reset.
The THERM output asserts low if the external or local
temperature exceeds the programmed THERM limits.
THERM temperature limits should normally be equal to or
greater than the high temperature limits. THERM is reset
automatically when the temperature falls back within the
THERM limit. A hysteresis value can be programmed; in
which case, THERM resets when the temperature falls to the
limit value minus the hysteresis value. This applies to both
local and remote measurement channels. The power-on
hysteresis default value is 10°C, but this can be
reprogrammed to any value after powerup.
The hysteresis loop on the THERM outputs is useful when
THERM is used, for example, as an on/off controller for a
fan. The user’s system can be set up so that when THERM
asserts, a fan is switched on to cool the system. When
THERM goes high again, the fan can be switched off.
Programming a hysteresis value protects from fan jitter,
where the temperature hovers around the THERM limit, and
the fan is constantly switched.
THERM LIMIT
805C
THERM LIMIT − HYSTERESIS
705C
HIGH TEMP LIMIT
605C
505C
405C
RESET BY MASTER
ALERT
1
2
• If the measured temperature exceeds the high
temperature limit, the ALERT output asserts low.
• If the temperature continues to increase and exceeds the
•
•
•
•
•
Binary Representation
0°C
0 000 0000
1°C
0 000 0001
10°C
0 000 1010
3
Figure 19. Operation of the ALERT and THERM
Interrupts
Table 14. THERM HYSTERESIS
THERM Hysteresis
4
THERM
THERM limit, the THERM output asserts low. This can
be used to throttle the CPU clock or switch on a fan.
The THERM output deasserts (goes high) when the
temperature falls to THERM limit minus hysteresis. In ,
the default hysteresis value of 10°C is shown.
The ALERT output deasserts only when the
temperature has fallen below the high temperature
limit, and the master has read the device address and
cleared the status register.
Pin 6 on the NCT72 can be configured as either an
ALERT output or as an additional THERM output.
THERM2 asserts low when the temperature exceeds the
programmed local and/or remote high temperature
limits. It is reset in the same manner as THERM and is
not maskable.
The programmed hysteresis value also applies to
THERM2.
Figure 20 shows how THERM and THERM2 operate
together to implement two methods of cooling the system.
In this example, the THERM2 limits are set lower than the
THERM limits. The THERM2 output is used to turn on a
fan. If the temperature continues to rise and exceeds the
THERM limits, the THERM output provides additional
cooling by throttling the CPU.
Figure 19 shows how the THERM and ALERT outputs
operate. The ALERT output can be used as a SMBALERT
to signal to the host via the SMBus that the temperature has
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NCT72
100 W
TEMPERATURE
905C
REMOTE
TEMPERATURE
SENSOR
THERM LIMIT
805C
705C
D+
100 W
1 nF
D−
605C
Figure 21. Filter between Remote Sensor and NCT72
Factors Affecting Diode Accuracy
THERM2 LIMIT
505C
405C
Remote Sensing Diode
305C
THERM2
1
THERM
The NCT72 is designed to work with substrate transistors
built into processors or with discrete transistors. Substrate
transistors are generally PNP types with the collector
connected to the substrate. Discrete types are either PNP or
NPN transistors connected as diodes (base-shorted to
collector). If an NPN transistor is used, the collector and
base are connected to D+ and the emitter to D−. If a PNP
transistor is used, the collector and base are connected to D−
and the emitter to D+.
To reduce the error due to variations in both substrate and
discrete transistors, consider several factors:
• The ideality factor, nF, of the transistor is a measure of
the deviation of the thermal diode from ideal behavior.
The NCT72 is trimmed for an nF value of 1.008. The
following equation may be used to calculate the error
introduced at a temperature, T (°C), when using a
transistor whose nF does not equal 1.008. Consult the
processor data sheet for the nF values.
4
2
3
Figure 20. Operation of the THERM and THERM2
Interrupts
• When the THERM2 limit is exceeded, the THERM2
•
•
•
signal asserts low.
If the temperature continues to increase and exceeds the
THERM limit, the THERM output asserts low.
The THERM output deasserts (goes high) when the
temperature falls to THERM limit minus hysteresis. In
Figure 20, there is no hysteresis value shown.
As the system cools further, and the temperature falls
below the THERM2 limit, the THERM2 signal resets.
Again, no hysteresis value is shown for THERM2.
Both the external and internal temperature measurements
cause THERM and THERM2 to operate as described.
DT = (nF − 1.008)/1.008 × (273.15 Kelvin + T)
Application Information
Noise Filtering
•
For temperature sensors operating in noisy environments,
the industry standard practice was to place a capacitor across
the D+ and D− pins to help combat the effects of noise.
However, large capacitances affect the accuracy of the
temperature measurement, leading to a recommended
maximum capacitor value of 1,000 pF. Although this
capacitor reduces the noise, it does not eliminate it, making
it difficult to use the sensor in a very noisy environment.
The NCT72 has a major advantage over other devices
when it comes to eliminating the effects of noise on the
external sensor. The series resistance cancellation feature
allows a filter to be constructed between the external
temperature sensor and the part. The effect of any filter
resistance seen in series with the remote sensor is
automatically cancelled from the temperature result.
The construction of a filter allows the NCT72 and the
remote temperature sensor to operate in noisy environments.
Figure 21 shows a low-pass R-C-R filter, where R = 100 W
and C = 1 nF. This filtering reduces both common-mode and
differential noise.
To factor this in, the user writes the DT value to the offset
register. It is then automatically added to, or subtracted
from, the temperature measurement.
Some CPU manufacturers specify the high and low
current levels of the substrate transistors. The high
current level of the NCT72, IHIGH, is 220 mA and the
low level current, ILOW, is 13.5 mA. If the NCT72
current levels do not match the current levels specified
by the CPU manufacturer, it may become necessary to
remove an offset. The CPU data sheet should advise
whether this offset needs to be removed and how to
calculate it. This offset is programmed to the offset
register. It is important to note that if more than one
offset must be considered, the algebraic sum of these
offsets must be programmed to the offset register.
If a discrete transistor is used with the NCT72, the best
accuracy is obtained by choosing devices according to the
following criteria:
• Base-emitter voltage greater than 0.25 V at 6 mA, at the
highest operating temperature
• Base-emitter voltage less than 0.95 V at 100 mA, at the
lowest operating temperature
www.onsemi.com
16
NCT72
• Base resistance less than 100 W
• Small variation in hFE (50 to 150) that indicates tight
GND
5 MIL
5 MIL
control of VBE characteristics
D+
Transistors, such as the 2N3904, 2N3906, or equivalents
in SOT−23 packages are suitable devices to use.
5 MIL
5 MIL
D−
5 MIL
5 MIL
Thermal Inertia and Self-heating
Accuracy depends on the temperature of the remote
sensing diode and/or the internal temperature sensor being
at the same temperature as that being measured. Many
factors can affect this. Ideally, place the sensor in good
thermal contact with the part of the system being measured.
If it is not, the thermal inertia caused by the sensor’s mass
causes a lag in the response of the sensor to a temperature
change. In the case of the remote sensor, this should not be
a problem since it is either a substrate transistor in the
processor or a small package device, such as the SOT−23,
placed in close proximity to it.
The on-chip sensor, however, is often remote from the
processor and only monitors the general ambient
temperature around the package. How accurately the
temperature of the board and/or the forced airflow reflects
the temperature to be measured dictates the accuracy of the
measurement. Self-heating due to the power dissipated in
the NCT72 or the remote sensor causes the chip temperature
of the device or remote sensor to rise above ambient.
However, the current forced through the remote sensor is so
small that self-heating is negligible. In the case of the
NCT72, the worst-case condition occurs when the device is
converting at 64 conversions per second while sinking the
maximum current of 1 mA at the ALERT and THERM
output. In this case, the total power dissipation in the device
is about 4.5 mW. The thermal resistance, qJA, of the 8-lead
DFN is approximately 142°C/W.
GND
5 MIL
Figure 22. Typical Arrangement of Signal Tracks
• Try to minimize the number of copper/solder joints that
•
•
•
Layout Considerations
Digital boards can be electrically noisy environments, and
the NCT72 is measuring very small voltages from the
remote sensor, so care must be taken to minimize noise
induced at the sensor inputs. Take the following precautions:
• Place the NCT72 as close as possible to the remote
sensing diode. Provided that the worst noise sources,
that is, clock generators, data/address buses, and CRTs
are avoided, this distance can be 4 inches to 8 inches.
• Route the D+ and D– tracks close together, in parallel,
with grounded guard tracks on each side. To minimize
inductance and reduce noise pickup, a 5 mil track width
and spacing is recommended. Provide a ground plane
under the tracks, if possible.
can cause thermocouple effects. Where copper/solder
joints are used, make sure that they are in both the D+
and D− path and at the same temperature.
Thermocouple effects should not be a major problem as
1°C corresponds to about 200 mV, and thermocouple
voltages are about 3 mV/°C of temperature difference.
Unless there are two thermocouples with a big
temperature differential between them, thermocouple
voltages should be much less than 200 mV.
Place a 0.1 mF bypass capacitor close to the VDD pin. In
extremely noisy environments, place an input filter
capacitor across D+ and D− close to the NCT72. This
capacitance can effect the temperature measurement, so
ensure that any capacitance seen at D+ and D− is, at
maximum, 1,000 pF. This maximum value includes the
filter capacitance, plus any cable or stray capacitance
between the pins and the sensor diode.
If the distance to the remote sensor is more than
8 inches, the use of twisted pair cable is recommended.
A total of 6 feet to 12 feet is needed.
For really long distances (up to 100 feet), use a shielded
twisted pair, such as the Belden No. 8451 microphone
cable. Connect the twisted pair to D+ and D− and the
shield to GND close to the NCT72. Leave the remote
end of the shield unconnected to avoid ground loops.
Because the measurement technique uses switched
current sources, excessive cable or filter capacitance can
affect the measurement. When using long cables, the filter
capacitance can be reduced or removed.
Application Circuit
Figure 23 shows a typical application circuit for the
NCT72, using a discrete sensor transistor connected via a
shielded, twisted pair cable. The pullups on SCLK, SDATA,
and ALERT are required only if they are not provided
elsewhere in the system.
www.onsemi.com
17
NCT72
VDD
VDD
1.8 V or VDD
0.1 mF
TYP 10 kW
NCT72
SCLK
D+
D−
2N3906
or
CPU THERMAL
DIODE
SMBus/I2C
CONTROLLER
SDATA
ALERT/
THERM2
SHIELD
1.8 V or VDD
THERM
TYP 10 kW
GND
OVERTEMPERATURE
SHUTDOWN
Figure 23. Typical Application Circuit
Table 15. ORDERING INFORMATION
Package Description
Package
Option
Marking
SMBus
Address
Shipping†
NCT72CMTR2G
8-lead WDFN, 2x2
MT
C
0x4C
3,000 Tape & Reel
NCT72DMTR2G
8-lead WDFN, 2x2
MT
D
0x4D
3,000 Tape & Reel
NCT72CMNR2G
8-lead DFN, 3x3
MN
C
0x4C
3,000 Tape & Reel
NCT72DMNR2G
8-lead DFN, 3x3
MN
D
0x4D
3,000 Tape & Reel
Device Order Number*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*The “G’’ suffix indicates Pb-Free package available.
www.onsemi.com
18
NCT72
PACKAGE DIMENSIONS
WDFN8 2x2, 0.5P
CASE 511AT−01
ISSUE O
D
ÍÍÍ
ÍÍÍ
ÍÍÍ
DETAIL A
E
ALTERNATE TERMINAL
CONSTRUCTIONS
0.10 C
2X
0.10 C
EXPOSED Cu
DETAIL B
A1
A3
SIDE VIEW
e/2
MOLD CMPD
DETAIL B
A
0.05 C
SEATING
PLANE
RECOMMENDED
SOLDERING FOOTPRINT*
7X
DETAIL A
7X
1
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.20
0.30
2.00 BSC
2.00 BSC
0.50 BSC
0.40
0.60
--0.15
0.50
0.70
ALTERNATE
CONSTRUCTIONS
C
e
DIM
A
A1
A3
b
D
E
e
L
L1
L2
ÉÉÉ
ÉÉÉ
TOP VIEW
0.05 C
8X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL TIP.
L1
PIN ONE
REFERENCE
2X
L
L
A
B
PACKAGE
OUTLINE
0.78
L
4
L2
2.30
0.88
8
5
8X
BOTTOM VIEW
b
0.10 C A
0.05 C
1
B
8X
0.30
NOTE 3
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
19
NCT72
PACKAGE DIMENSIONS
DFN8 3x3, 0.5P
CASE 506BJ
ISSUE O
PIN 1
REFERENCE
2X
0.10 C
2X
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
0.10 C
EDGE OF PACKAGE
A
B
D
NOTES:
1. DIMENSIONS AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND 0.30
MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
L
L1
DETAIL A
E
OPTIONAL
CONSTRUCTION
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
L
TOP VIEW
DETAIL A
OPTIONAL
CONSTRUCTION
DETAIL B
0.05 C
A
8X
0.05 C
(A3)
NOTE 4
SIDE VIEW
A1
D2
8X
L
1
C
SEATING
PLANE
EXPOSED Cu
E2
8X
SOLDERMASK DEFINED
MOUNTING FOOTPRINT
DETAIL A
4
ÉÉÉ
ÉÉÉ
5
8X
8X
0.35
OPTIONAL
CONSTRUCTION
8
1.85
MOLD CMPD
DETAIL B
K
e
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.18
0.30
3.00 BSC
1.64
1.84
3.00 BSC
1.35
1.55
0.50 BSC
0.20
−−−
0.30
0.50
0.00
0.03
3.30
1.55
0.63
0.50
PITCH
b
0.10 C A B
BOTTOM VIEW
0.05 C
NOTE 3
8X
DIMENSION: MILLIMETERS
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
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NCT72/D
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