ATS684LSN Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC FEATURES AND BENEFITS DESCRIPTION • Integrated package solution offers EMI protection, industry-proven IC, and back-bias magnet in a single overmolded, user-friendly package The ATS684LSN is an optimized, industry-proven, Halleffect integrated circuit (IC), rare-earth pellet, and hightemperature ceramic capacitor in a single overmolded package. The integrated capacitor reduces the need for external EMI protection. The Hall-effect IC is a differential dual element design capable of providing stable, signal perturbation-immune, output performance for speed sensing applications. The back-bias magnet creates a differential magnetic signal in the presence of a rotating ferromagnetic target. This fully integrated solution eliminates the need for additional manufacturing steps throughout the supply chain, simplifying the overall system design. • Advanced algorithm design provides immunity to signal perturbations from vibration, ferrous debris, target eccentricities, and harsh automotive operating conditions • Adaptive threshold sensing optimizes output performance on a wide range of target types • Integrated Scan, Iddq, and Built-In Self-Test capabilities on an automotive-grade semiconductor process provide dependability essential in the safety-conscious automotive market PACKAGE: 3-pin SIP (suffix SN) The single overmold design integrates the key operating components to reduce mechanical tolerances and achieve optimal operating performance every time. Built-in test capability and an automotive-grade semiconductor process ensures the quality and reliability that automotive companies demand. The advanced algorithms and two-wire regulated current output provide an ideal solution for obtaining edge and duty cycle information in gear-tooth-based applications such as transmission speed. The ATS684 is provided in a lead (Pb) free 3-pin back-biased SIP package (suffix SN) with tin leadframe plating. Not to scale VCC Voltage Regulator PDAC Hall Amp Offset Adjust AGC NDAC Reference Generator and Lockout + – Synchronous Digital Controller GND Functional Block Diagram ATS684LSN-DS, Rev. 7 March 9, 2017 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN SELECTION GUIDE Part Number Packing* ATS684LSNTN-T 13-in. reel, 800 pieces per reel *Contact Allegro™ for additional packing options SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS Characteristic Symbol Notes Rating Units Supply Voltage VCC 26.5 V Reverse Supply Voltage VRCC –18 V Operating Ambient Temperature TA –40 to 150 °C Maximum Junction Temperature TJ(max) 165 °C Tstg –65 to 170 °C Rating Units 10000 pF Storage Temperature Range L, refer to Power Derating Curve INTERNAL DISCRETE CAPACITOR RATINGS Characteristic Symbol Nominal Capacitance CSUPPLY Notes Connected between VCC and GND PINOUT DIAGRAM AND TERMINAL LIST 1 2 3 Package SN, 3-Pin SIP Pinout Diagram Terminal List Table Number Name Function 1 VCC Supply voltage 2 VCC Supply voltage 3 GND Ground Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN OPERATING CHARACTERISTICS: VCC and TA within specif ication, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit [2] 4.0 – 24 V VCC 0 → 5 V or 5 → 0 V – 3.5 3.95 V VCC = VRCC (MAX) – – –10 mA ELECTRICAL CHARACTERISTICS Supply Voltage [3] Undervoltage Lockout VCC VCC(UV) Reverse Supply Current [4] IRCC Operating, TJ < TJ (max), required across pin 1 to pin 3 Supply Zener Clamp Voltage VZSUPPLY ICC = ICC (HIGH) + 3 mA, TA = 25°C 28 – – V Supply Zener Current IZSUPPLY TA = 25°C, VCC = 28 V – – 19 mA Supply Current Supply Current Ratio ICC(Low) Low-current state 4 6 8 mA ICC(High) High-current state 12 14 16 mA ICC(High) / ICC(Low) Ratio of high current to low current 1.85 – 3.05 – POWER-ON STATE CHARACTERISTICS Power-On Time [5] tPO Power-On State [6] POS VCC > VCC (min), fOP < 100 Hz – 1 2 ms t > tPO – ICC(High) – mA OUTPUT STAGE Output Rise Time [7] tr Corresponds to measured output slew rate, from 10% to 90% ICC level CSUPPLY, RSENSE = 100 Ω 0 2 4 μs Output Fall Time [7] tr Corresponds to measured output slew rate, from 90% to 10% ICC level CSUPPLY, RSENSE = 100 Ω 0 2 4 μs 0 – 12 kHz PERFORMANCE CHARACTERISTICS Operating Frequency fOP Analog Signal Bandwidth BW 16 20 – kHz – 70 – % Operate Point BOP % of peak-to-peak BSIG , AGOP within specification Release Point BRP % of peak-to-peak BSIG , AGOP within specification – 30 – % Running Mode Lockout Enable Threshold VLOE(RM) At peak-to-peak VPROC < VLOE(RM) , output switching disables – 170 – mV Running Mode Lockout Release Threshold VLOR(RM) At peak-to-peak VPROC > VLOR(RM) , output switching enables – 200 – mV – VLOR(RM) – mV – – 3 edges CALIBRATION Start Mode Hysteresis Initial Calibration [8] POHYS CALI Rising output (current) edges, fOP < 200 Hz Continued on the next page… Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN OPERATING CHARACTERISTICS (continued): VCC and TA within specif ication, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. [1] Max. Unit [2] Differential magnetic signal, duty cycle within specification 50 – 1500 GPK-PK BSIGEXT Differential magnetic signal, output switching (no missed edges), duty cycle not guaranteed 30 – – GPK-PK Operational Air Gap Range AGOP Using Allegro Reference Target 60-0, duty cycle within specification 0.5 – 2.5 mm Extended Operational Air Gap Range AGEXT Using Allegro Reference Target 60-0, output switching (no missed edges), duty cycle not guaranteed – – 3.0 mm ±60 – – G Wobble < 0.5 mm, AG within specification – – ±10 % Instantaneous symmetric magnetic signal amplitude change, measured as a percentage of peak-to-peak BSIG, fOP < 500 Hz – 45 – % FUNCTIONAL CHARACTERISTICS Operating Signal Range [9] Extended Operating Signal Range Allowable User-Induced Differential Offset Duty Cycle Variation [10] Maximum Sudden Signal Amplitude Change BSIG BDIFFEXT ΔD BSIG(INST) Operation within specification 1 Typical values are at TA = 25°C and VCC = 12 V. Performance may vary for individual units, within the specified maximum and minimum limits. G (gauss) = 0.1 mT (millitesla). 3 Maximum voltage must be adjusted for power dissipation and junction temperature; see Power Derating section. 4 Negative current is defined as conventional current coming out of (sourced from) the specified device terminal. 5 Measured from V CC ≥ VCC (min) to the time when the device is able to switch the output signal in response to a magnetic stimulus. 6 Please refer to the Functional Description, Power-On section. 7 Guaranteed by device charaterization. 8 For power-on frequency, f OP < 200 Hz. Higher power-on frequencies may result in more input magnetic cycles until full output edge accuracy is achieved, including the possibility of missed output edges. 9 AG OP is dependent on the available magnetic field. The available field is dependent on target geometry and material, and should be independently characterized. 10 Target rotation from pin 3 to pin 1. 21 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN Reference Target 60-0 (60 Tooth Target) Symbol Test Conditions Typ. Units 120 mm Outside diameter of target Face Width F Breadth of tooth, with respect to branded face 6 mm Circular Tooth Length t Length of tooth, with respect to branded face 3 deg. Circular Valley Width tv Length of valley, with respect to branded face 3 deg. Tooth Whole Depth ht 3 mm – – Material Low Carbon Steel Do ht F tv Do Outside Diameter Symbol Key Branded Face of Package t Characteristics Air Gap Branded Face of Sensor Reference Target 60-0 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN THERMAL CHARACTERISTICS: May require derating at maximum conditions; see Power Derating section Characteristic Symbol Package Thermal Resistance Test Conditions* Single layer PCB, with copper limited to solder pads RθJA Value Unit 150 °C/W *Additional thermal information available on the Allegro website Maximum Allowable VCC (V) Power Derating Curve 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 VCC(max) (RθJA = 150°C/W) VCC(min) 20 40 60 80 100 120 140 160 180 Temperature (°C) Power Dissipation versus Ambient Temperature 1000 Power Dissipation, PD (mW) 900 800 (RθJA = 150 °C/W) 700 600 500 400 300 200 100 0 20 40 60 80 100 120 140 160 180 Temperature (°C) Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN CHARACTERISTIC DATA 8.0 16.0 VCC: 24 V VCC: 24 V 15.5 VCC: 4 V 15.0 6.5 14.5 ICC (mA) 7.0 6.0 13.5 5.0 13.0 4.5 12.5 4.0 VCC: 4 V 14.0 5.5 12.0 -50 0 50 100 150 -50 0 50 TA (ºC) 100 150 TA (ºC) Supply Current (LOW) versus Ambient Temperature Supply Current (HIGH) versus Ambient Temperature 60 25ºC -40ºC 56 Duty Cycle (%) ICC (mA) 7.5 150ºC 52 48 44 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Air Gap (mm) Average Duty Cycle versus Air Gap Pin 1 to 3 Rotation of Allegro Standard Target Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN FUNCTIONAL DESCRIPTION Sensing Technology The ATS684 sensor IC contains a single-chip differential Halleffect circuit, a samarium-cobalt pellet, and a flat ferrous pole piece (a precisely-mounted magnetic field concentrator that homogenizes the flux passing through the Hall chip). As shown in Figure 1, the circuit supports two Hall elements, which sense the magnetic profile of the ferromagnetic gear target simultaneously, Target (Gear) Element Pitch Hall Element 1 Hall IC Pole Piece (Concentrator Back-biasing Magnet Hall Element 2 South Pole Dual-Element Hall Effect Device North Pole Case (Pin n > 1 Side) (Pin 1 Side) Figure 1: Relative Motion of the Target is Detected by the Dual Hall Elements Mounted on the Hall IC. Mechanical Position (Target moves past pin 1 to pin 3) This tooth sensed earlier This tooth sensed later Target (Gear) Target Magnetic Profile Sensor Orientation to Target Hall Element Pitch Branded Face IC Back-Biasing SensorPellet Branded Face (Package Top View) Pin 1 Side Sensor Internal Differential Analog Signal, VPROC BOP(#2) BRP(#2) BRP(#1) Target Profiling During Operation Under normal operating conditions, the IC is capable of providing digital information that is representative of the mechanical features of a rotating gear. The waveform diagram in Figure 2 presents the automatic translation of the mechanical profile, through the magnetic profile that it induces, to the digital output signal of the ATS684. No additional optimization is needed and minimal processing circuitry is required. This ease of use reduces design time and incremental assembly costs for most applications. Off On The regulated current output is configured for two-wire applications, requiring one less wire for operation than do switches with the traditional open-collector output. Additionally, the system designer inherently gains diagnostics because there is always output current flowing, which should be in either of two narrow ranges, shown in Figure 3 as ICC(HIGH) and ICC(LOW). Any current level not within these ranges indicates a fault condition. If ICC > ICC(HIGH)(max), then a short condition exists, and if ICC < ICC(LOW)(min), then an open condition exists. Any value of ICC between the allowed ranges for ICC(HIGH) and ICC(LOW) indicates a general fault condition. +mA Sensor Internal Switch State On The Hall IC is self-calibrating and also integrates a temperature compensated amplifier and offset cancellation circuitry. Its voltage regulator provides supply noise rejection throughout the operating voltage range. Changes in temperature do not greatly affect this device due to the stable amplifier design and the offset rejection circuitry. The Hall transducers and signal processing electronics are integrated on the same silicon substrate, using a proprietary BiCMOS process. Diagnostics +B Pin 3 Side but at different points (spaced at a 2.2 mm pitch), generating a differential internal analog voltage, VPROC , that is processed for precise switching of the digital output signal. ICC(HIGH)(max) Off ICC(HIGH)(min) Sensor Output Signal, IOUT +t Figure 2: The Magnetic Prof ile Ref lects the Geometry of the Target, Allowing the ATS684 to Present an Accurate Digital Output Response. ICC(LOW)(max) ICC(LOW)(min) 0 Short Fault Range for Valid ICC(HIGH) Range for Valid ICC(LOW) Open Figure 3: Diagnostic Characteristics of Supply Current Values. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8 ATS684LSN Determining Output Signal Polarity In Figure 2, the top panel, labeled Mechanical Position, represents the mechanical features of the target gear and orientation to the device. The bottom panel, labeled Device Output Signal, displays the square waveform corresponding to the digital output signal (current amplitude) that results from a rotating gear configured as shown in Figure 4. Referring to the target side nearest the face of the sensor IC, the direction of rotation is: perpendicular to the leads, across the face of the device, from the pin 1 side to the pin 3 side. To read the output signal as a voltage (VSENSE) , a sense resistor (RSENSE ) can be placed on either the VCC signal or on the GND signal. As shown in Figure 5, when RSENSE is placed on the GND signal, the output signal voltage (VSENSE(LowSide) ) is in phase with ICC . When RSENSE is placed on the VCC signal, the output signal voltage (VSENSE(HighSide) ) is inverted relative to ICC . Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC Output Polarity States RSENSE Location ICC State High side (VCC pin side) High Low Low High Low side (GND pin side) High High Low Low VSENSE State VDD VDD ICC ICC RLOAD 100 1 VCC 1 VCC ATS684 ATS684 GND 3 GND 3 RLOAD 100 CLOAD CLOAD Panel A Panel B I+ ICC V+ VSENSE(HighSide) V+ VSENSE(LowSide) Panel C Figure 4: Left-to-Right, Pin 1 to Pin 3 (top) and Right-toLeft, Pin 3 to Pin 1 (bottom) Direction of Target Rotation. Figure 5: Alternative Polarity Conf igurations Using Two-Wire Sensing. The Output Polarity States table provides the permutations of output voltage relative to ICC, given alternative locations for RSENSE. Panel A shows the low-side (VSENSE(LowSide) ) sensing configuration, and panel B shows the high-side (VSENSE(HighSide) ) configuration. As shown in panel C, VSENSE(LowSide) is in phase with ICC , and VSENSE(HighSide) , is inverted. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN Continuous Update of Switchpoints Switchpoints are the threshold levels of the differential internal analog signal (VPROC ) at which the device changes output signal state. The value of VPROC is directly proportional to the magnetic flux density (B) induced by the target and sensed by the Hall elements. As VPROC rises through a certain limit, referred to as the operate point (BOP ), the output state changes from ICC(Low) to ICC(High). As VPROC falls below BOP to a certain limit, the release point (BRP ), the output state changes from ICC(High) to ICC(Low). (A) TEAG varying; cases such as eccentric mount, out-of-round region, normal operation position shift As shown in Figure 6, threshold levels for the switchpoints are established as a function of the peak input signal levels. The device incorporates an algorithm that continuously monitors the input signal and updates the switching thresholds accordingly with limited inward movement of VPROC. The switchpoint for each edge is determined by the detection of the previous two signal edges. In this manner, variations are tracked in real time. (B) Internal analog signal, VPROC, typically resulting in the IC V+ Smaller TEAG Target Smaller TEAG V+ Hysteresis Band (Delimited by switchpoints) Larger TEAG IC 0 Target Rotation (°) 360 (C) Internal analog signal, VPROC, representing (C) Internal analog signal, VPROC , representing magnetic field for digital output when configured with magnetic field for digital output RSENSE in the low-side configuration BOP VPROC (V) BOP BRP BOP BRP BRP BOP BOP BOP BRP BRP VOUT (V) IC Larger TEAG VPROC (V) Target Smaller TEAG The Continuous Update algorithm allows the Allegro IC to interpret and adapt to variances in the magnetic field generated by the target as a result of eccentric mounting of the target, out-of-round target shape, and similar dynamic application problems that affect the TEAG (Total Effective Air Gap). As shown in panel A, the variance in the target position results in a change in the TEAG. This affects the IC as a varying magnetic field, which results in proportional changes in the internal analog signal (VPROC), as shown in panel B. The Continuous Update algorithm is used to establish switchpoints based on the fluctuation of VPROC, as shown in panel C. Figure 6: The Continuous Update Algorithm Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 ATS684LSN Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC Power-On Initial Edge Detection The ATS684 is guaranteed to power-on in the high current state, ICC(High) . When power (VCC > VCC(min) ) is applied to the device, a short period of time is required to power the various portions of the circuit. During this period, the ATS684 will power-on in the high current state (ICC(High) ). The device self-calibrates using the initial teeth sensed, and then enters running mode. This results in reduced accuracy for a brief period (CALI ). However, this period allows the device to optimize for running mode operation. As shown in Figure 7, the first three high peak signals corresponding to rising output edges are used to calibrate AGC (Automatic Gain Control). There is a slight variance in the duration of initialization, depending on what target feature is opposite the sensor IC when power-on occurs. Also, a high speed of target rotation at power-on may increase the quantity of calibration teeth required in the CALI period. Target (Gear) 4 VPR OC Power-on 1 opposite tooth Start Mode Hysteresis Overcome AGC Calibration OC 3 2 1 VPR Device Position Running Mode ICC Start Mode Hysteresis Overcome AGC Calibration VPR VPR OC Power-on at falling 2 mechanical edge OC ICC Running Mode ICC Start Mode Hysteresis Overcome AGC Calibration OC VPR VPR Power-on opposite 3 valley OC ICC Running Mode ICC AGC Calibration OC VPR Start Mode Hysteresis Overcome VPR Power-on 4 at rising mechanical edge OC ICC Running Mode ICC ICC This figure demonstrates four typical power-on scenarios. All of these examples assume that the target is moving relative to the sensor IC in the direction indicated (from pin 1 to pin 3) and the voltage output is configured for low-side sensing (VOUT(Low)). The length of time required to overcome Start Mode Hysteresis, as well as the combined effect of whether it is overcome in a positive or negative direction plus whether the next edge is in that same or opposite polarity, affect the point in time when AGC calibration begins. Three high peaks are always required for AGC calibration when fOP ≤ 200 Hz, and more may be required at greater speeds. Figure 7: Power-On Initial Edge Detection. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN Start Mode Hysteresis This feature helps to ensure optimal self-calibration by rejecting electrical noise and low-amplitude target vibration during initialization. This prevents AGC from calibrating the device on such spurious signals. Calibration can be performed using the actual target features. A typical scenario is shown in Figure 8. The hysteresis (POHYS ) is a minimum level of the peak-to-peak amplitude of the internal analog electrical signal (VPROC ) that must be exceeded before the ATS684 starts to compute switchpoints. Target, Gear Target Magnetic Profile IC Position Relative to Target 2 1 3 4 BOP(initial) Differential Signal, VPROC BRP Start Mode Hysteresis, POHYS BOP BRP BRP(initial) Output Signal, ICC If exceed POHYS on high side If exceed POHYS on low side Figure 8: Operation of Start Mode Hysteresis • At power-on (position 1), the ATS684 begins sampling VPROC . • At the point where the Start Mode Hysteresis, POHYS, is exceeded, the device establishes an initial switching threshold, by using the Continuous Update algorithm. If VPROC is rising through the limit on the high side (position 2), the switchpoint is BOP , and if VPROC is falling through the limit on the low side (position 4), it is BRP . After this point, Start Mode Hysteresis is no longer a consideration. Note that a valid VPROC value exceeding the Start Mode Hysteresis can be generated either by a legitimate target feature or by excessive vibration. • In either case (BOP or BRP), because the switchpoint is immediately passed as soon as it is established, the ATS684 enables switching: ▫ If on the high side, at BOP (position 2) the output would switch from low to high. However, because output is already high, no output switching occurs. At the next switchpoint, where BRP is passed (position 3), the output switches from high to low. ▫ If on the low side, at BRP (position 4) the output switches from high to low. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN Undervoltage Lockout When the supply voltage falls below the minimum operating voltage (VCC(UV) ), ICC goes high and remains high regardless of the state of the magnetic gradient from the target. This lockout feature prevents false signals, caused by undervoltage conditions, from propagating to the output of the device. Because VCC is below the VCC(min) specification during lockout, the ICC levels may not be within specification. Power Supply Protection The device contains an on-chip regulator and can operate over a wide VCC range. For devices that need to operate from an unregulated power supply, transient protection must be added externally. For applications using a regulated line, EMI/RFI protection may still be required. Contact Allegro for information on the circuitry needed for compliance with various EMC specifications. Automatic Gain Control (AGC) This feature allows the device to operate with an optimal internal electrical signal, regardless of the air gap (within the AG specification). At power-on, the device determines the peak-to-peak amplitude of the signal generated by the target. The gain is then automatically adjusted. Figure 9 illustrates the effect of this feature. Running Mode Gain Adjust The ATS684 has a feature during Running mode to compensate for dynamic air gap variation. If the system increases the magnetic input drastically, the device will gradually readjust the gain downwards, allowing the chip to regain the optimum internal electrical signal with the new, larger, magnetic signal. Dynamic Offset Cancellation (DOC) The offset circuitry when combined with AGC automatically reduces the effects of chip, magnet, and installation offsets. This circuitry is continuously active, including both Power-on mode and Running mode, compensating for any offset drift (within Allowable User-Induced Differential Offset). Continuous operation also allows it to compensate for offsets induced by temperature variations over time. Running Mode Lockout The ATS684 has a Running mode lockout feature to prevent switching on small signals that are characteristic of vibration signals. The internal logic of the chip evaluates small signal amplitudes below a certain level to be vibration. In that event, the output is blanked (locked-out) until the amplitude of the signal returns to normal operating levels. Watchdog The ATS684 employs a watchdog circuit to prevent extended loss of output switching during sudden impulses and vibration in the system. If the system changes the magnetic input drastically such that target feature detection is terminated, the device will fully reset itself, allowing the chip to recalibrate properly on the new magnetic input signal. Ferrous Target Mechanical Profile V+ Internal Differential Analog Signal Response, without AGC AGLarge AGSmall V+ Internal Differential Analog Signal Response, with AGC AGSmall AGLarge The AGC function corrects for variances in the air gap. Differences in the air gap cause differences in the magnetic field at the device, but AGC prevents that from affecting device performance, as shown in the lowest panel. Figure 9: Automatic Gain Control (AGC). Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN POWER DERATING The device must be operated below the maximum junction temperature of the device (TJ(max)). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro website.) The Package Thermal Resistance (RθJA) is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity (K) of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case (RθJC) is relatively small component of RθJA. Ambient air temperature (TA) and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at PD. PD = VIN × IIN (1) ΔT = PD × RθJA (2) TJ = TA + ΔT (3) For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 6 mA, and RθJA = 150°C/W, then: PD = VCC × ICC = 12 V × 6 mA = 72 mW ΔT = PD × RθJA = 72 mW × 150°C/W = 10.8°C TJ = TA + ΔT = 25°C + 10.8°C = 35.8°C A worst-case estimate, PD(max), represents the maximum allowable power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RθJA and TA Example: Reliability for VCC at TA = 150°C, package SN, using a single-layer PCB. Observe the worst-case ratings for the device, specifically: RθJA = 150°C/W, TJ(max) = 165°C, and ICC(max) = 16 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: ΔTmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = ΔTmax ÷ RθJA = 15°C ÷ 150°C/W = 100 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 100 mW ÷ 16 mA = 6.3 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤ VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reliable operation between VCC(est) and VCC(max) requires enhanced RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions. Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 14 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN PACKAGE OUTLINE DRAWING For Reference Only – Not for Tooling Use (Reference DWG-9206, Rev.1) Dimensions in millimeters – NOT TO SCALE Dimensions exclusive of mold flash, gate burs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown 7.65 ±0.10 2 × 7° 2 × 10° B G F 2.72 F 5.00 ±0.10 C 2.20 1.15 ±0.05 Ø2.00 REF Ejector Pin 3.12 F Branded Face E2 F 5.78 ±0.10 F 0.90 REF 0.60 REF F E1 1 2.73 REF 2 B 3 A 0.51 REF 0.49 REF 0.25 ±0.05 2.54 ±0.10 45° 23.36 REF 15.58 ±0.10 19.24 REF 2 × 1.00 ±0.10 9.20 REF 3.03 ±0.10 5.80 REF 45° 1.10 REF 1.18 REF 0.30 REF 2.00 ±0.10 7.00 ±0.10 LLLLLLL NNN[NNNN] YYWW 4 × Ø1.00 REF Ejector Pin E 0.90 REF 1.60 ±0.10 Notes: A Dambar removal protrusion (12×) B Tie bars (8×) 1 D 2 3 Standard Branding Reference View = Supplier emblem L = Lot identifier N = Last three numbers of device part number and optional subtype codes Y = Last two digits of year of manufacture W = Week of manufacture C Active Area Depth, 0.40 ±0.05 mm D Branding scale and appearance at supplier discretion E Molded lead bar for preventing damage to leads during shipment F Hall elements (E1 and E2); not to scale G Gate location Figure 10: Package SN, 3-Pin SIP Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 15 Two-Wire, Zero-Speed Differential Gear Tooth Sensor IC ATS684LSN Revision History Number Date 5 January 3, 2017 Description Updated Features and Benefits, Description, and Figure 2 6 March 1, 2017 Corrected Package Outline Drawing Hall element locations 7 March 9, 2017 Updated Thermal Characteristics and Power Derating sections Copyright ©2017, Allegro MicroSystems, LLC Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro’s product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 16