Rohm BD95503MUV Silicon monolithic integrated circuit Datasheet

1/4
STRUCTURE
TYPE
PRODUCT SERIES
FEATURES
Silicon Monolithic Integrated Circuit
1ch DC/DC converter IC
BD95503MUV
3
・Built in 1ch H Reg DC/DC converter controller
・Adjustable output voltage setting (0.75V~5.5V)
○Absolute Maximum Ratings (Ta=25℃)
Parameter
Input Voltage
BOOT Voltage
BOOT-SW Voltage
Output Voltage
Output Feedback Voltage
VREG Voltage
Symbol
Limit
Unit
24
*1*2
V
BOOT
30
*1*2
V
BOOT-SW
7
*1*2
V
7
*1*2
V
VIN, VINS
VOUT
FB
VREG
VREG
V
*1*2
V
7
Current Limit Setting Voltage
ILIM
VREG
Logic Input Voltage
EN
24
Output Current(Average)
Isw
*1*2
3*1
V
V
A
Power Dissipation 1
Pd1
0.34
*3
Power Dissipation 2
Pd2
0.70
*4
W
W
W
W
Power Dissipation 3
Pd3
1.21
*5
Power Dissipation 4
Pd4
3.56
*6
Operating Temperature Range
Topr
-20~+100
Tstg
-55~+150
℃
Tjmax
+150
℃
Storage Temperature Range
Maximum Junction Temperature
℃
*1 Not to exceed Pd.
*2 Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle.
*3 Reduced by 2.7mW/℃ for each increase in Ta of 1℃ over 25℃ (when don’t mounted on a heat radiation board )
2
*4 Reduced by 5.6mW/℃ for increase in Ta of 1℃ over 25℃. (when mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB, copper foil area : 10.29mm )
*5 Reduced by 9.7mW/℃ for increase in Ta of 1℃ over 25℃. (when mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB, copper foil area: 10.29mm2,
2-3layer: 5505mm2)
2
*6 Reduced by 28.5mW/℃ for increase in Ta of 1℃ over 25℃. (when mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB, copper foil area: 5505mm )
○Operating Conditions (Ta=25℃)
Parameter
Symbol
MIN.
Input Voltage
VIN, VINS
7.5
20
V
BOOT Voltage
BOOT
4.5
25
V
SW Voltage
MAX.
Unit
SW
-0.7
20
V
BOOT-SW Voltage
BOOT-SW
4.5
5.5
V
Logic Input Voltage
EN
0
20
V
Output Voltage
VOUT
0.75
5.5
V
MIN ON TIME
tonmin
-
100
ns
●
This product is not designed to be used in a radioactive environment.
REV. B
2/4
○Electrical Characteristics (Unless otherwise noted, Ta=25℃ VCC=5V, VIN=VINS=12V, VEN=3V, VOUT=1.8V)
Standard Value
Parameter
Symbol
Unit
Conditions
MIN.
TYP.
MAX.
[Whole Device]
VIN Bias current
IIN
1.0
2.0
mA VCC=VREG
VIN Standby current
IIN_stb
0
10
μA VEN=0V
EN Low Voltage
VEN_low
GND
0.3
V
EN High Voltage
VEN_high
2.2
20
V
EN Pull-down resistance
REN
30
50
70
kΩ
[5VLinear Regulator]
VREG Standby Voltage
VREG_stb
0.1
V VEN=0V
VREG Output Voltage
[Under Voltage Lock Out]
VREG threshold Voltage
VREG hysteresis Voltage
[Over Voltage Protection]
FB threshold Voltage
[H3RegTM Control]
ON Time
MIN OFF Time
[FET Driver]
High side ON resistance
Low side ON resistance
[Current Control]
Current Limit
threshold Voltage
[Output Voltage Sense]
FB threshold Voltage
FB Input current
VOUT discharge current
[SCP]
Threshold Voltage
VREG
4.9
5.1
5.3
VREG_UVLO
dVREG_UVLO
3.75
100
4.20
160
4.65
220
FB_OVP
0.8
0.9
1.0
V
ton
Toffmin
200
300
300
500
400
-
ns
ns
RHGhon
RLGlon
-
0.270
0.135
0.540
0.270
Ω
Ω
Vilim
440
470
500
FB
IFB
IVOUT
0.738
-1
5
0.750
10
0.762
1
-
Vthscp
REF×0.6
REF×0.7
REF×0.8
REV. B
V
VIN=VINS=7.5V to 20V
Ireg=10mA
V VREG:Sweep up
mV VREG:Sweep down
mV RILIM=47kΩ
V
μA
mA VOUT=1V, VEN=0V
V
3/4
○Block Diagram
VIN
VREG
VINS
7
6
VIN
VREG
Thermal
Protection
VOUT
TSD
8
VIN
12
VOUT
BOOT
1
23
5V
5VReg
EN/UVLO
TSD/OVP
18
3
Soft
Start
EN
FB
TM
H Reg
Controller
SS
Block
REF
SS
2
VREG
Driver
R
Q
S
Circuit
SW
VREG
OCP
+
+
-
SW
22
OVP
UVLO
OCP
SCP
TSD
13
PGND
17
ILIM
VCC
EN
4
5
24
EN/UVLO
Reference
REF(=0.75V)
FB
Delay
UVLO
BG
Block
REF×0.7
+
-
SCP
OVP
+
-
0.9V
FB
EN/UVLO
3
GND
○Physical Dimension
○Pin number・Pin name
PIN No.
1
2
3
4
5
6
7
95503
Lot No.
1 PIN mark
8-12
13-17
18-22
23
24
Reverse
(Unit : mm)
REV. B
PIN name
VOUT
FB
GND
ILIM
VCC
VREG
VINS
VIN
PGND
SW
BOOT
EN
FIN
VOUT
4/4
○ NOTE FOR USE
1. Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the
devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to
exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses.
2. Supply line
Since the motor’s reverse electromotive force gives rise to the return of regenerative current, measures should be taken to establish a
channel for the current, such as adding a capacitor between the power supply and GND. In determining the approach to take, make sure
that no problems will be posed by the various characteristics involved, such as capacitance loss at low temperatures with an electrolytic
capacitor.
3. GND voltage
The potential of GND, PGND pin must be minimum potential in all operating conditions.
4. Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
5. Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if
pins are shorted together.
6. Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
7. ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
8. Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always
discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or removing it from a jig or
fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when
transporting or storing the IC.
9. Electrical characteristics
The electrical characteristics in the Specifications may vary depending on ambient temperature, power supply voltage, circuit(s) externally
applied, and/or other conditions. It is therefore requested to carefully check them including transient characteristics.
10. Not of a radiation-resistant design.
OUTPUT
11. In the event that load containing a large inductance component
PIN
is connected to the output terminal, and generation of back-EMF at the start-up
and when output is turned OFF is assumed, it is requested to insert a protection diode.
12. Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor.
For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual interference among
circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that is
lower than the GND (P substrate) voltage to an input pin, should not be used.
Resistor
Pin A
Pin B
C
Transistor (NPN)
B
Pin A
N
N
P
N
P
P
N
P
Parasitic
element
P substrate
Parasitic element
GND
Pin B
E
B
N
P
P
N
C
E
P substrate
Parasitic element
GND
GND
GND
Parasitic
element
Other adjacent elements
13. Ground Wiring Pattern
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single
ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents
do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components,
either.
14. Operating ranges
If it is within the operating ranges, certain circuit functions and operations are warranted in the working ambient temperature range.
With respect to characteristic values, it is unable to warrant standard values of electric characteristics but there are no sudden variations
in characteristic values within these ranges.
15. Thermal shutdown circuit
This IC is provided with a built-in thermal shutdown (TSD) circuit, which is activated when the chip temperature reaches the threshold value
listed below. When TSD is on, the device goes to high impedance mode. Note that the TSD circuit is provided for the exclusive purpose
shutting down the IC in the presence of extreme heat, and is not designed to protect the IC per se or guarantee performance when or after
extreme heat conditions occur. Therefore, do not operate the IC with the expectation of continued use or subsequent operation once the
TSD is activated.
TSD ON temperature [℃] (typ.)
Hysteresis temperature[℃] (typ.)
175
15
16.Output Voltage Resistor Setting
Output volage is adjusted with resistor. Total 10kohm resistor is recommended so that the output voltage is not affected by the FB input
current (Typ. 1uA).
17. Heat sink (FIN)
Since the heat sink (FIN) is connected with the Sub, short it to the GND.
REV. B
Notice
Notes
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R1010A
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