16 V, 4 MHz Rail-to-Rail Output Amplifiers AD8665/AD8666/AD8668 GENERAL DESCRIPTION The AD866x family are single supply, rail-to-rail output amplifiers with low noise performance featuring an extended operating range with supply voltages up to 16 V. They also feature low input bias currents, wide signal bandwidth, and low input voltage and current noise. For lower offset voltage, choose the AD8661/AD8662/AD8664 family. The combination of low offsets, very low input bias currents, and wide supply range make these amplifiers useful in a wide variety of cost sensitive applications normally associated with much higher priced JFET amplifiers. Systems using high impedance sensors, such as photo diodes, benefit from the combination of low input bias current, low noise, and low offset and bandwidth. The wide operating voltage range matches high performance ADCs and DACs. Audio applications and medical monitoring equipment can take advantage of the high input impedance, low voltage and current noise, wide bandwidth, and the lack of popcorn noise found in many other low input bias current amplifiers. The AD866x family is specified over the extended industrial temperature range (−40°C to +125°C). 5 V+ 4 –IN TOP VIEW (Not to Scale) +IN 3 06195-039 V– 2 AD8665 NC 1 –IN 2 +IN 3 AD8665 TOP VIEW 4 (Not to Scale) VEE 8 NC 7 VCC 6 OUT 5 NC NC = NO CONNECT 06195-040 Figure 1. AD8665, 5-Lead SOT-23 (RJ-5) Figure 2. AD8665, 8-Lead SOIC_N (R-8) OUT A 1 –IN A 2 +IN A 3 AD8666 TOP VIEW 4 (Not to Scale) V– 8 V+ 7 OUT B 6 –IN B 5 +IN B 06018-001 Sensor amplification Reference buffers Medical equipment Physiological measurements Signal filters and conditioning Consumer audio Photodiode amplification ADC driver Level shifting circuits OUT 1 Figure 3. AD8666, 8-Lead SOIC_N (R-8) OUT A 1 8 V+ –IN A 2 AD8666 7 OUT B +IN A 3 6 –IN B V– 4 TOP VIEW (Not to Scale) 5 +IN B 06195-002 APPLICATIONS PIN CONFIGURATIONS Figure 4. AD8666, 8-Lead MSOP (RM-8) OUT A 1 14 OUT D IN A 2 13 –IN D +IN A 3 AD8668 V+ 4 TOP VIEW (Not to Scale) +IN B 5 10 +IN C –IN B 6 9 –IN C OUT B 7 8 OUT C 12 +IN D 11 V– 06195-003 Offset voltage: 2.5 mV max Low input bias current: 1 pA max Single-supply operation: 5 V to 16 V Dual-supply operation: ±2.5 V to ±8 V Low noise: 8 nV/√Hz @ 10 kHz Wide bandwidth: 4 MHz Rail-to-rail output Unity-gain stable Lead-free packaging Figure 5. AD8668, 14-Lead TSSOP (RU-14) OUT A 1 14 –IN A 2 13 –IN D +IN A 3 12 +IN D AD8648 AD8668 OUT D 11 V– TOP VIEW (Not to Scale) 10 +IN C V+ 4 +IN B 5 –IN B 6 9 –IN C OUT B 7 8 OUT C 06195-004 FEATURES Figure 6. AD8668, 14-Lead SOIC_N (R-14) Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. AD8665/AD8666/AD8668 TABLE OF CONTENTS Features .............................................................................................. 1 Absolute Maximum Ratings ............................................................5 Applications....................................................................................... 1 Thermal Resistance .......................................................................5 General Description ......................................................................... 1 ESD Caution...................................................................................5 Pin Configurations ........................................................................... 1 Typical Performance Characteristics ..............................................6 Revision History ............................................................................... 2 Outline Dimensions ....................................................................... 12 Specifications..................................................................................... 3 Ordering Guide .......................................................................... 13 REVISION HISTORY 10/06—Rev. 0 to Rev. A Added AD8665 ...................................................................Universal Added New Figure 1 and Figure 2, Renumbered Sequentially................................................................ 1 Changes to Table 4............................................................................ 5 Changes to Figure 8, Figure 9, and Figure 11 ............................... 6 Change to Figure 40 ....................................................................... 11 Updated Outline Dimensions ....................................................... 12 Changes to Ordering Guide .......................................................... 13 4/06—Rev 0: Initial Version Rev. A | Page 2 of 16 AD8665/AD8666/AD8668 SPECIFICATIONS VDD = 5.0 V, VCM = VDD/2, TA = 25oC, unless otherwise noted. Table 1. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Conditions VOS Offset Voltage Drift Input Bias Current ΔVOS/ΔT IB VCM = 2.5 V VCM = −0.1 V to +3.0 V −40°C < TA < +125°C −40°C < TA < +125°C Input Offset Current IOS Min Typ Max Unit 0.7 2.5 3.0 5.0 10 1 550 0.5 70 +3.0 mV mV mV μV/°C pA pA pA pA V dB dB V/mV 3.0 0.2 −40°C < TA < +125°C 0.1 −40°C < TA < +125°C Input Voltage Range Common-Mode Rejection Ratio Large-Signal Voltage Gain OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Output Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier VCM CMRR AVO VOH VOL ISC ZOUT PSRR VCM = −0.1 V to +3.0 V −40°C < TA < +125°C RL = 2 kΩ, VO = 0.5 V to 4.5 V IOUT = 1 mA −40°C < TA < +125°C IOUT = 1 mA −40°C < TA < +125°C −0.1 84 79 68 4.88 4.86 ISY 145 4.93 50 98 94 115 1.1 −40°C < TA < +125°C DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Peak-to-Peak Noise Voltage Noise Density Channel Separation 85 105 ±19 50 At 1 MHz, AV = 1 VDD = 5.0 V to 16 V −40°C < TA < +125°C 100 1.4 2.0 V V mV mV mA Ω dB dB mA mA SR GBP ΦM RL = 2 kΩ 3.5 4 70 V/μs MHz Degrees en p-p en 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz f = 10 kHz 2.4 10 8 −115 μV p-p nV/√Hz nV/√Hz dB CS Rev. A | Page 3 of 16 AD8665/AD8666/AD8668 VDD = 16 V, VCM = VDD/2, TA = 25oC, unless otherwise noted. Table 2. Parameter INPUT CHARACTERISTICS Offset Voltage Symbol Conditions VOS Offset Voltage Drift Input Bias Current ΔVOS/ΔT IB VCM = 8 V VCM = −0.1 V to +14.0 V −40°C < TA < +125°C −40°C < TA < +125°C Input Offset Current IOS Min Typ Max Unit 0.6 2.5 3.0 5.0 10 1 550 0.5 70 +14.0 mV mV mV μV/°C pA pA pA pA V dB dB V/mV 3.0 0.2 −40°C < TA < +125°C 0.1 −40°C < TA < +125°C Input Voltage Range Common-Mode Rejection Ratio Large-Signal Voltage Gain OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Output Current Closed-Loop Output Impedance POWER SUPPLY Power Supply Rejection Ratio Supply Current per Amplifier VCM CMRR AVO VOH VOL ISC ZOUT PSRR VCM = −0.1 V to +14.0 V −40°C < TA < +125°C RL = 2 kΩ, VO = 0.5 V to 15.5 V IOUT = 1 mA −40°C < TA < +125°C IOUT = 1 mA −40°C < TA < +125°C −0.1 90 80 130 15.94 15.90 ISY 255 15.96 22 98 94 115 1.15 −40°C < TA < +125°C DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Peak-to-Peak Noise Voltage Noise Density Channel Separation 40 50 ±140 50 At 1 MHz, AV = 1 VDD = 5.0 V to 16 V −40°C < TA < +125°C 110 1.55 2.0 V V mV mV mA Ω dB dB mA mA SR GBP ΦM RL = 2 kΩ 3.5 4 73 V/μs MHz Degrees en p-p en 0.1 Hz to 10 Hz f = 1 kHz f = 10 kHz f = 10 kHz 2.5 10 8 −115 μV p-p nV/√Hz nV/√Hz dB CS Rev. A | Page 4 of 16 AD8665/AD8666/AD8668 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 3. Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit to GND Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering, 60 sec) Junction Temperature Rating 18 V GND to VDD ±18 V Indefinite −65°C to +150°C −40°C to +125°C 300°C 150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4. Thermal Resistance Package Type 5-Lead SOT-23 (RJ-5) 8-Lead SOIC_N (R-8) 8-Lead MSOP (RM-8) 14-Lead SOIC (R-14) 14-Lead TSSOP (RU-14) ESD CAUTION Rev. A | Page 5 of 16 θJA 240 158 210 120 180 θJC 92 43 45 36 35 Unit °C/W °C/W °C/W °C/W °C/W AD8665/AD8666/AD8668 TYPICAL PERFORMANCE CHARACTERISTICS 100 300 VS = 5V AND 16V 250 INPUT BIAS CURRENT (pA) NUMBER OF AMPLIFIERS VDD = 16V 90 VCM = 8V TA = 25°C 80 600 AMPLIFIERS 70 60 50 40 30 20 200 150 100 50 0 1 3 2 INPUT OFFSET VOLTAGE (mV) 0 –40 10000 OUTPUT SATURATION VOLTAGE (mV) NUMBER OF AMPLIFIERS 16 14 12 10 8 6 4 0 1 2 3 4 5 6 7 8 9 10 11 12 TCVOS (µV/°C) 100 1 0 –1 –2 –3 –4 4 5 6 7 8 9 10 11 12 13 14 15 INPUT COMMON-MODE VOLTAGE (V) VOL SINKING 1 0.01 0.1 1 100 10 LOAD CURRENT (mA) OUTPUT SATURATION VOLTAGE (mV) 2 06195-007 INPUT OFFSET VOLTAGE (mV) 3 3 120 10 100 2 100 Figure 11. Output Saturation Voltage vs. Load Current VDD = 16V 4 TA = 25°C 1 80 VDD = 16V TA = 25°C 0.1 0.001 5 0 60 VDD TO VOH SOURCING Figure 8. VOS Drift (TCVOS) Distribution –5 –1 40 1000 06195-006 2 0 20 Figure 10. Input Bias Current vs. Temperature VDD = 16V VCM = 8V –40°C < TA < +125°C 300 AMPLIFIERS 18 0 TEMPERATURE (°C) Figure 7. Input Offset Voltage Distribution 20 –20 06195-009 –1 VDD = 16V IOUT = 1mA 80 60 VDD TO VOH SOURCING 40 VOL SINKING 20 0 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) Figure 12. Output Saturation Voltage vs. Temperature Figure 9. Offset Voltage vs. Common-Mode Voltage Rev. A | Page 6 of 16 120 06195-010 –2 06195-005 0 –3 06195-008 10 AD8665/AD8666/AD8668 20 90 135 ФM = 73° GAIN 0 180 VDD = 16V TA = 25°C 80 60 PSRR (dB) 45 PHASE 40 40 20 PSRR– 100k 1M 0 1k 06195-011 10k 225 10M FREQUENCY (Hz) 1M 4M Figure 16. Power Supply Rejection Ratio vs. Frequency 100 VDD = 16V VOLTAGE NOISE DENSITY (nV/√Hz) VDD = 5V TO 16V TA = 25°C 10 AV = +100 AV = +10 AV = +1 1 0.01 100 1k 10k 100k 1M 10M FREQUENCY (Hz) 1 10 06195-012 0.1 10 10k 1k FREQUENCY (Hz) Figure 17. Voltage Noise Density vs. Frequency Figure 14. Closed-Loop Output Impedance vs. Frequency 120 100 VDD = 5V TO 16V TA = 25°C VDD = 16V TA = 25°C VOLTAGE (1µV/DIV) 100 80 60 40 10k 100k 1M FREQUENCY (Hz) 4M Figure 15. Common-Mode Rejection Ratio vs. Frequency TIME (1s/DIV) Figure 18. 0.1 Hz to 10 Hz Voltage Noise Rev. A | Page 7 of 16 06195-016 0 1k 06195-013 20 06195-015 100 ZOUT (Ω) 100k FREQUENCY (Hz) Figure 13. Open-Loop Gain and Phase vs. Frequency 1000 10k 06195-014 PSRR+ –20 1k CMRR (dB) OPEN-LOOP GAIN (dB) 60 100 0 VDD = 16V RL = 2kΩ CL = 10pF OPEN-LOOP PHASE SHIFT (Degrees) 80 AD8665/AD8666/AD8668 VDD = 16V RL = 10kΩ CL = 10pF AV = +1 0V VOUT (20mV/DIV) VDD = ±8V AV = –100 VIN –100mV 8V VOUT TIME (0.5µs/DIV) TIME (5µs/DIV) Figure 19. Small-Signal Transient Response 10 Figure 22. Positive Overload Recovery Time VDD = ±8V RL = 10kΩ CL = 10pF AV = +1 8 6 06195-020 06195-017 0V 100mV VDD = ±8V AV = –100 VIN VOUT (V) 4 2 0V 0 0V –2 –4 –6 06195-018 –10 TIME (2µs/DIV) TIME (5µs/DIV) Figure 23. Negative Overload Recovery Time Figure 20. Large-Signal Transient Response 80 70 VDD = 16V VIN = 100mV p-p 70 NUMBER OF AMPLIFIERS 60 40 +OS –OS 20 10 VDD = 5V VCM = 2.5V TA = 25°C 550 AMPLIFIERS 60 50 40 30 20 0 1 10 100 1000 LOAD CAPACITANCE (pF) 0 –3 –2 –1 0 1 2 INPUT OFFSET VOLTAGE (mV) Figure 24. Input Offset Voltage Distribution Figure 21. Small-Signal Overshoot vs. Load Capacitance Rev. A | Page 8 of 16 3 06195-022 10 06195-019 OVERSHOOT (%) 50 30 06195-021 VOUT –8V –8 AD8665/AD8666/AD8668 OUTPUT SATURATION VOLTAGE (mV) 20 15 10 5 0 1 2 3 4 5 6 7 8 10 9 TCVOS (µV/°C) 100 VDD TO VOH SOURCING 80 60 20 0 –40 –20 0 20 40 60 80 Figure 28. Output Saturation Voltage vs. Temperature 80 5 60 OPEN-LOOP GAIN (dB) 3 2 1 0 –1 –2 0 VDD = 5V RL = 2kΩ CL = 10pF VDD = 5V TA = 25°C 4 120 100 TEMPERATURE (°C) Figure 25. VOS Drift (TCVOS) Distribution INPUT OFFSET VOLTAGE (mV) VOL SINKING 40 06195-023 0 VDD = 5V ILOAD = 1mA 06195-026 25 NUMBER OF AMPLIFIERS 120 VDD = 5V VCM = 2.5V –40°C ≤ TA ≤ +125°C 300 AMPLIFIERS 45 PHASE 40 20 GAIN 90 135 ФM = 70° 0 –3 180 OPEN-LOOP PHASE SHIFT (Degrees) 30 –4 0.5 1.0 1.5 2.0 2.5 3.5 3.0 INPUT COMMON-MODE VOLTAGE (V) –20 1k 10k FREQUENCY (Hz) 1000 VDD = 5V TA = 25°C VDD = 5V 100 VDD TO VOH SOURCING 10 ZOUT (Ω) 100 VOL SINKING 1 10 AV = +100 1 AV = +10 0.1 0.1 0.001 0.01 0.1 1 10 LOAD CURRENT (mA) 20 0.01 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 30. Closed-Loop Output Impedance vs. Frequency Figure 27. Output Saturation Voltage vs. Load Current Rev. A | Page 9 of 16 06195-028 AV = +1 06195-025 OUTPUT SATURATION VOLTAGE (mV) 1000 225 10M 1M Figure 29. Open-Loop Gain and Phase vs. Frequency Figure 26. Offset Voltage vs. Common-Mode Voltage 3000 100k 06195-027 0 06195-024 –5 –0.5 AD8665/AD8666/AD8668 120 1.5 VDD = 5V TA = 25°C VDD = ±2.5V RL = 10kΩ CL = 10pF AV = +1 1.0 100 0.5 0 VOUT (V) CMRR (dB) 80 60 –0.5 –1.0 40 –1.5 20 10k 100k 4M 1M FREQUENCY (Hz) –2.5 06195-029 0 1k TIME (1µs/DIV) Figure 34. Large-Signal Transient Response Figure 31. Common-Mode Rejection Ratio vs. Frequency 100 06195-032 –2.0 70 VDD = 5V TA = 25°C VDD = 5V VIN = 100mV p-p 60 80 OVERSHOOT (%) 60 40 40 +OS 30 –OS 20 PSRR– 20 10 10k 100k 1M 4M FREQUENCY (Hz) 0 06195-030 1 10 1000 100 LOAD CAPACITANCE (pF) Figure 32. Power Supply Rejection Ratio vs. Frequency Figure 35. Small-Signal Overshoot vs. Load Capacitance VDD = ±2.5V AV = –100 VDD = 5V RL = 100kΩ CL = 10pF AV = +1 2.5V VOUT 0V 0V VIN TIME (0.4µs/DIV) 06195-031 –100mV TIME (4µs/DIV) Figure 36. Positive Overload Recovery Time Figure 33. Small-Signal Transient Response Rev. A | Page 10 of 16 06195-034 0 1k 06195-033 PSRR+ VOUT (20mV/DIV) PSRR (dB) 50 AD8665/AD8666/AD8668 2.00 VDD = ±2.5V AV = –100 1.75 SUPPLY CURRENT (mA) 100mV VIN 0V 0V 1.50 1.25 1.00 0.75 0.50 VOUT 06195-035 TIME (4µs/DIV) 0 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE (V) Figure 37. Negative Overload Recovery Time Figure 39. Supply Current vs. Supply Voltage 10 VOUT = VDD/2 1.8 8 1.6 6 1.4 VOLTAGE (V) VDD = 5V 1.0 0.8 VOUT 2 0 –2 0.6 –4 0.4 –6 0.2 –8 –20 0 20 40 60 80 100 TEMPERATURE (°C) 120 –10 TIME (10µs/DIV) Figure 40. No Output Phase Reversal Figure 38. Supply Current vs. Temperature Rev. A | Page 11 of 16 06195-038 0 –40 VDD = ±8V AV = +1 VIN 4 VDD = 16V 1.2 06195-036 SUPPLY CURRENT (mA) 2.0 16 06195-037 0.25 –2.5V AD8665/AD8666/AD8668 OUTLINE DIMENSIONS 5.10 5.00 4.90 5.00 (0.1968) 4.80 (0.1890) 8 5 4.00 (0.1574) 3.80 (0.1497) 1 6.20 (0.2440) 4 5.80 (0.2284) 1.27 (0.0500) BSC 14 0.50 (0.0196) × 45° 0.25 (0.0099) 1.75 (0.0688) 1.35 (0.0532) 0.25 (0.0098) 0.10 (0.0040) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 8 4.50 4.40 4.30 6.40 BSC 1 7 PIN 1 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. 0.65 BSC 1.05 1.00 0.80 1.20 MAX 0.15 0.05 0.30 0.19 0.20 0.09 SEATING COPLANARITY PLANE 0.10 0.75 0.60 0.45 8° 0° COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 41. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) Figure 43. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters 3.20 3.00 2.80 8 3.20 3.00 2.80 1 8.75 (0.3445) 8.55 (0.3366) 5 4.00 (0.1575) 3.80 (0.1496) 5.15 4.90 4.65 4 0.25 (0.0098) 0.10 (0.0039) PIN 1 14 8 1 7 1.27 (0.0500) BSC 6.20 (0.2441) 5.80 (0.2283) 1.75 (0.0689) 1.35 (0.0531) 0.65 BSC 0.95 0.85 0.75 COPLANARITY 0.10 1.10 MAX 0.15 0.00 0.38 0.22 COPLANARITY 0.10 0.23 0.08 8° 0° SEATING PLANE 0.80 0.60 0.40 0.51 (0.0201) 0.31 (0.0122) SEATING PLANE 0.50 (0.0197) × 45° 0.25 (0.0098) 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 42. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Figure 44. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) Rev. A | Page 12 of 16 AD8665/AD8666/AD8668 2.90 BSC 5 4 2.80 BSC 1.60 BSC 1 2 3 PIN 1 0.95 BSC 1.90 BSC 1.30 1.15 0.90 1.45 MAX 0.15 MAX 0.50 0.30 0.22 0.08 SEATING PLANE 10° 5° 0° 0.60 0.45 0.30 COMPLIANT TO JEDEC STANDARDS MO-178-AA Figure 45. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters ORDERING GUIDE Model AD8665ARZ 1 AD8665ARZ-REEL1 AD8665ARZ-REEL71 AD8665ARJZ-R21 AD8665ARJZ-REEL1 AD8665ARJZ-REEL71 AD8666ARZ1 AD8666ARZ-REEL1 AD8666ARZ-REEL71 AD8666ARMZ-R21 AD8666ARMZ-REEL1 AD8668ARZ1 AD8668ARZ-REEL1 AD8668ARZ-REEL71 AD8668ARUZ1 AD8668ARUZ-REEL1 1 Temperature Range −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C −40°C to +125°C Package Description 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 5-Lead SOT-23 5-Lead SOT-23 5-Lead SOT-23 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead MSOP 8-Lead MSOP 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead SOIC_N 14-Lead TSSOP 14-Lead TSSOP Z = Pb-free part. Rev. A | Page 13 of 16 Package Option R-8 R-8 R-8 RJ-5 RJ-5 RJ-5 R-8 R-8 R-8 RM-8 RM-8 R-14 R-14 R-14 RU-14 RU-14 Branding A1B A1B A1B A16 A16 AD8665/AD8666/AD8668 NOTES Rev. A | Page 14 of 16 AD8665/AD8666/AD8668 NOTES Rev. A | Page 15 of 16 AD8665/AD8666/AD8668 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06195-0-10/06(A) Rev. A | Page 16 of 16