NJRC NJG1524APC1 Dpdt switch gaas mmic Datasheet

NJG1524APC1
DPDT SWITCH GaAs MMIC
nGENERAL DESCRIPTION
nPACKAGE OUTLINE
NJG1524APC1 is a DPDT switch GaAs MMIC.
The two same switches are merged into one package
and functionally linked. It is useful for switching two
circuits in-line.
Each switches feature very o
l w loss, high isolation
and wide frequency coverage from 50MHz to 3GHz at
low control voltage of 2.5V.
The ultra small & thin FFP16-C1package is adopted.
nFEATURES
lSingle low voltage control
lLow insertion loss
NJG1524APC1
+2.5~+6.5V
0.3dB typ.@f=1GHz, PIN=0dBm, each switch
0.5dB typ.@f=2GHz, PIN=0dBm, each switch
42dB typ. @f=2GHz,PC1-PC2
27dB typ.@f=2GHz, PC1-PA1 PC1-PA2, PC2-PB1,
PC2-PB2, PA1-PA2, PB1-PB2
20dBm max. @f=2GHz, VCTL=2.7V
16uA typ.@f=2GHz, PIN=10dBm
FFP16-C1 (Package size: 2.5x2.5x0.85mm)
lHigh isolation
lHanding power
lLow current consumption
lUltra small & thin package
nPIN CONFIGURATION
FFP16 Type
(Top View)
16
15
14
Pin Connection
13
1.GND
9.GND
2.GND
10.PC1
1
12
2
11
3.PC2
11.GND
3
10
4.GND
12.GND
5.PB1
13.PA2
4
9
6.NC
14.VCTL1
5
6
7
7.VCTL1 15.VCTL2
8
8.PA1
16.PB2
nTRUTH TABLE
“H”=VCTL (H), “L”=VCTL (L)
VCTL1
VCTL2
PC1 – PA1
PC2 – PB1
PC1 – PA2
PC2 – PB2
H
L
L
H
ON
OFF
OFF
ON
NOTE: Please note that any information on this catalog will be subject to change.
-1-
NJG1524APC1
nABSOLUTE MAXIMUM RATINGS
(Ta=25°C)
PARAMETER
Input Power
Control voltage
SYMBOL
CONDITIONS
RATINGS
UNITS
PIN
VCTL (L)=0V, VCTL (H)=2.7V
28
dBm
VCTL (H) - VCTL (L)
7.5
V
VCTL
Power Dissipation
PD
400
mW
Operating Temp.
Topr
-40~+85
°C
Storage Temp.
Tstg
-55~+125
°C
nELECTRACAL CHARACTERISTICS (EACH SWITCH)
(VCTL (L)=0V, VCTL (H)=2.7V, ZS=ZO=50Ω, Ta=25°C)
PARAMETER
SYMBOL
Operating voltage (L)
Operating voltage (H)
MIN
TYP
MAX
UNITS
VCTL (L)
-0.2
0
0.2
V
VCTL (H)
2.5
2.7
6.5
V
-
16
28
uA
-
0.3
0.6
dB
-
0.5
0.8
dB
25.5
27
-
dB
25
27
-
dB
ISL3
PA1, PA2, PB1, PB2 port
50Ω terminal, PC1-PC2
port, f=2GHz, PIN=0dBm
VCTL1=2.7V
39
42
-
dB
P-1dB
f=2GHz
20
23
-
dBm
f=0.05~2GHz, ON State
-
1.3
1.6
f=0.05~2.5GHz
-
40
60
Control Current
ICTL
Insertion loss1
Loss1
Insertion loss2
Loss2
Isolation1
ISL1
Isolation2
ISL2
Isolation3
Pin at 1dB
compression point
VSWR (PC, P1, P2)
Switch time
-2-
VSWR
TSW
CONDITIONS
f=2GHz, PIN=10dBm
PC1-PA1, PC1-PA2,
PC2-PB1, PC2-PB2 ON,
f=1GHz, PIN=0dBm
PC1-PA1, PC1-PA2,
PC2-PB1, PC2-PB2 ON,
f=2GHz, PIN=0dBm
PC1-PA1, PC1-PA2,
PC2-PB1, PC2-PB2 OFF,
f=1GHz, PIN =0dBm
PC1-PA1, PC1-PA2,
PC2-PB1, PC2-PB2 OFF,
f=2GHz, PIN =0dBm
ns
NJG1524APC1
nTERMINAL INFORMATION
No.
SYMBOL
3
PC2
5
PB1
6
NC
7
VCTL1
8
PA1
10
PC1
13
PA2
14
VCTL1
15
VCTL2
16
PB2
1, 2, 4, 9,
11, 12
GND
DESCRIPTIONS
Common RF port C2. In order to block the DC bias voltage of internal
circuit, an external capacitor is required.
RF port B1. This port is connected with PC1 port by controlling
VCTL2 to -0.2~+0.2V and VCTL1 to 2.5~6.5V. In order to block the
DC bias voltage of internal circuit, an external capacitor is required.
No connected terminal.
Control port 1. The voltage of this port controls PC1 to PA1/PA2 and
PC2 to PB1/PB2 state. The ‘ON’ and ‘OFF’ state is toggled by
controlling voltage of this terminal to high-state (2.5~6.5V) or
low-state (-0.2~+0.2V). The voltage of VCTL2 should be set to
opposite state. The bypass capacitor should be connected with GND
as close as possible for excellent RF performance.
RF port A1. This port is connected with PC1 port by controlling
VCTL2 to -0.2~+0.2V and VCTL1 to 2.5~6.5V. In order to block the
DC bias voltage of internal circuit, an external capacitor is required.
Common RF port C1. In order to block the DC bias voltage of internal
circuit, an external capacitor is required.
RF port A2. This port is connected with PC1 port by controlling VCTL
(L) to -0.2~+0.2V and VCTL (H) to 2.5~6.5V. In order to block the DC
bias voltage of internal circuit, an external capacitor is required.
Control port 1. The voltage of this port controls PC1 to PA1/PA2 and
PC2 to PB1/PB2 state. The ‘ON’ and ‘OFF’ state is toggled by
controlling voltage of this terminal to high-state (2.5~6.5V) or
low-state (-0.2~+0.2V). The voltage of VCTL2 should be set to
opposite state. The bypass capacitor should be connected with GND
as close as possible for excellent RF performance.
Control port 2. The voltage of this port controls PC1 to PA1/PA2 and
PC2 to PB1/PB2 state. The ‘ON’ and ‘OFF’ state is toggled by
controlling voltage of this terminal to high-state (2.5~6.5V) or
low-state (-0.2~+0.2V). The voltage of VCTL1 should be set to
opposite state. The bypass capacitor should be connected with GND
as close as possible for excellent RF performance.
RF port B2. This port is connected with PC2 port by controlling
VCTL1 to -0.2~+0.2V and VCTL2 to 2.5~6.5V. In order to block the
DC bias voltage of internal circuit, an external capacitor is required.
Ground terminal. Please connect this terminal with ground plane as
close as possible for excellent RF performance.
-3-
NJG1524APC1
nTYPICAL CHARACTERISTICS
(50MHz~3GHz, with application circuit, without DC blocking capacitor, losses of circuit are excluded.)
PC1-PA1 Insetion Loss vs. Frequency
PC1-PA2 Insetion Loss vs. Frequency
( VCTL1=0V, VCTL2=2.7V )
( VCTL1=2.7V, VCTL2=0V )
0.0
Insertion Loss (dB)
Insertion Loss (dB)
0.0
-0.5
-1.0
-1.5
-2.0
0.0
0.5
1.0
1.5
2.0
2.5
-0.5
-1.0
-1.5
-2.0
0.0
3.0
0.5
Frequency (GHz)
PC1-PA1 Isolation vs. Frequency
( VCTL1=0V, VCTL2=2.7V )
2.0
2.5
3.0
( VCTL1=2.7V, VCTL2=0V )
0
-10
-10
Isolation (dB)
Isolation (dB)
1.5
PC1-PA2 Isolation vs. Frequency
0
-20
-30
-40
-50
0.0
1.0
Frequency (GHz)
-20
-30
-40
0.5
1.0
1.5
2.0
2.5
-50
0.0
3.0
0.5
Frequency (GHz)
1.0
1.5
2.0
2.5
3.0
Frequency (GHz)
PC1-PC2 Isolation vs. Frequency
PA1 VSWR vs. Frequency
( VCTL1=2.7V, VCTL2=0V )
( VCTL1=2.7V, VCTL2=0V )
-20
3.0
-30
-40
VSWR
Isolation (dB)
2.5
-50
1.5
-60
-70
0.0
0.5
1.0
1.5
2.0
Frequency (GHz)
-4-
2.0
2.5
3.0
1.0
0.0
0.5
1.0
1.5
2.0
Frequency (GHz)
2.5
3.0
NJG1524APC1
nTYPICAL CHARACTERISTICS
(50MHz~3GHz, with application circuit, without DC blocking capacitor, losses of circuit are excluded.)
Output Power ,Insertion Loss vs. Input Power
Output Power ,Insertion Loss vs. Input Power
( PC1-PA1 ,f=2GHz )
( PC1-PA2 ,f=2GHz )
Output Power (dBm)
25
20
-3.0
25
-2.5
20
15
-2.0
10
-1.5
5
-1.0
0
-5
10
15
20
25
30
Output Power (dBm)
VCTL=2.5V
VCTL=2.7V
VCTL=3.0V
VCTL=3.5V
VCTL=4.0V
VCTL=5.0V
VCTL=6.5V
30
-3.5
VCTL=2.5V
VCTL=2.7V
VCTL=3.0V
VCTL=3.5V
VCTL=4.0V
VCTL=5.0V
VCTL=6.5V
-3.0
-2.5
15
-2.0
10
-1.5
5
-1.0
-0.5
0
-0.5
0.0
-5
Insertion Loss (dB)
-3.5
Insertion Loss (dB)
30
0.0
10
15
Input Power (dBm)
20
25
30
Input Power (dBm)
Switching Speed
(VCTL=2.7V,Pin=10dBm)
VCTL1
40ns
PA1port
-5-
NJG1524APC1
nTYPICAL CHARACTERISTICS
Insertion Loss vs. Ambient Temperature
Insertion Loss vs. Ambient Temperature
(PC1-PA2,f=2GHz,Pin=0dBm)
-0.2
-0.3
-0.3
Insertion Loss (dB)
Insertion Loss (dB)
(PC1-PA2,f=1GHz,Pin=0dBm)
-0.2
-0.4
-0.5
VCTL=2.5V
VCTL=2.7V
VCTL=3.0V
VCTL=3.5V
VCTL=4.0V
VCTL=5.0V
VCTL=6.0V
-0.6
-0.7
-0.8
-50
-0.4
-0.5
-0.6
-0.7
0
50
-0.8
-50
100
o
100
PC1-PA2 Isolation vs. Ambient Temperature
( f=1GHz, VCTL2=0V )
( f=2GHz, VCTL2=0V )
-20
-20
VCTL1=2.5V
VCTL1=2.7V
VCTL1=6.5V
-25
VCTL1=2.5V
VCTL1=2.7V
VCTL1=6.5V
-25
Isolation (dB)
Isolation (dB)
50
Ambient Temperature ( C)
PC1-PA2 Isolation vs. Ambient Temperature
-30
-35
-30
-35
-40
-50
0
50
-40
100
-50
o
100
P-1dB vs. Ambient Temperature
(PC1-PA2 ,f=2GHz)
( PC1-PA2 ,f=1GHz ,Pin=10dBm )
60
28
VCTL=4.0V
VCTL=5.0V
VCTL=6.5V
26
P-1dB (dBm)
VCTL=2.5V
VCTL=2.7V
VCTL=3.0V
VCTL=3.5V
40
30
20
10
-50
50
Ambient Temperature ( C )
Control Current vs. Ambient Temperature
50
0
o
Ambient Temperature ( C )
Control Current (uA)
0
o
Ambient Temperature ( C)
24
22
20
0
50
100
o
Ambient Temperature ( C)
-6-
VCTL=2.5V
VCTL=2.7V
VCTL=3.0V
VCTL=3.5V
VCTL=4.0V
VCTL=5.0V
VCTL=6.0V
18
-50
VCTL=2.5V
VCTL=2.7V
VCTL=3.0V
VCTL=3.5V
0
50
100
o
Ambient Temperature ( C)
NJG1524APC1
nAPPLICATION CIRCUIT
n RECOMMENDED PCB DESIGN
PA1
PB1
C5
C6
PC1
C1
C2
C4
C7 C8
PC2
C3
PCB SIZE=26x26mm
PCB: FR-4, t=0.5mm
CAPACITOR: size 1005
Strip line width=1.0mm
Parts table
PA2
VCTL1
VCTL2
Parts ID
1
fin=50-100
MHz
2
fin=0.1-0.5
GHz
3
fin=0.5-2.5
GHz
C1~C6
0.01uF
1000pF
56pF
C7,C8
10pF
10pF
10pF
PB2
PRECAUTION
[1]The DC blocking capacitor have to be placed at RF terminal of PC1, PC2, PA1, PA2, PB1, PB2.
Please choose appropriate capacitance values to the application frequency.
[2]To reduce stripline influence on RF characteristics, please locate bypass capacitors (C7, C8)
close to each terminal.
[3]For good isolation the GND terminal must be placed possibly close to ground place of substrate,
and through holes for GND should be placed near by the pin connection.
-7-
NJG1524APC1
nPACKAGE OUTLINE (FFP16-C1)
1pin INDEX
0.35
2pin INDEX
0.254±0.1
0.17
2.5±0.1
0.30
0.10
0.30
0.85±0.15
0.50
0.50
0.20
UNIT
: mm
PCB
: Ceramic
OVER COAT
: Epoxy resin
TERMINAL TREAT : Au
0.365
0.27
WEIGHT
Cautions on using this product
This product contains Gallium-Arsenide (GaAs) which is a harmful material.
• Do NOT eat or put into mouth.
• Do NOT dispose in fire or break up this product.
• Do NOT chemically make gas or powder with this product.
• To waste this product, please obey the relating law of your country.
This product may be damaged with electric static discharge (ESD) or spike voltage. Please handle
with care to avoid these damages.
-8-
: 15mg
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
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