Infineon AUIRF7304Q Automotive grade Datasheet

AUTOMOTIVE GRADE
Features
 Advanced Planar Technology
 Low On-Resistance
 Dual P Channel MOSFET
 Dynamic dv/dt Rating
 Logic Level
 150°C Operating Temperature
 Fast Switching
 Lead-Free, RoHS Compliant
 Automotive Qualified *
HEXFET® Power MOSFET
Package Type
AUIRF7304Q
SO-8
S1
1
8
D1
G1
2
7
D1
S2
3
6
D2
G2
4
5
D2
VDSS
-20V
RDS(on) max.
ID
0.090
-4.3A
Top View
Description
Specifically designed for Automotive applications, this
cellular design of HEXFET® Power MOSFETs utilizes the
latest processing techniques to achieve low on-resistance
per silicon area. This benefit combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in Automotive and a wide variety of other
applications.
Base part number
AUIRF7304Q
SO-8
AUIRF7304Q
G
Gate
Standard Pack
Form
Quantity
Tape and Reel
4000
D
Drain
S
Source
Orderable Part Number
AUIRF7304QTR
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress
ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance
and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless
otherwise specified.
Symbol
Parameter
Max.
ID @ TA = 25°C
Continuous Drain Current, VGS @ -4.5V
-4.7
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
Continuous Drain Current, VGS @ -4.5V
Continuous Drain Current, VGS @ -4.5V
Pulsed Drain Current 
Maximum Power Dissipation 
-4.3
-3.4
-17
2.0
VGS
dv/dt
TJ
TSTG
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt 
Operating Junction and
Storage Temperature Range
Thermal Resistance
Symbol
RJA
Parameter
Junction-to-Ambient 
Units
A
W
0.016
± 12
-5.0
-55 to + 150
W°/C
V
V/ns
°C
Typ.
Max.
Units
–––
62.5
°C/W
HEXFET® is a registered trademark of Infineon.
*Qualification standards can be found at www.infineon.com
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AUIRF7304Q
Static @ TJ = 25°C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Trans conductance
IDSS
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
Conditions
-20
––– –––
V VGS = 0V, ID = -250µA
––– -0.012 ––– V/°C Reference to 25°C, ID = -1mA
––– ––– 0.090
VGS = -4.5V, ID = -2.2A 

––– ––– 0.140
VGS = -2.7V, ID = -1.8A 
-0.70 ––– -1.5
V VDS = VGS, ID = -250µA
4.0
––– –––
S VDS = -16V, ID = -2.2A
––– ––– -1.0
VDS = - 16V, VGS = 0V
µA
––– ––– -25
VDS = -16V,VGS = 0V,TJ =125°C
––– ––– -100
VGS = -12V
nA
––– –––
100
VGS = 12V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
8.4
26
51
33
22
3.3
9.0
–––
–––
–––
–––
LD
Internal Drain Inductance
–––
4.0
–––
LS
Internal Source Inductance
–––
6.0
–––
–––
–––
–––
610
310
170
–––
–––
–––
Min.
Typ. Max. Units
–––
–––
-2.5
–––
–––
-17
–––
–––
–––
–––
56
71
-1.0
84
110
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Diode Characteristics
Parameter
Continuous Source Current
IS
(Body Diode)
Pulsed Source Current
ISM
(Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ton
Forward Turn-On Time
ID = -2.2A
nC VDS = -16V
VGS = -4.5V, See Fig.6 & 12 
VDD = -10V
ID = -2.2A
ns
RG = 6.0
RD = 4.5See Fig.10 
Between lead,
6mm (0.25in.)
nH
from package
and center of die contact
VGS = 0V
pF VDS = -15V
ƒ = 1.0MHz, See Fig.5
Conditions
MOSFET symbol
showing the
A
integral reverse
p-n junction diode.
V TJ = 25°C,IS = -1.8A,VGS = 0V 
ns TJ = 25°C ,IF = -2.2A,
nC di/dt = 100A/µs 
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by max. junction temperature. (See Fig. 11)
ISD -2.2A, di/dt 50A/µs, VDD V(BR)DSS, TJ  150°C.
 Pulse width 300µs; duty cycle  2%.
 When mounted on 1 inch square copper board , t sec.
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AUIRF7304Q
100
100
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
-ID , Drain-to-Source Current (A)
-I D , Drain-to-Source Current (A)
10
1
-1.5V
20µs PULSE WIDTH
TJ = 25°C
A
0.1
0.01
VGS
- 7.5V
- 5.0V
- 4.0V
- 3.5V
- 3.0V
- 2.5V
- 2.0V
BOTTOM - 1.5V
TOP
TOP
0.1
1
10
10
1
-1.5V
20µs PULSE WIDTH
TJ = 150°C
0.1
0.01
100
0.1
2.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
-ID , Drain-to-Source Current (A)
100
TJ = 150°C
1
VDS = -15V
20µs PULSE WIDTH
0.1
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
-VGS , Gate-to-Source Voltage (V)
Fig. 3 Typical Transfer Characteristics
3
A
100
Fig. 2 Typical Output Characteristics
Fig. 1 Typical Output Characteristics
10
10
-VDS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
TJ = 25°C
1
A
I D = -3.6A
1.5
1.0
0.5
VGS = -4.5V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160
TJ , Junction Temperature (°C)
Fig. 4 Normalized On-Resistance
Vs. Temperature
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AUIRF7304Q
10
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = Cds + C gd
-V GS , Gate-to-Source Voltage (V)
C, Capacitance (pF)
1500
Ciss
1000
Coss
Crss
500
0
1
10
100
I D = -2.2A
VDS = -16V
8
6
4
2
FOR TEST CIRCUIT
SEE FIGURE 12
0
A
0
5
15
20
25
A
Q G , Total Gate Charge (nC)
-VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
10
-II D , Drain Current (A)
-ISD , Reverse Drain Current (A)
10
TJ = 150°C
TJ = 25°C
1
10
1ms
1
VGS = 0V
0.1
0.3
0.6
0.9
1.2
A
1.5
TA = 25 ° C
TJ = 150 ° C
Single Pulse
1
10ms
10
100
-VDS , Drain-to-Source Voltage (V)
-VSD , Source-to-Drain Voltage (V)
Fig. 7 Typical Source-Drain Diode
Forward Voltage
4
Fig 8. Maximum Safe Operating Area
2015-11-16
AUIRF7304Q
5.0
-ID , Drain Current (A)
4.0
3.0
2.0
1.0
Fig 10a. Switching Time Test Circuit
0.0
25
50
75
100
TC , Case Temperature
125
150
( °C)
Fig 9. Maximum Drain Current Vs.
Ambient Temperature
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJA )
100
D = 0.50
0.20
10
0.10
0.05
0.02
1
PDM
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
0.1
0.0001
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x ZthJA + TA
0.001
0.01
0.1
1
10
100
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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Fig 12a. Basic Gate Charge Waveform
Fig 12b. Gate Charge Test Circuit
Fig 13. Peak Diode Recovery dv/dt Test Circuit for P-Channel HEXFET® Power MOSFETs
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AUIRF7304Q
SO-8 Package Outline (Dimensions are shown in millimeters (inches)
D
D IM
B
8
6
7
6
M IN
A
.0532
.0688
1.35
1.75
A1
.0040
.0098
0.10
0.25
b
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
E
.1497
.1574
3.80
4.00
e
.050 B ASIC
1.27 B ASIC
e1
5
H
E
1
6X
2
3
0.25 [ .010]
4
A
e
e1
0.25 [ .010]
A1
C
A
M AX
.025 B ASIC
0.635 BASIC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
K x 45°
A
C
8X b
M ILLIM ETERS
M AX
5
A
IN C H ES
M IN
y
0.10 [ .004]
B
8X L
F O O T P R IN T
N O TE S :
1.
D IM E N S IO N IN G & T O L E R A N C IN G P E R A S M E Y 1 4 . 5 M - 1 9 9 4 .
2.
C O N T R O L L IN G D IM E N S IO N : M IL L IM E T E R
3.
D IM E N S IO N S A R E S H O W N IN M IL L IM E T E R S [ IN C H E S ] .
4.
O U T L IN E C O N F O R M S T O J E D E C O U T L IN E M S - 0 1 2 A A .
5
D IM E N S IO N D O E S N O T IN C L U D E M O L D P R O T R U S IO N S .
M O L D P R O T R U S IO N S N O T T O E X C E E D 0 .1 5 [ . 0 0 6 ] .
6
D IM E N S IO N D O E S N O T IN C L U D E M O L D P R O T R U S IO N S .
M O L D P R O T R U S IO N S N O T T O E X C E E D 0 .2 5 [ . 0 1 0 ] .
7
D IM E N S IO N IS T H E L E N G T H O F L E A D F O R S O L D E R IN G T O
A S U B S TR A TE .
8X c
7
8 X 0 .7 2 [ .0 2 8 ]
6 .4 6 [ .2 5 5 ]
3 X 1 .2 7 [ .0 5 0 ]
8 X 1 .7 8 [ .0 7 0 ]
SO-8 Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRF7304Q
SO-8 Tape and Reel (Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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AUIRF7304Q
Qualification Information
Qualification Level
Moisture Sensitivity Level
Machine Model
Human Body Model
ESD
Charged Device Model
RoHS Compliant
Automotive
(per AEC-Q101)
Comments: This part number(s) passed Automotive qualification. Infineon’s
Industrial and Consumer qualification level is granted by extension of the higher
Automotive level.
SO-8
MSL1
Class M1B (+/- 100V)†
AEC-Q101-002
Class H0 (+/- 250V)†
AEC-Q101-001
Class C5 (+/- 2000V)†
AEC-Q101-005
Yes
† Highest passing voltage.
Revision History
Date
11/16/2015
Comments


Updated datasheet with corporate template
Corrected ordering table on page 1.
Published by
Infineon Technologies AG
81726 München, Germany
© Infineon Technologies AG 2015
All Rights Reserved.
IMPORTANT NOTICE
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics
(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any
information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and
liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third
party.
In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this
document and any applicable legal requirements, norms and standards concerning customer’s products and any use of
the product of Infineon Technologies in customer’s applications.
The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of
customer’s technical departments to evaluate the suitability of the product for the intended application and the
completeness of the product information given in this document with respect to such application.
For further information on the product, technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies office (www.infineon.com).
WARNINGS
Due to technical requirements products may contain dangerous substances. For information on the types in question
please contact your nearest Infineon Technologies office.
Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized
representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a
failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.
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