NLX2G07 Dual Non-Inverting Buffer, Open Drain The NLX2G07 MiniGatet is an advanced high-speed CMOS dual non-inverting buffer with open drain output in ultra-small footprint. The NLX2G07 input and output structures provide protection when voltages up to 7.0 V are applied, regardless of the supply voltage. http://onsemi.com MARKING DIAGRAMS Features ULLGA6 1.2 x 1.0 CASE 613AE 1 IN A1 1 6 OUT Y1 ULLGA6 1.45 x 1.0 CASE 613AF M R 1 M R ULLGA6 1.0 x 1.0 CASE 613AD R •High Speed: tPD = 2.3 ns (Typ) @ VCC = 5.0 V •Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C •Power Down Protection Provided on inputs •Balanced Propagation Delays •Overvoltage Tolerant (OVT) Input and Output Pins •Ultra-Small Packages •These are Pb-Free Devices M 1 GND 2 5 VCC IN A2 3 4 OUT Y2 R M = Device Marking = Date Code PIN ASSIGNMENT Figure 1. Pinout (Top View) IN A1 1 OUT Y1 IN A2 1 OUT Y2 1 IN A1 2 GND 3 IN A2 4 OUT Y2 5 VCC 6 OUT Y1 FUNCTION TABLE Figure 2. Logic Symbol A Y L H L Z ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2008 March, 2008 - Rev. 0 1 Publication Order Number: NLX2G07/D NLX2G07 MAXIMUM RATINGS Symbol Value Unit VCC DC Supply Voltage -0.5 to +7.0 V VIN DC Input Voltage -0.5 to +7.0 V DC Output Voltage -0.5 to +7.0 V VIN < GND -50 mA VOUT < GND -50 mA VOUT Parameter IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature Range -65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature Under Bias 150 °C MSL FR ILATCHUP Moisture Sensitivity Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V-0 @ 0.125 in Latchup Performance Above VCC and Below GND at 125 °C (Note 5) ±500 mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2 ounce copper trace no air flow. 2. Tested to EIA/JESD22-A114-A. 3. Tested to EIA/UESD22-A115-A. 4. Tested to JESD22-C101-A. 5. Tested to EIA / JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 1.65 5.5 V VCC Positive DC Supply Voltage VIN Digital Input Voltage 0 5.5 V Output Voltage 0 5.5 V -55 +125 °C 0 0 100 20 ns/V VOUT TA Operating Free-Air Temperature Dt/DV Input Transition Rise or Fall Rate VCC = 3.3 V ± 0.3 V VCC = 5.0 V ± 0.5 V http://onsemi.com 2 NLX2G07 DC ELECTRICAL CHARACTERISTICS Symbol Parameter VIH Low-Level Input Voltage VIL VOL Conditions Low-Level Input Voltage Low-Level Output Voltage TA = 25 5C TA = +855C TA = -555C to +1255C VCC (V) Min 1.651.95 0.75 x VCC 0.75 x VCC 0.75 x VCC 2.3 to 5.5 0.70 x VCC 0.70 x VCC 0.70 x VCC Typ Max Min Max Min Max V 1.651.95 0.25 x VCC 0.25 x VCC 0.25 x VCC 2.3 to 5.5 0.30 x VCC 0.30 x VCC 0.30 x VCC VIN = VIH or VIL IOL = 50 mA 1.655.5 0.1 0.1 0.1 VIN = VIH or VIL IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA 1.65 2.3 2.7 3.0 3.0 4.5 0.24 0.3 0.4 0.4 0.55 0.55 0.24 0.3 0.4 0.4 0.55 0.55 0.24 0.3 0.4 0.4 0.55 0.55 0.08 0.2 0.22 0.28 0.38 0.42 Unit V V ILKG Z-State Output Leakage Current VIN = VIH, VOUT = VCC or GND 5.5 ±5.0 ±10 ±10 mA IIN Input Leakage Current 0 v VIN v 5.5 V 0 to 5.5 ±0.1 ±1.0 ±1.0 mA IOFF Power Off Input Leakage Current 0 v VIN, VOUT v 5.5 V 0 1.0 10 10 mA ICC Quiescent Supply Current 0 v VIN v VCC 5.5 1.0 10 10 mA http://onsemi.com 3 NLX2G07 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 nS) VCC (V) Test Condition 1.65-1.95 TA = -555C to +1255C TA = 25 5C Min Typ Max Min Max Unit RL = R1 = 5000 W, CL = 15 pF 1.8 5.3 11.5 1.8 12 ns 2.3-2.7 RL = R1 = 500 W, CL = 50 pF 1.2 3.7 5.8 1.2 6.4 3.0-3.6 RL = R1 = 500 W, CL = 50 pF 0.8 2.9 4.4 0.8 4.8 4.5-5.5 RL = R1 = 500 W, CL = 50 pF 0.5 2.3 3.5 0.5 3.9 1.65-1.95 RL = R1 = 5000 W, CL = 15 pF 1.8 5.3 11.5 1.8 12 2.3-2.7 RL = R1 = 500 W, CL = 50 pF 1.2 2.8 5.8 1.2 6.4 3.0-3.6 RL = R1 = 500 W, CL = 50 pF 0.8 2.1 4.4 0.8 4.8 4.5-5.5 RL = R1 = 500 W, CL = 50 pF 0.5 1.4 3.5 0.5 3.9 Input Capacitance 5.5 VIN = 0 V or VCC 2.5 pF COUT Output Capacitance 5.5 VIN = 0 V or VCC 4 pF CPD Power Dissipation Capacitance (Note 6) 3.3 5.5 10 MHz VIN = 0 V or VCC 4 pF Symbol tPZL tPLZ CIN Parameter Propagation Delay (Figures 3 and 4) Propagation Delay (Figures 3 and 4) ns 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no-load dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC. VCC A 50% GND tPZL Y tPLZ 50% VCC HIGH IMPEDANCE VOL )0.3 V Figure 3. Switching Waveforms VCC R1 PULSE GENERATOR DUT RT CL RT = ZOUT of pulse generator (typically 50 W) Figure 4. Test Circuit http://onsemi.com 4 RL VCC 2 NLX2G07 ORDERING INFORMATION Package Shipping† NLX2G07AMX1TCG ULLGA6, 1.45 x 1.0, 0.5P (Pb-Free) 3000 / Tape & Reel NLX2G07BMX1TCG ULLGA6, 1.2 x 1.0, 0.4P (Pb-Free) 3000 / Tape & Reel NLX2G07CMX1TCG ULLGA6, 1.0 x 1.0, 0.35P (Pb-Free) 3000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 5 NLX2G07 PACKAGE DIMENSIONS ULLGA6 1.0x1.0, 0.35P CASE 613AD-01 ISSUE A PIN ONE REFERENCE 0.10 C ÉÉ ÉÉ ÉÉ 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. A B D E DIM A A1 b D E e L L1 TOP VIEW 0.05 C A 6X 0.05 C SEATING PLANE SIDE VIEW MOUNTING FOOTPRINT SOLDERMASK DEFINED* C A1 MILLIMETERS MIN MAX --0.40 0.00 0.05 0.12 0.22 1.00 BSC 1.00 BSC 0.35 BSC 0.25 0.35 0.30 0.40 5X 0.48 6X 0.22 e 5X L NOTE 4 3 1 1.18 L1 0.53 6 4 6X b 0.05 C 0.35 PITCH DIMENSIONS: MILLIMETERS 0.10 C A B BOTTOM VIEW 1 PKG OUTLINE *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NOTE 3 http://onsemi.com 6 NLX2G07 PACKAGE DIMENSIONS ULLGA6 1.2x1.0, 0.4P CASE 613AE-01 ISSUE A PIN ONE REFERENCE 0.10 C ÉÉ ÉÉ ÉÉ 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. A B D E DIM A A1 b D E e L L1 TOP VIEW 0.05 C A 6X 0.05 C SEATING PLANE SIDE VIEW MOUNTING FOOTPRINT SOLDERMASK DEFINED* C A1 MILLIMETERS MIN MAX --0.40 0.00 0.05 0.15 0.25 1.20 BSC 1.00 BSC 0.40 BSC 0.25 0.35 0.35 0.45 5X 0.49 e 5X L NOTE 4 3 1 1.24 L1 0.53 6 4 6X b 0.05 C 1 PKG OUTLINE 0.40 PITCH DIMENSIONS: MILLIMETERS 0.10 C A B BOTTOM VIEW 6X 0.26 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NOTE 3 http://onsemi.com 7 NLX2G07 PACKAGE DIMENSIONS ULLGA6 1.45x1.0, 0.5P CASE 613AF-01 ISSUE A PIN ONE REFERENCE 0.10 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM THE TERMINAL TIP. 4. A MAXIMUM OF 0.05 PULL BACK OF THE PLATED TERMINAL FROM THE EDGE OF THE PACKAGE IS ALLOWED. A B D ÉÉÉ ÉÉÉ ÉÉÉ E DIM A A1 b D E e L L1 TOP VIEW 0.10 C 0.05 C MILLIMETERS MIN MAX --0.40 0.00 0.05 0.15 0.25 1.45 BSC 1.00 BSC 0.50 BSC 0.25 0.35 0.30 0.40 A 6X 0.05 C MOUNTING FOOTPRINT SOLDERMASK DEFINED* SEATING PLANE SIDE VIEW 5X C A1 e 5X L 0.49 NOTE 4 3 1 6X 0.26 1.24 L1 0.53 6 4 BOTTOM VIEW 6X b 0.10 C A B 0.05 C NOTE 3 1 PKG OUTLINE 0.40 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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