Intersil ISL28325FBZ 40v low power dual and quad operational amplifier Datasheet

40V Low Power Dual and Quad Operational Amplifier
ISL28325, ISL28345
Features
The ISL28325 and ISL28345 are dual and quad general purpose
amplifiers featuring low noise vs power consumption. The
combination of low noise and small footprint provides the user with
outstanding value and flexibility relative to similar competitive parts.
• Input Offset Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .1mV, Max.
Applications for this amplifier include active filters, medical and
analytical instrumentation, power supply controls, and industrial
controls.
• Voltage Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9nV/Hz
The ISL28325 is offered in 8 Ld SOIC and MSOP packages and
the ISL28345 is offered in the 14 Ld SOIC package and operates
over the -40°C to +125°C temperature range.
• Operating Temperature Range. . . . . . . . . . .-40°C to +125°C
• Input Bias Current . . . . . . . . . . . . . . . . . . . . . . . . . . ±5nA, Max.
• Low Current Consumption. . . . . . . . . . . . . . . . . . . . . . . . 500µA
• Wide Supply Range . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 40V
• Pb-Free (RoHS Compliant)
Applications
• Analytical Instrumentation
• Medical Instrumentation
• Spectral Analysis Equipment
• Active Filter Blocks
• Thermocouples and RTD Reference Buffers
• Data Acquisition
• Power Supply Control
C1
8.2nF
V+
R1
R2
1.84k
4.93k
OUTPUT
VIN
+
3.3nF
C2
V-
SALLEN-KEY LOW PASS FILTER (10kHz)
FIGURE 1. TYPICAL APPLICATION
September 27, 2011
FN7854.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL28325, ISL28345
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP RANGE
(°C)
-40 to +125
PACKAGE
(Pb-Free)
8 Ld SOIC
PKG.
DWG. #
ISL28325FBZ
28325 FBZ
M8.15E
ISL28325FUZ
8325Z
-40 to +125
8 Ld MSOP
M8.118B
ISL28345FBZ
28345 FBZ
-40 to +125
14 Ld SOIC
MDP0027
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pbfree products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL28325, ISL28345. For more information on MSL please see techbrief
TB363.
Pin Configurations
ISL28325
(8 LD SOIC, MSOP)
TOP VIEW
VOUT_A
1
-IN_A
2
+IN_A
3
V-
4
8 V+
- +
7 VOUT_B
+ -
6 -IN_B
5 +IN_B
ISL28345
(14 LD SOIC)
TOP VIEW
14 VOUT_D
VOUT_A 1
-IN_A 2
A
- +
D
+ -
+IN_A 3
12 +IN_D
V+ 4
11
VOUT_B 7
2
V-
10 +IN_C
+IN_B 5
-IN_B 6
13 -IN_D
- +
B
+ C
9 -IN_C
8 VOUT_C
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Pin Descriptions
ISL28325
(8 LD SOIC, MSOP)
ISL28345
(14 LD SOIC)
PIN NAME
EQUIVALENT CIRCUIT
3
3
+IN_A
Circuit 1
Amplifier non-inverting input
5
5
+IN_B
-
10
+IN_C
-
12
+IN_D
4
11
V-
Circuit 3
Negative power supply
2
2
-IN_A
Circuit 1
Amplifier inverting input
6
6
-IN_B
-
9
-IN_C
-
13
-IN_D
8
4
V+
Circuit 3
Positive power supply
1
1
VOUT_A
Circuit 2
Amplifier output
7
7
VOUT_B
-
8
VOUT_C
-
14
VOUT_D
DESCRIPTION
V+
500Ω
V+
500Ω
IN-
IN+
VCIRCUIT 2
3
CAPACITIVELY
COUPLED
ESD CLAMP
OUT
V-
CIRCUIT 1
V+
VCIRCUIT 3
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Absolute Maximum Ratings
Thermal Information
Maximum Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....42V
Maximum Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Maximum Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42V
Min/Max Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
Max/Min Input current for Input Voltage >V+ or <V-. . . . . . . . . . . . . . . . ±20mA
Output Short-Circuit Duration (1 output at a time). . . . . . . . . . . . . . . . Indefinite
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV
Thermal Resistance (Typical Notes 4, 5)
θJA (°C/W)
θJC (°C/W)
8 Ld SOIC. . . . . . . . . . . . . . . . . . . . . . . . . . . .
125
65
8 Ld MSOP. . . . . . . . . . . . . . . . . . . . . . . . . . .
160
55
14 Ld SOIC. . . . . . . . . . . . . . . . . . . . . . . . . . .
73
45
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Maximum Junction Temperature (TJMAX) . . . . . . . . . . . . . . . . . . . . .+150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range (TA) . . . . . . . . . . . . . . . . . . .-40°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
5. For θJC, the “case temp” location is taken at the package top center.
Electrical Specifications
VS ± 5V and VS ± 15V, VCM = 0, VO = 0V, TA= +25°C, unless otherwise noted. Boldface limits apply over
the operating temperature range, -40°C to +125°C.
PARAMETER
VOS
TCVOS
DESCRIPTION
CONDITIONS
Input Offset Voltage
MIN
(Note 6)
TYP
MAX
(Note 6)
UNIT
-1
0.1
1
mV
4
15
µV/C
Input VOS Temperature Coefficient
IB
Input Bias Current
-5
0.2
5
nA
IOS
Input Offset Current
-5
0.2
5
nA
VCM
Input Voltage Range
-13
13
V
CMRR
Common-Mode Rejection Ratio
VCM = -13V to +13V
80
100
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.25V to ±20V
80
100
dB
AVOL
Open-Loop Gain
VO = -13V to +13V, RL = 10kΩ to ground
100
110
dB
VOH
Output Voltage High
RL = 10kΩ to ground
13.0
13.5
V
VOL
Output Voltage Low
RL = 10kΩ to ground
IS
ISC
VSUPPLY
Supply Current/Amplifier
Short-Circuit
-13.7
-13.5
V
0.5
0.7
mA
0.9
mA
40
Supply Voltage Range
± 2.25
mA
± 20
V
AC SPECIFICATIONS
GBWP
Gain Bandwidth Product
AV = 1k, RL = 2kΩ
1.2
MHz
Slew Rate, VOUT 20% to 80%
AV = 11, RL = 2kΩ, VO = 4VP-P
0.4
V/µs
Voltage Noise VP-P
0.1Hz to 10Hz
0.4
µVP-P
en
Voltage Noise Density
f = 1kHz
9
nV/√Hz
in
Current Noise Density
f = 1kHz
0.1
pA/√Hz
SR
enVp-p
NOTE:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
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ISL28325, ISL28345
200
180
160
140
120
100
80
60
40
20
0
-20 R = 10k
L
-40
CL = 10pF
-60
SIMULATION
-80
-100
0.1m 1m 10m 100m 1
VS = ±15V, VCM = 0V, RL = Open, unless otherwise specified.
OPEN LOOP GAIN (dB)/PHASE (°)
OPEN LOOP GAIN (dB)/PHASE (°)
Typical Performance Curves
PHASE
GAIN
10 100
1k 10k 100k 1M 10M 100M
200
180
160
140
120
100
80
60
40
20
0
-20 R = 10k
L
-40
CL = 100pF
-60
-80 SIMULATION
-100
0.1m 1m 10m 100m 1
GAIN
10 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 2. OPEN-LOOP GAIN, PHASE vs FREQUENCY, R L = 10kΩ,
CL = 10pF
FIGURE 3. OPEN-LOOP GAIN, PHASE vs FREQUENCY, RL = 10kΩ,
CL = 100pF
220
60
VS = ±2.5V
200
180
50
VS = ±5V
SMALL SIGNAL (mV)
160
140
120
VS = ±15V
100
80
60
40
RL = INF
20
CL = 10pF
SIMULATION
0
1m 10m 100m
40
VS = ±15V
30
RL = 10k
CL = 4pF
AV = +1
VOUT = 50mVP-P
20
10
0
1
-10
10 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
FIGURE 4. CMRR vs FREQUENCY, VS = ±2.25, ±5V, ±15V
0
5
10
15
20
25
TIME (µs)
30
35
40
FIGURE 5. SMALL SIGNAL TRANSIENT RESPONSE, VS = ±5V, ±15V
2.4
2.0
1.6
1.2
LARGE SIGNAL (V)
CMRR (dB)
PHASE
VS = ±15V, RL = 2k, 10k
0.8
0.4
0
VS = ±5V, RL = 2k, 10k
-0.4
-0.8
CL = 4pF
AV = +1
VOUT = 4VP-P
-1.2
-1.6
-2.0
-2.4
0
10
20
30
40
50
60
TIME (µs)
70
80
90
100
FIGURE 6. LARGE SIGNAL TRANSIENT RESPONSE vs RL VS = ±5V, ±15V
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ISL28325, ISL28345
Applications Information
Functional Description
The ISL28325 and ISL28345 are dual and quad general purpose
amplifiers featuring low noise vs power consumption. They are
offered in industry standard pinouts in 8 Ld SOIC, 8 Ld MSOP and
14 Ld SOIC packages. Applications for this amplifier include
active filters, medical and analytical instrumentation, power
supply controls, and industrial controls..
Operating Voltage Range
The devices are designed to operate over the 4.5V (±2.25V) to
40V (±20V) range over the -40°C to +125°C temperature range.
For best amplifier performance, decouple the power supply with
a 0.01µF or larger capacitors by placing them close to the supply
pins of the amplifier.
Input ESD Diode Protection
The input terminals (IN+ and IN-) have internal ESD protection
diodes to the positive and negative supply rails, series connected
500Ω current limiting resistors and an anti-parallel diode pair
across the inputs.
The series resistors limit the high feed-through currents that can
occur in pulse applications when the input dV/dT exceeds the
0.4V/µs slew rate of the amplifier. Without the series resistors, the
input can forward-bias the anti-parallel diodes causing current to
flow to the output resulting in severe distortion and possible diode
failure.
In applications where one or both amplifier input terminals are at
risk of exposure to high voltages beyond the power supply rails,
current limiting resistors may be needed at the input terminal to
limit the current through the power supply ESD diodes to 20mA
max.
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September 27, 2011
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ISL28325, ISL28345
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
09/27/2011
FN7854.0
CHANGE
Initial Release
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on
intersil.com: ISL28325, ISL28345
To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff
FITs are available from our website at: http://rel.intersil.com/reports/search.php
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
7
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ISL28325, ISL28345
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.10 C
0.175 ± 0.075
SIDE VIEW “A
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
(5.40)
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
5.
The pin #1 identifier may be either a mold or mark feature.
6.
Reference to JEDEC MS-012.
TYPICAL RECOMMENDED LAND PATTERN
8
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ISL28325, ISL28345
Package Outline Drawing
M8.118B
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 7/11
3.0±0.10mm
5
A
D
8
4.9±0.20mm
DETAIL "X"
3.0±0.10mm
5
1.10 MAX
0.15 - 0.05mm
PIN# 1 ID
SIDE VIEW 2
1
2
B
0.65mm BSC
TOP VIEW
0.95 REF
0.86±0.05mm
H
GAUGE
PLANE
C
0.25
SEATING PLANE
0.23 - 0.36mm
0.08 M C A-B D
0.10 ± 0.05mm
3°±3°
0.10 C
0.53 ± 0.10mm
SIDE VIEW 1
DETAIL "X"
(5.80)
NOTES:
(4.40)
(3.00)
1. Dimensions are in millimeters.
(0.65)
(0.40)
(1.40)
TYPICAL RECOMMENDED LAND PATTERN
9
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSEY14.5m-1994.
3. Plastic or metal protrusions of 0.15mm max per side are not
included.
4. Plastic interlead protrusions of 0.15mm max per side are not
included.
5. Dimensions are measured at Datum Plane "H".
6. Dimensions in ( ) are for reference only.
September 27, 2011
FN7854.0
ISL28325, ISL28345
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4° ±4°
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
A
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
±0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
±0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
±0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
±0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
±0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
±0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
±0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
±0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
-
N
SO-8
SO16
(0.150”)
8
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
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