STMicroelectronics ESDAXLC6-1MY2 Extra low capacitance single line tv Datasheet

ESDAXLC6-1MY2
Extra low capacitance single line TVS
Features
■
Extra low capacitance 0.35 pF max on a wide
frequency spectrum (200 MHz - 3000 MHz)
■
Unidirectional device
■
Low clamping factor VCL/VBR
■
Fast response time
■
Very thin package: 0.55 mm max
■
Low leakage current
■
High ESD protection level
■
High integration
■
Suitable for high density boards
µQFN-2L
Figure 1.
Functional diagram
I/01
Complies with the following standards
■
IEC 61000-4-2 level 4
■
MIL STD 883G-Method 3015-7: class 3B
I/02
GND
Applications
Where transient over voltage protection and
electrical overstress protection in sensitive
equipment is required, such as:
■
Computers
■
Printers
■
Communication systems
■
Cellular phone handsets and accessories
■
Video equipment Portable equipment
Description
The ESDAXLC6-1MY2 is a single line Transil™
diode designed specifically for the protection of
integrated circuits in portable equipment and
miniaturized electronics devices subject to ESD
transient over voltages. Packaged in µQFN-2L, it
minimizes PCB consumption.
TM: Transil is a trademark of STMicroelectronics
September 2011
Doc ID 16923 Rev 2
1/11
www.st.com
11
Characteristics
ESDAXLC6-1MY2
1
Characteristics
Table 1.
Absolute maximum ratings (Tamb = 25 °C)
Symbol
Parameter
VPP
Peak pulse voltage:
IEC 61000-4-2, level 4 : contact discharge
PPP
Peak pulse power dissipation (8/20 µs) (1)
IPP
Tj
Value
Unit
kV
8
Tj initial = Tamb
12
W
Peak pulse current typical value (8/20 µs)
2.8
A
Maximum junction temperature
125
°C
Top
Operating junction temperature range
- 30 to + 85
°C
Tstg
Storage temperature range
- 55 to +150
°C
1. For a surge greater than the maximum values, the diode will fail in short-circuit
Figure 2.
Electrical characteristics (definitions)
I
Symbol
VBR
IRM
VRM
IR
Table 2.
=
=
=
=
Parameter
Breakdown voltage
Leakage current @ VRM
Stand-off voltage
Breakdown current
VBR VRM
V
IRM
IR
Electrical characteristics (values, Tamb = 25 °C)
Symbol
Test condition
Min.
Typ.
Max.
Unit
VBR
IR = 1 mA
6
-
-
V
IRM
VRM = 3 V
-
-
100
nA
Cline
VR = 0 V, F = (200 MHz - 3000 MHz), Vosc = 30 mV
-
-
0.35
pF
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Doc ID 16923 Rev 2
ESDAXLC6-1MY2
Figure 3.
Characteristics
Junction capacitance versus
reverse voltage applied
(typical values)
Figure 4.
500
500
Junction capacitance versus
frequency (Vr = 0 V, typical values)
C (fF)
Capacitance (fF)
Vr = 0 V
Vosc = 30 mV
450
F = 200 MHz
Vosc = 30 mV
450
400
400
350
350
300
300
250
250
200
200
150
Voltage (V)
100
0
1
2
3
4
5
150
Frequency (MHz)
100
1
Figure 5.
0.00
S21 (dB) attenuation
10
Figure 6.
S21 (dB)
100
1000
10000
Relative variation of leakage
current versus junction
temperature (typical values)
IR[Tj]/IR[Tj = 25 °C]
VR = 3 V
Tjinitial = 25 °C
- 2.00
10000
-4.00
1000
-6.00
-8.00
100
-10.00
10
- 12.00
-14.00
10.0M
Figure 7.
f (Hz)
30.0M
100.0M
300.0M
1.0G
3.0G
25
10.0G
ESD response to IEC 61000-4-2
(+ 8 kV contact discharge)
Tj (°C)
1
Figure 8.
50
75
100
125
ESD response to IEC 61000-4-2
(-8 kV contact discharge)
20 V/div
20 V/div
C2
C2
20 ns/div
Doc ID 16923 Rev 2
20 ns/div
3/11
Ordering information scheme
2
ESDAXLC6-1MY2
Ordering information scheme
Figure 9.
Ordering information scheme
ESDAX LC
ESDA array
Low capacitance
Breakdown voltage
6 = 6 V minimum
Package
1 = 1 line
MY = µQFN-2L, max. height: 0.55 mm
2 = 2 pads
4/11
Doc ID 16923 Rev 2
6 - 1MY2
ESDAXLC6-1MY2
3
Package information
Package information
●
Epoxy meets UL 94, V0
●
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Table 3.
µQFN-2L dimensions
Dimensions
D
INDEX AREA
(D/2 x E/2)
Ref.
A1
Typ.
Max.
Min.
A
0.45
0.50
0.55
0.017 0.020 0.022
A1
0.00
0.05
0.000
b1
0.20
0.25
0.30
0.008 0.010 0.012
b2
0.20
0.25
0.30
0.008 0.010 0.012
b2
b1
D
INDEX AREA
(D/2 x E/2)
L1
OPTIONAL
PIN # 1 ID
L2
e
Inches
Min.
E
A
Millimeters
1.00
Typ.
Max.
0.002
0.039
E
0.60
0.024
e
0.65
0.026
L1
0.45
0.50
0.55
0.018 0.020 0.022
L2
0.45
0.50
0.55
0.018 0.020 0.022
Figure 10. Footprint (dimensions in mm) Figure 11. Marking
0.55
0.55
0.50
Pin1
7
Pin 2
0.40
Note:
Product marking may be rotated by 90° for assembly plant differentiation. In no case should
this product marking be used to orient the component for its placement on a PCB. Only pin
1 mark is to be used for this purpose.
Doc ID 16923 Rev 2
5/11
Package information
ESDAXLC6-1MY2
Figure 12. µQFN-2L tape and reel specification
2.0 ± 0.05
Ø 1.50 +0.1/-0.0
4.0 ± 0.1
1.75 ± 0.1
Cathode bar
3.5 ±- 0.05
1.15 ± 0.05
2.0 ± 0.1
User direction of unreeling
Doc ID 16923 Rev 2
7
7
7
0.70 ± 0.05
7
6/11
7
All dimensions in mm
7
0.59 ± 0.04
7
8.0 + 0.3 /-0.1
0.20 ± 0.05
ESDAXLC6-1MY2
Recommendation on PCB assembly
4
Recommendation on PCB assembly
4.1
Stencil opening design
1.
General recommendation on stencil opening design
a)
Stencil opening dimensions: L (Length), W (Width), T (Thickness).
Figure 13. Stencil opening dimensions
L
T
b)
W
General design rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio = ----- ≥ 1.5
T
L×W
Aspect Area = ---------------------------- ≥ 0.66
2T ( L + W )
2.
Reference design
a)
Stencil opening thickness: 100 µm
b)
Stencil opening for central exposed pad: Opening to footprint ratio is 50%.
c)
Stencil opening for leads: Opening to footprint ratio is 90%.
Figure 14. Recommended stencil window position
Package footprint
Lead footprint on PCB
Lead footprint on PCB
Stencil window
position
0.39 mm
Stencil window
position
0.45 mm
0.05 mm
Doc ID 16923 Rev 2
0.05 mm
7/11
Recommendation on PCB assembly
4.2
4.3
4.4
8/11
ESDAXLC6-1MY2
Solder paste
1.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2.
“No clean” solder paste is recommended.
3.
Offers a high tack force to resist component movement during high speed.
4.
Solder paste with fine particles: powder particle size is 20-45 µm.
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering.
3.
Standard tolerance of ± 0.05 mm is recommended.
4.
3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5.
To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
PCB design preference
1.
To control the solder paste amount, the closed via is recommended instead of open
vias.
2.
The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
Doc ID 16923 Rev 2
ESDAXLC6-1MY2
4.5
Recommendation on PCB assembly
Reflow profile
Figure 15. ST ECOPACK® recommended soldering reflow profile for PCB mounting
Temperature (°C)
260°C max
255°C
220°C
180°C
125 °C
2°C/s recommended
2°C/s recommended
6°C/s max
6°C/s max
3°C/s max
3°C/s max
0
0
1
2
3
4
5
10-30 sec
90 to 150 sec
Note:
6
7
Time (min)
90 sec max
Minimize air convection currents in the reflow oven to avoid component movement.
Doc ID 16923 Rev 2
9/11
Ordering information
5
Ordering information
Table 4.
6
Ordering information
Order code
Marking
Package
Weight
Base qty
Delivery mode
ESDAXLC6-1MY2
7
µQFN-2L
0.942 mg
12000
Tape and reel
Revision history
Table 5.
10/11
ESDAXLC6-1MY2
Document revision history
Date
Revision
Changes
18-Jan-2010
1
Initial release.
23-Sep-2011
2
Updated package name.
Doc ID 16923 Rev 2
ESDAXLC6-1MY2
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Doc ID 16923 Rev 2
11/11
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