FDS6912A Dual N-Channel Logic Level PowerTrench MOSFET General Description Features These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. • 6 A, 30 V. RDS(ON) = 28 mΩ @ VGS = 10 V RDS(ON) = 35 mΩ @ VGS = 4.5 V • Fast switching speed • Low gate charge These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. • High performance trench technology for extremely low RDS(ON) • High power and current handling capability DD1 DD1 D2 D 5 DD2 6 4 3 Q1 7 SO-8 Pin 1 SO-8 G2 S2 S 8 S 2 Q2 1 S Absolute Maximum Ratings Symbol G1 S1 G TA=25oC unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter 30 V VGSS Gate-Source Voltage ± 20 V ID Drain Current 6 A – Continuous (Note 1a) – Pulsed PD 20 Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) 1.0 (Note 1c) TJ, TSTG W 0.9 –55 to +150 °C (Note 1a) 78 °C/W (Note 1) 40 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDS6912A FDS6912A 13’’ 12mm 2500 units 2003 Fairchild Semiconductor Corporation FDS6912A Rev D(W) FDS6912A July 2003 Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C 30 Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current IGSS Gate–Source Leakage On Characteristics VGS(th) V 25 VDS = 24 V, VGS = 0 V VDS = 24 V, VGS = 0 V, TJ = 55°C VGS = ±20 V, VDS = 0 V mV/°C 1 10 µA ±100 nA (Note 2) VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance 1 1.9 –4.5 3 V ID(on) On–State Drain Current VGS = 10 V, ID = 6 A VGS = 4.5 V, ID = 5 A VGS = 10 V, ID = 6 A,TJ = 125°C VGS = 10 V, VDS = 5 V 19 24 27 28 35 44 gFS Forward Transconductance VDS = 10 V, ID = 6 A 25 S VDS = 15 V, f = 1.0 MHz V GS = 0 V, 575 pF 145 pF 65 pF 2.1 Ω mV/°C 20 mΩ A Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance RG Gate Resistance Switching Characteristics VGS = 15 mV, f = 1.0 MHz (Note 2) td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) Turn–Off Delay Time tf Turn–Off Fall Time 3 6 ns Qg Total Gate Charge 5.8 8.1 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDD = 15 V, VGS = 10 V, VDS = 15 V, VGS = 5 V ID = 1 A, RGEN = 6 Ω ID = 6 A, 8 16 ns 5 10 ns 23 37 ns 1.7 nC 2.1 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD trr Drain–Source Diode Forward Voltage Diode Reverse Recovery Time Qrr Diode Reverse Recovery Charge VGS = 0 V, IS = 1.3 A IF = 6 A, diF/dt = 100 A/µs (Note 2) 0.75 1.3 A 1.2 V 20 nS 10 nC Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 78°C/W when mounted on a 0.5in2 pad of 2 oz copper b) 125°C/W when mounted on a 0.02 in2 pad of 2 oz copper c) 135°C/W when mounted on a minimum mounting pad. Scale 1 : 1 on letter size paper Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDS6912A Rev D(W) FDS6912A Electrical Characteristics FDS6912A Typical Characteristics 20 2.2 4.0V 3.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10.0V ID, DRAIN CURRENT (A) 16 6.0V 4.5V 12 8 3.0V 4 1.8 1.4 0 4.5V 5.0 6.0V 10.0V 1 0.5 1 1.5 VDS, DRAIN-SOURCE VOLTAGE (V) 0 2 Figure 1. On-Region Characteristics. 4 8 12 ID, DRAIN CURRENT (A) 16 20 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 0.08 ID = 3A ID = 6A VGS = 10.0V RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 4.0 0.6 0 1.4 1.2 1 0.8 0.07 0.06 0.05 TA = 125oC 0.04 0.03 TA = 25oC 0.02 0.01 0.6 -50 -25 0 25 50 75 100 TJ, JUNCTION TEMPERATURE (oC) 125 2 150 Figure 3. On-Resistance Variation with Temperature. 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 20 100 VGS = 0V IS, REVERSE DRAIN CURRENT (A) VDS = 5V 16 ID, DRAIN CURRENT (A) VGS = 3.5V 12 TA = 125oC -55oC 8 25oC 4 10 TA = 125oC 1 0.1 25oC 0.01 -55oC 0.001 0.0001 0 1.5 2 2.5 3 3.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 4 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6912A Rev D(W) FDS6912A Typical Characteristics 800 ID = 6A f = 1MHz VGS = 0 V 8 VDS = 10V CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 10 20V 6 15V 4 600 Ciss 400 Coss 200 2 Crss 0 0 0 2 4 6 8 Qg, GATE CHARGE (nC) 10 0 12 Figure 7. Gate Charge Characteristics. P(pk), PEAK TRANSIENT POWER (W) 50 RDS(ON) LIMIT ID, DRAIN CURRENT (A) 20 Figure 8. Capacitance Characteristics. 100 100µs 10 1ms 10ms 100ms 1s 1 10s DC VGS = 10V SINGLE PULSE RθJA = 135oC/W 0.1 o TA = 25 C 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 100 SINGLE PULSE RθJA = 135°C/W TA = 25°C 40 30 20 10 0 0.001 Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 5 10 15 VDS, DRAIN TO SOURCE VOLTAGE (V) 0.01 0.1 1 t1, TIME (sec) 10 100 1000 Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) * R θJA RθJA = 135°C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 t1 0.01 t2 0.01 SINGLE PULSE 0.001 0.0001 0.001 TJ - T A = P * R θJA(t) Duty Cycle, D = t1 / t2 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS6912A Rev D(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOSTM I2C™ TM EnSigna ImpliedDisconnect™ FACT™ ISOPLANAR™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER SMART START™ SPM™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic TINYOPTO™ TruTranslation™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I5