MBT35200MT1 High Current Surface Mount PNP Silicon Switching Transistor for Load Management in Portable Applications http://onsemi.com A Device of the X Family 35 VOLTS 2.0 AMPS PNP TRANSISTOR MAXIMUM RATINGS (TA = 25°C) Rating Symbol Max Unit Collector-Emitter Voltage VCEO –35 Vdc Collector-Base Voltage VCBO –55 Vdc Emitter-Base Voltage VEBO –5.0 Vdc Collector Current — Continuous IC –2.0 Adc Collector Current — Peak ICM –5.0 A Electrostatic Discharge ESD COLLECTOR 1, 2, 5, 6 3 BASE 4 EMITTER HBM Class 3 MM Class C THERMAL CHARACTERISTICS 3 Characteristic Total Device Dissipation TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Total Device Dissipation TA = 25°C Derate above 25°C Symbol Max Unit PD (Note 1.) 625 mW 5.0 mW/°C RθJA (Note 1.) 200 °C/W PD (Note 2.) 1.0 W 8.0 mW/°C Thermal Resistance, Junction to Ambient RθJA (Note 2.) 120 °C/W Thermal Resistance, Junction to Lead #1 RθJL 80 °C/W Total Device Dissipation (Single Pulse < 10 sec.) 5 1 6 CASE 318G TSOP STYLE 6 DEVICE MARKING G4 (date code) PDsingle (Notes 2. & 3.) 1.75 W TJ, Tstg –55 to +150 °C Junction and Storage Temperature Range 1. FR–4 @ Minimum Pad 2. FR–4 @ 1.0 X 1.0 inch Pad 3. ref: Figure 9 Semiconductor Components Industries, LLC, 2000 August, 2000 – Rev. 1 4 2 ORDERING INFORMATION 1 Device Package Shipping MBT35200MT1 Case 318G 3000/Tape & Reel Publication Order Number: MBT35200MT1/D MBT35200MT1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typical Max –35 –45 — –55 –65 — –5.0 –7.0 — — –0.03 –0.1 — –0.03 –0.1 — –0.01 –0.1 100 100 100 200 200 200 — 400 — — — — –0.125 –0.175 –0.260 –0.15 –0.20 –0.31 — –0.68 –0.85 — –0.81 –0.875 100 — — Unit OFF CHARACTERISTICS Collector–Emitter Breakdown Voltage (IC = –10 mAdc, IB = 0) V(BR)CEO Collector–Base Breakdown Voltage (IC = –0.1 mAdc, IE = 0) V(BR)CBO Emitter–Base Breakdown Voltage (IE = –0.1 mAdc, IC = 0) V(BR)EBO Collector Cutoff Current (VCB = –35 Vdc, IE = 0) ICBO Collector–Emitter Cutoff Current (VCES = –35 Vdc) ICES Emitter Cutoff Current (VEB = –4.0 Vdc) IEBO Vdc Vdc Vdc Adc Adc Adc ON CHARACTERISTICS DC Current Gain (1) (IC = –1.0 A, VCE = –1.5 V) (IC = –1.5 A, VCE = –1.5 V) (IC = –2.0 A, VCE = –3.0 V) hFE Collector–Emitter Saturation Voltage (Note 4.) (IC = –0.8 A, IB = –0.008 A) (IC = –1.2 A, IB = –0.012 A) (IC = –2.0 A, IB = –0.02 A) VCE(sat) Base–Emitter Saturation Voltage (Note 4.) (IC = –1.2 A, IB = –0.012 A) VBE(sat) Base–Emitter Turn–on Voltage (Note 4.) (IC = –2.0 A, VCE = –3.0 V) VBE(on) Cutoff Frequency (IC = –100 mA, VCE = –5.0 V, f = 100 MHz) V V V fT MHz Input Capacitance (VEB = –0.5 V, f = 1.0 MHz) Cibo — 600 650 pF Output Capacitance (VCB = –3.0 V, f = 1.0 MHz) Cobo — 85 100 pF Turn–on Time (VCC = –10 V, IB1 = –100 mA, IC = –1 A, RL = 3 ) ton — 35 — nS Turn–off Time (VCC = –10 V, IB1 = IB2 = –100 mA, IC = 1 A, RL = 3 ) toff — 225 — nS 4. Pulsed Condition: Pulse Width = 300 sec, Duty Cycle ≤ 2% http://onsemi.com 2 10 0.01 1.6 1.4 1.2 1.0 0.001 0.01 0.1 0.20 100°C 0.15 25°C 0.10 0.05 0 0.001 0.01 0.1 1.0 Figure 1. Collector Emitter Saturation Voltage versus Collector Current Figure 2. Collector Emitter Saturation Voltage versus Collector Current 1.0 100°C 25°C -55°C 0.2 0.001 0.01 0.1 25°C 0.6 100°C 0.4 0.2 0 1.0 -55°C 0.8 0.001 0.1 0.01 1.0 IC, COLLECTOR CURRENT (AMPS) IC, COLLECTOR CURRENT (AMPS) Figure 3. DC Current Gain versus Collector Current Figure 4. Base Emitter Saturation Voltage versus Collector Current 1.1 750 1.0 700 0.9 100°C 0.8 25°C 0.7 0.6 -55°C 0.5 0.4 0.3 -55°C IC, COLLECTOR CURRENT (AMPS) 0.4 0 IC/IB = 50 IC, COLLECTOR CURRENT (AMPS) 0.8 0.6 0.25 1.0 C ibo , INPUT CAPACITANCE (pF) hFE , DC CURRENT GAIN (NORMALIZED) IC/IB = 100 50 0.001 V BE(on) , BASE EMITTER TURN-ON VOLTAGE (VOLTS) VCE(sat) , COLLECTOR EMITTER SATURATION VOLTAGE (VOLTS) 0.1 VBE(sat) , BASE EMITTER SATURATION VOLTAGE (VOLTS) VCE(sat) , COLLECTOR EMITTER SATURATION VOLTAGE (VOLTS) MBT35200MT1 650 600 550 500 450 400 350 0.001 0.01 0.1 300 1.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 IC, COLLECTOR CURRENT (AMPS) VEB, EMITTER BASE VOLTAGE (VOLTS) Figure 5. Base Emitter Turn–On Voltage versus Collector Current Figure 6. Input Capacitance http://onsemi.com 3 4.5 5.0 MBT35200MT1 10 200 IC , COLLECTOR CURRENT (AMPS) Cobo, OUTPUT CAPACITANCE (pF) 225 175 150 125 100 75 50 1 s 100 ms 10 ms r(t), NORMALIZED TRANSIENT THERMAL RESISTANCE 1.0 0 5.0 100 s 1.0 DC 0.1 25 0 1 ms 0.01 SINGLE PULSE AT Tamb = 25°C VCB, COLLECTOR BASE VOLTAGE (VOLTS) 1.0 10 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 7. Output Capacitance Figure 8. Safe Operating Area 10 15 20 25 30 35 0.1 100 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 0.001 SINGLE PULSE 0.00001 0.0001 0.001 0.01 0.1 t, TIME (sec) 1.0 Figure 9. Normalized Thermal Response http://onsemi.com 4 10 100 1000 MBT35200MT1 INFORMATION FOR USING THE TSOP–6 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.094 2.4 0.037 0.95 0.074 1.9 0.037 0.95 0.028 0.7 0.039 1.0 inches mm TSOP–6 TSOP–6 POWER DISSIPATION SOLDERING PRECAUTIONS The power dissipation of the TSOP–6 is a function of the drain pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the TSOP–6 package, PD can be calculated as follows: PD = The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 625 milliwatts. PD = 150°C – 25°C 200°C/W = 625 milliwatts The 200°C/W for the TSOP–6 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 625 milliwatts. There are other alternatives to achieving higher power dissipation from the TSOP–6 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. http://onsemi.com 5 MBT35200MT1 PACKAGE DIMENSIONS CASE 318G–02 ISSUE G A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. L 6 S 1 5 4 2 3 B D G M J C 0.05 (0.002) H K DIM A B C D G H J K L M S MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.05 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.55 0 10 2.50 3.00 STYLE 6: PIN 1. 2. 3. 4. 5. 6. http://onsemi.com 6 COLLECTOR COLLECTOR BASE EMITTER COLLECTOR COLLECTOR INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0 10 0.0985 0.1181 MBT35200MT1 Notes http://onsemi.com 7 MBT35200MT1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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