IRF IRF6655 Directfet power mosfet typical values (unless otherwise specified) Datasheet

PD - 96926D
IRF6655
DirectFET™ Power MOSFET ‚
Typical values (unless otherwise specified)
RoHS compliant containing no lead or bromide 
l Low Profile (<0.7 mm)
l Dual Sided Cooling Compatible 
l Ultra Low Package Inductance
l Optimized for High Frequency Switching 
l Ideal for High Performance Isolated Converter
Primary Switch Socket
l Ideal for Control FET sockets in 36V – 75V in
Synchronous Buck applications
l Low Conduction Losses
l Compatible with existing Surface Mount Techniques 
l
VDSS
VGS
RDS(on)
100V max ±20V max
Qg
Qgd
Vgs(th)
2.8nC
3.9V
tot
8.7nC
SH
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
SH
MQ
MX
MT
53mΩ@ 10V
DirectFET™ ISOMETRIC
MN
Description
The IRF6655 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the
lowest combined on-state resistance and gate charge in a package that has a footprint similar to that of a micro-8, and only 0.7mm profile. The
DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infrared or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The
DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by
80%.
The IRF6655 is optimized for low power primary side bridge topologies in isolated DC-DC applications, and for high side control FET sockets in
non-isolated synchronous buck DC-DC applications for use in wide range universal Telecom systems (36V – 75V), and for secondary side
synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes this device ideal for high
performance isolated DC-DC converters.
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Typical RDS(on) (mΩ)
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
EAS
IAR
e
Pulsed Drain Current
Single Pulse Avalanche Energy
Avalanche Current
e
200
180
160
140
120
100
80
60
40
20
0
h
h
k
f
ID = 5.0A
T J = 125°C
T J = 25°C
4
6
8
10
12
14
16
18
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance Vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET MOSFETs
ƒ Repetitive rating; pulse width limited by max. junction temperature.
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VGS, Gate-to-Source Voltage (V)
VDS
Max.
Units
100
±20
4.2
3.4
19
34
11
5.0
V
A
mJ
A
12.0
ID= 5.0A
10.0
8.0
VDS= 80V
VDS= 50V
VDS= 20V
6.0
4.0
2.0
0.0
0
2
4
6
8
10
QG Total Gate Charge (nC)
Fig 2. Typical On-Resistance Vs. Gate Voltage
„ Starting TJ = 25°C, L = 0.89mH, RG = 25Ω, IAS = 5.0A.
† Surface mounted on 1 in. square Cu board, steady state.
‰ TC measured with thermocouple mounted to top (Drain) of part.
1
11/16/05
IRF6655
Static @ TJ = 25°C (unless otherwise specified)
Min.
Typ. Max. Units
BVDSS
Drain-to-Source Breakdown Voltage
Parameter
100
–––
–––
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient
–––
0.12
–––
Static Drain-to-Source On-Resistance
–––
53
62
VGS(th)
Gate Threshold Voltage
2.8
–––
4.8
V
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
–––
-11
–––
mV/°C
Drain-to-Source Leakage Current
–––
–––
20
µA
–––
–––
250
IGSS
gfs
Qg
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
Forward Transconductance
6.6
–––
–––
V
Conditions
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 5.0A g
VDS = VGS, ID = 25µA
VDS = 100V, VGS = 0V
VDS = 80V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
S
VDS = 10V, ID = 5.0A
Total Gate Charge
–––
8.7
11.7
Qgs1
Pre-Vth Gate-to-Source Charge
–––
2.1
–––
Qgs2
Post-Vth Gate-to-Source Charge
–––
0.58
–––
Qgd
Gate-to-Drain Charge
–––
2.8
4.2
ID = 5.0A
Qgodr
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
3.2
–––
See Fig. 17
Qsw
–––
3.4
–––
Qoss
Output Charge
–––
4.5
–––
nC
Ω
VDS = 50V
nC
VGS = 10V
VDS = 16V, VGS = 0V
RG
Gate Resistance
–––
1.9
2.9
td(on)
tr
Turn-On Delay Time
Rise Time
–––
–––
7.4
2.8
–––
–––
td(off)
Turn-Off Delay Time
–––
14
–––
tf
Fall Time
–––
4.3
–––
Ciss
Input Capacitance
–––
530
–––
Coss
Output Capacitance
–––
110
–––
Crss
Reverse Transfer Capacitance
–––
29
–––
Coss
Output Capacitance
–––
510
–––
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, f=1.0MHz
Coss
Output Capacitance
–––
67
–––
VGS = 0V, VDS = 80V, f=1.0MHz
VDD = 50V, VGS = 10Vg
ID = 5.0A
ns
RG=6.0Ω
VGS = 0V
pF
VDS = 25V
Diode Characteristics
Parameter
IS
Continuous Source Current
Min.
Typ. Max. Units
–––
–––
(Body Diode)
ISM
Pulsed Source Current
A
–––
–––
Conditions
MOSFET symbol
38
D
showing the
G
34
integral reverse
p-n junction diode.
TJ = 25°C, IS = 5.0A, VGS = 0V g
S
(Body Diode)e
VSD
Diode Forward Voltage
–––
–––
1.3
V
trr
Reverse Recovery Time
–––
31
47
ns
TJ = 25°C, IF = 5.0A, VDD = 25V
nC
di/dt = 100A/µs g
Qrr
Reverse Recovery Charge
–––
37
56
Notes:
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6655
Absolute Maximum Ratings
h
h
k
Max.
Units
2.2
1.4
42
270
-40 to + 150
W
Parameter
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
°C
Thermal Resistance
Parameter
hl
il
jl
kl
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Typ.
Max.
Units
–––
12.5
20
–––
1.4
58
–––
–––
3.0
–––
°C/W
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
100
Thermal Response ( Z thJA )
D = 0.50
0.20
10
0.10
0.05
0.02
1
τJ
0.01
0.1
R1
R1
τJ
τ1
SINGLE PULSE
( THERMAL RESPONSE )
R2
R2
R3
R3
R4
R4
Ri (°C/W)
R5
R5
1.6195
τA
τ1
τ2
τ2
τ3
τ3
τ4
τ4
τ5
τ5
Ci= τi/Ri
Ci= τi/Ri
τA
τi (sec)
0.000126
2.1406
0.001354
22.2887
0.375850
20.0457
7.410000
11.9144
99
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.01
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Notes:
† Surface mounted on 1 in. square Cu board, steady state.
‡ Used double sided cooling , mounting pad.
ˆ Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
† Surface mounted on 1 in. square Cu
board (still air).
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‰ TC measured with thermocouple incontact with top (Drain) of part.
Š Rθ is measured at TJ of approximately 90°C.
‡ Mounted to a PCB with a
thin gap filler and heat sink.
(still air)
ˆ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6655
100
100
BOTTOM
10
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
9.0V
8.0V
7.0V
6.0V
6.0V
1
BOTTOM
10
VGS
15V
10V
9.0V
8.0V
7.0V
6.0V
6.0V
1
≤60µs PULSE WIDTH
≤60µs PULSE WIDTH
Tj = 150°C
Tj = 25°C
0.1
0.1
0.1
1
10
100
1000
0.1
V DS, Drain-to-Source Voltage (V)
1
10
100
1000
V DS, Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
100
2.0
Typical RDS(on), (Normalized)
ID, Drain-to-Source Current (Α)
ID = 5.0A
10
T J = -40°C
T J = 25°C
T J = 150°C
1
VDS = 25V
≤60µs PULSE WIDTH
0.1
VGS = 10V
1.5
1.0
0.5
2
4
6
8
10
12
-60 -40 -20 0
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 6. Typical Transfer Characteristics
Fig 7. Normalized On-Resistance vs. Temperature
RDS(on), Drain-to -Source On Resistance ( mΩ)
10000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C, Capacitance(pF)
C oss = C ds + C gd
1000
Ciss
Coss
100
Crss
10
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs. Drain-to-Source Voltage
4
20 40 60 80 100 120 140 160
120
T J = 125°C
100
80
T J = 25°C
60
Vgs = 10V
40
0
2
4
6
8
10
ID, Drain Current (A)
Fig 9. Normalized Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF6655
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
Tc = 25°C
Tj = 175°C
Single Pulse
100
10
T J = -40°C
T J = 25°C
T J = 150°C
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100µsec
10
100msec
1msec
1
10msec
0.1
VGS = 0V
1
0.01
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0
1
VSD, Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
100
1000
Fig11. Maximum Safe Operating Area
5.5
Typical VGS(th) Gate threshold Voltage (V)
5
4
ID, Drain Current (A)
10
VDS, Drain-to-Source Voltage (V)
3
2
1
5
4.5
4
3.5
ID = 25µA
ID = 1.0mA
50
75
100
125
ID = 1.0A
2.5
0
25
ID = 250µA
3
2
-75 -50 -25
150
T A , Ambient Temperature (°C)
0
25
50
75 100 125 150 175
TJ , Temperature ( °C )
Fig 12. Maximum Drain Current vs. Ambient Temperature
Fig 13. Threshold Voltage vs. Temperature
EAS , Single Pulse Avalanche Energy (mJ)
50
ID
0.86A
1.3A
BOTTOM 5.0A
TOP
40
30
20
10
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6655
Current Regulator
Same Type as D.U.T.
Id
Vds
50KΩ
Vgs
.2µF
12V
.3µF
+
V
- DS
D.U.T.
Vgs(th)
VGS
3mA
IG
ID
Qgs1 Qgs2
Current Sampling Resistors
Fig 15a. Gate Charge Test Circuit
Qgd
Qgodr
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
D.U.T
RG
VGS
20V
DRIVER
L
VDS
tp
+
V
- DD
IAS
A
I AS
0.01Ω
tp
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
VDS
RD
VDS
90%
VGS
D.U.T.
RG
+
-
10V
Pulse Width ≤ 1 µs
VDD
10%
VGS
td(on)
tr
td(off)
tf
Duty Factor ≤ 0.1 %
Fig 17a. Switching Time Test Circuit
6
Fig 17b. Switching Time Waveforms
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IRF6655
D.U.T
+
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
+
‚
-
-
„
+

RG
VDD
• di/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
+
-
Driver Gate Drive
D=
Period
P.W.
P.W.
Period
*
VGS=10V
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Current
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
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7
IRF6655
DirectFET™ Substrate and PCB Layout, SH Outline
(Small Size Can, H-Designation).
Please see DirectFET application note AN-1035 for all details regarding PCB assembly using DirectFET.
This includes all recommendations for stencil and substrate designs.
8
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IRF6655
DirectFET™ Outline Dimension, SH Outline
(Small Size Can, H-Designation).
Please see DirectFET application note AN-1035 for all details regarding PCB assembly using DirectFET. This
includes all recommendations for stencil and substrate designs.
DIMENSIONS
Note: Controlling
dimensions are in mm.
METRIC
MAX
CODE MIN
4.85
A
4.75
3.95
B
3.70
2.85
C
2.75
0.45
D
0.35
0.62
E
0.58
0.62
F
0.58
0.67
G
0.63
0.87
H
0.83
K
0.99 1.03
2.33
L
2.29
0.70
M
0.59
0.08
N
0.03
0.17
P
0.08
IMPERIAL
MIN
MAX
0.187
0.191
0.146
0.156
0.108
0.112
0.014
0.018
0.023
0.024
0.023
0.024
0.025
0.026
0.033
0.034
0.039
0.041
0.090
0.092
0.023
0.028
0.001
0.003
0.003
0.007
DirectFET™ Part Marking
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9
IRF6655
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6655). For 1000 parts on 7" reel,
order IRF6655TR1
STANDARD OPTION
METRIC
CODE
MIN
MAX
A
330.0
N.C
B
20.2
N.C
C
12.8
13.2
D
1.5
N.C
E
100.0
N.C
F
N.C
18.4
G
12.4
14.4
H
11.9
15.4
REEL DIMENSIONS
(QTY 4800)
TR1 OPTION
IMPERIAL
METRIC
MIN
MAX
MIN
MAX
12.992
177.77 N.C
N.C
0.795
19.06
N.C
N.C
0.504
13.5
0.520
12.8
0.059
1.5
N.C
N.C
3.937
58.72
N.C
N.C
N.C
N.C
0.724
13.50
0.488
11.9
0.567
12.01
0.469
11.9
0.606
12.01
(QTY 1000)
IMPERIAL
MIN
MAX
6.9
N.C
0.75
N.C
0.50
0.53
0.059
N.C
2.31
N.C
N.C
0.53
0.47
N.C
0.47
N.C
Loaded Tape Feed Direction
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
IMPERIAL
METRIC
MIN
MAX
MIN
MAX
0.311
0.319
7.90
8.10
0.154
0.161
3.90
4.10
0.469
0.484
11.90
12.30
0.215
0.219
5.45
5.55
0.157
0.165
4.00
4.20
0.197
0.205
5.00
5.20
0.059
N.C
1.50
N.C
0.059
0.063
1.50
1.60
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/05
10
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