Intersil ISL9230 1107 High power li-ion charger w/i-path management Datasheet

High Power Li-Ion Charger W/I-Path Management
ISL9230
Features
The ISL9230 is a fully integrated high input voltage single-cell
Li-ion battery charger with power path management function.
This charger performs the CC/CV charge function required by
Li-ion batteries. The charger can withstand an input voltage up to
26V but is disabled when the input voltage exceeds 6.6V OVP
threshold. The input current limit and charge current are
programmable with external resistors. When the battery voltage
is lower than 3.0V, the charger preconditions the battery with
10% of the programmed charge current. When the charge
current reduces to the end-of-charge (EOC) current level during
the CV charge phase, the EOC indicator (CHG) will toggle to a
logic high to indicate the end-of-charge condition.
• Complete Charger for Single-Cell Li-ion/Polymer Batteries
• Current Path Management Optimize for Charge and System
Currents
• Intelligent Timeout Interval Based on Actual Charge Current
• 1% Charger Output Voltage Accuracy
• Programmable Input Current Limit
• Programmable Charge Current
• NTC Thermistor Input
• Complies with USB Charger
• Charge Current Thermal Foldback for Thermal Protection
The ISL9230 uses separate power paths to supply the system
load and the battery. This feature allows the system to
immediately operate with a completely discharged battery. This
feature also allows the charge to terminate when the battery is
full while continuing to supply the system power from the input
source, thus minimizing unnecessary charge/discharge cycles
and prolonging the battery life.
• Trickle Charge for Fully Discharged Batteries
• 26V Maximum Voltage at VIN Pin
• Power Presence and Charge Indications
• Ambient Temperature Range: -40°C to +85°C
• 16 Ld 3x3 TQFN Package
Two indication pins (PG and CHG) allow simple interface to a
microprocessor or LEDs.
• Pb-Free (RoHS Compliant)
Applications
• Mobile Phones
• Blue-Tooth Devices
• PDAs
• MP3 Players
• Stand-Alone Chargers
• Other Handheld Devices
INPUT
TO SYS
VOUT
VIN
C1
ISL9230
VBAT
R1
CONT
}
FROM
µP
C3
R2
C2
CHGEN
IREF
RIREF
PG
ILIM
RILIM
AC/USB
GND
MODE
4.7µF X5R ceramic capacitor
C2
1µF X5R ceramic capacitor
C3
4.7µF X5R ceramic capacitor
(Application specific)
RTIME (Application specific)
BATT
NTC
RTIME
DESCRIPTION
C1
RIREF
D1
CHG
TIME
PART
}
FROM µP
T
RILIM
(Application specific)
R1, R2 300 to 1kΩ, 5% resistor
D1, D2 LEDs for indication
FIGURE 1. TYPICAL APPLICATION CIRCUIT
July 22, 2011
FN7642.1
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL9230
Block Diagram
Q1
VIN
VOUT
IOUT
ISL9230
VOUT
VBAT
Q2
VIN
VBAT
ILIM
IBAT
ILIMREF
CHG
PUMP
VOUTREF
VOUT
155°C
IREF
DIE TEMP
IBATREF
IBAT
NTC
VIN
IREF
HITEMP
VBAT
IOUT
IBAT
TIME
CLK
LOTEMP
S
VBAT
Q
VBATREF
R
DIE TEMP
125°C
AC/USB
MODE
CHG
CONT
PG
CHGEN
GND
2
FN7642.1
July 22, 2011
ISL9230
Pin Configuration
IREF
CONT
TIME
VIN
ISL9230
(16 LD QFN)
TOP VIEW
16
15
14
13
2
11 VOUT
VBAT
3
10 VOUT
CHGEN
4
9 CHG
5
6
7
8
GND
VBAT
PG
12 ILIM
MODE
1
AC/USB
NTC
Pin Descriptions
PIN NUMBER
SYMBOL
DESCRIPTION
1
NTC
The NTC pin sources a current to develop a voltage across the battery pack NTC resistor. Placing a 10kΩ NTC thermistor
will check if the battery’s temperature is out of the safe temperature window. If the temperature is out of the safe
operating window, the charger is suspended. For applications that do not require the use of the NTC function, connect
a 10kΩ fixed resistor from NTC to GND to maintain a valid voltage level on the NTC pin.
2, 3
VBAT
Charger output pin. Connect this pin to the battery. A 1µF or larger X5R ceramic capacitor is recommended for
decoupling and stability purposes.
4
CHGEN
Battery charger enable pin. The CHGEN pin is a logic input pin to provide external charge control. An internal 670kΩ
pull-down resistor is connected to this pin. Drive the pin HIGH to disable the charger during charging. When CHGEN is
high, VOUT is still active and the battery power remains available at VOUT. To ensure proper operation, do not leave this
pin unconnected.
5
AC/USB
Selects between Adapter and USB input power. Pull high for selecting adapter power and pull low for USB power. An
internal 670kΩ pull-down resistor is connected to this pin. To ensure proper operation, do not leave this pin
unconnected.
6
MODE
In combination with the AC/USB pin, this pin selects the input current limit levels. If AC/USB pin is low, a low on the
Mode pin sets the USB current to 100mA, and a high selects the 500mA limit. If the AC/USB pin is high, a low on the
mode pin selects the ILIM programmed current and a high will put the ISL9230 into a suspend state. An internal
280kΩ pull-down resistor is connected to this pin. To ensure proper operation, do not leave this pin unconnected.
7
PG
Open-drain power good indication. The open-drain MOSFET turns on when the input voltage is above the POR threshold
but below the OVP threshold. This pin is capable of sinking 5mA (minimum) to drive a LED. The maximum voltage rating
for this pin is 6.5V and it is recommended to use VOUT as the pull-up voltage.
8
GND
Connect to ground.
9
CHG
Open-drain charge indication pin. This pin outputs a logic LOW when a charge cycle starts and goes Hi-Z when an
end-of-charge (EOC) condition is qualified. This pin is capable of sinking 5mA min. to drive an LED. When the charger
is disabled, the CHG is also in a Hi-Z state.
10, 11
VOUT
Output connection to the system. When a valid input power is present, this pin provides a 3.4V regulated voltage for the
system during trickle charge and is maintained at VBAT + 225mV during fast charging. A 4.7µF or larger X5R ceramic
capacitor is recommended for decoupling and stability purposes.
12
ILIM
Input current limit programming pin. Connect a resistor between this pin and the GND to set the input current limit
determined by Equation 1 when AC/USB = 1, MODE = 0
1610
I LIM = -------------R ILIM
( mA )
200mA < ILIM < 1.5A
(EQ. 1)
Where RILIM is in kΩ
If the ILIM pin is left unconnected, all input current is disabled.
3
FN7642.1
July 22, 2011
ISL9230
Pin Descriptions (Continued)
PIN NUMBER
SYMBOL
DESCRIPTION
13
VIN
Power input. The absolute maximum input voltage is 26V. A 4.7µF or larger value capacitor is recommended to be
placed very close to the input pin for decoupling purposes. Additional capacitance may be required to provide a stable
input voltage.
14
TIME
Timing resistor pin. The TIME pin determines the oscillation period by connecting a timing resistor between this pin and
GND. The oscillator also provides a time reference for the charger calculated in Equation 2. Equation 3 provides the
formula for finding the Pre-conditioning time, which is 1/10 of the Fast Charge timer. Leaving the TIME pin unconnected
sets the timer to the default values of 30 minutes for pre-conditioning and 5 hours for fast charge.
t FAST = 8 × R TIME
( Min )
(EQ. 2)
t PRE = 0.8 × R TIME
( Min )
(EQ. 3)
Where RTIME is in kΩ
15
CONT
Active high overrides the end-of-charge (EOC) or timer termination. By pulling the continuous charge CONT pin high, the
device will continue to charge the battery when the current has fallen below IEOC or the safety timer has timed out. The
status of this pin can not be changed after POR. The CONT pin is internally pulled down to GND by a 280kΩ resistor,
but to ensure proper operation, do not leave the CONT pin floating.
16
IREF
Charge current program and monitoring pin. Connect a resistor between this pin and the GND pin to set the charge
current limit determined by Equation 4:
890
(EQ. 4)
I FAST = --------------( mA )
R IREF
Where RIREF is in kΩ. The IREF pin voltage also monitors the actual charge current during the entire charge cycle,
including the trickle, constant-current, and constant-voltage phases. When disabled, VIREF = 0V.
-
EPAD
Exposed pad. Connect as much copper as possible to this pad either on the component layer or other layers through
thermal vias to enhance the thermal performance.
TABLE 1. INPUT CURRENT LIMIT SELECTION
AC/USB
MODE
DESCRIPTION
0
0
USB 100mA limit
0
1
USB 500mA limit
1
0
RILIM current programming
1
1
Suspend mode
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
ISL9230IRZ
DLBB
TEMP RANGE
(°C)
-40 to +85
PACKAGE
(Pb-free)
16 Ld 3x3 QFN
PKG.
DWG. #
L16.3x3E
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate
plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9230. For more information on MSL please see techbrief TB363.
4
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ISL9230
Absolute Maximum Ratings (Referenced to GND)
Thermal Information
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 26V
All other pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
IVIN (Input Current) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.6A
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
QFN Package (Notes 4, 5) . . . . . . . . . . . . . .
41
3.0
Maximum Junction Temperature (Plastic Package) . . . .-40°C to +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
IO Output Current (Continuous)
IVOUT (Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5A
IVBAT (Discharge Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5A
IVBAT (Charging Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5A
Output Sink Current CHG, PG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mA
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Maximum Supply Voltage (VIN Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V
Operating Supply Voltage (VIN Pin) . . . . . . . . . . . . . . . . . . . . . . 4.3V to 6.4V
Programmed Fast Charge Current . . . . . . . . . . . . . . . . .300mA to 1500mA
IVIN Input current, VIN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5A
IVOUT Current, VOUT Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5A
IVBAT Current, VBAT Pin (Discharging) . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5A
IVBAT Current, BAT Pin (Charging). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5A
ESD Ratings
Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . .2.5kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . . 250V
Charged Device Model (Tested per JESD22-C101D) . . . . . . . . . . . 1000V
Latch Up (Tested per JESD78B, Class II, Level A) . . . . . . . . . . . . . . . 100mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Typical values are tested at VIN = 5V, VBAT = 3.6V and the ambient temperature at +25°C. MIN/MAX
limits are across the operating conditions, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to
+85°C.
PARAMETER
SYMBOL
TEST CONDITIONS
Rising POR Threshold
VPOR_R
VBAT = 3.0V, use PG to indicate the comparator output
Falling POR Threshold
VPOR_F
MIN
(Note 8)
TYP
MAX
(Note 8) UNITS
3.2
3.36
3.5
V
2.92
3.05
3.18
V
POWER-ON RESET
POR Deglitch Time
tPG
VIN >VPOR to PG Low
1.2
ms
VIN-BAT OFFSET VOLTAGE
Rising Threshold
VOS_R
VBAT = 3.6V, VIN ramps from 3.5V to 4V
50
80
Falling Threshold
VOS_F
VBAT = 3.6V, VIN ramps from 4V to 3.5V
20
60
6.25
6.6
130
mV
mV
VIN OVERVOLTAGE PROTECTION
Overvoltage Protection Threshold
VOVP
6.9
V
OVP Threshold Hysteresis
VOVP_HYS
110
mV
Input Overvoltage Blanking
tOVP_BLK
50
µs
Input OVP Recovery Time
tOVP-REC
1.2
ms
BATTERY DETECTION
Battery Detection Current
IDET
Detection Timer
tDET
VBAT = 2.5V (Note 7)
-5
-7.5
-10
mA
250
ms
1.4
mA
ILIM, IREF SHORT CIRCUIT DETECTION (CHECKED DURING START-UP)
Current Source
ISC
5
VIN > VPOR and VIN > VBAT + VOS
FN7642.1
July 22, 2011
ISL9230
Electrical Specifications Typical values are tested at VIN = 5V, VBAT = 3.6V and the ambient temperature at +25°C. MIN/MAX
limits are across the operating conditions, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to
+85°C. (Continued)
PARAMETER
SYMBOL
Short-Circuit Detection threshold
TEST CONDITIONS
MIN
(Note 8)
TYP
MAX
(Note 8) UNITS
VSC
VIN > VPOR and VIN > VBAT + VOS
510
mV
Battery Short Circuit Detection Current
IBSC
VBAT = 1.5V
Battery Short Circuit Threshold
VBSC
Output Short Circuit Detection at Valid VIN
VOSC1
Output Short Circuit Detection, Load
Sharing Mode (Note 7)
VOSC2
Blanking Time for VSC2
BTOSC2
250
μs
Recovery Time for VSC2
RTOSC2
60
ms
SHORT CIRCUIT DETECTION
3
5.5
8
mA
1.6
1.8
2.0
V
VIN > VPOR
VIN > VBAT + VOS
0.8
0.9
1.0
V
Referenced to VBAT
VIN > VPOR
VIN > VBAT + VOS
-200
-250
-300
mV
OPERATING CURRENT
BAT Pin Supply Current
IVBAT
No supply at VIN, CHGEN = LOW
6.5
µA
VIN Pin Suspend Current
IVIN
Charger enabled, AC/USB = Mode = 1
200
µA
VIN Pin Supply Current
IVIN
Charger enabled
1.5
mA
V
VOLTAGE REGULATION
Output Voltage
VO_REG
Charger Output Voltage
VB_REG
IREF Pin Voltage
VIREF
VIN > VOUT + VDO_Q1, VBAT > 3.2V
System current + charge current = 15mA
VBAT +
0.150
VBAT +
0.225
VBAT +
0.270
VIN > VOUT + VDO_Q1, VBAT < 3.2V
System current + charge current = 15mA
3.3
3.4
3.5
4.185
4.20
4.215
Charge current = 10mA
4.16
4.20
4.23
VBAT = 3.8V
1.8
2.24
2.55
V
-200
-100
-50
mV
Charge current = 10mA, TA = +25°C
V
POWER PATH
Output DPPM Threshold Voltage
VDPPM
Output voltage threshold where charge current starts to
reduce. Referenced to regulated VOUT
Input DPM Threshold Voltage
VIN-DPM
Input voltage threshold where the input current starts
to reduce, AC/USB = 0, MODE = X
4.36
V
Battery Supply Enter Threshold
VBSUP_ON
Referenced to VBAT, VBAT = 3.6V
-40
mV
Battery Supply Exit Threshold
VBSUP_OFF
Referenced to VBAT, VBAT = 3.6V
-20
mV
Q1 Dropout Voltage (VIN-VOUT)
(Note 7)
VDO_Q1
VOUT = 4.3V, IIN = 1A, VBAT = 4.2V
300
475
mV
Q2 Dropout Voltage
(VBAT-VOUT)
VDO_Q2
VIN = 0V, VBAT > 3V, IOUT = 1A
40
80
mV
-120
-50
mV
DROPOUT VOLTAGE
RECHARGE THRESHOLD
Recharge Voltage Threshold
VRCH
Referenced to VB_REG
-215
Recharge Deglitch Time
tRCH
tRCH includes tDET (CONT = 0)
300
ms
Delay Time, Input Power Loss to VOUT
LDO Turn-Off
tNO-IN
VBAT = 3.6V Time is measure from VIN: 5V to 3V at 1µs
fall time
20
ms
CURRENT REGULATION (Note 6)
Input Current Limit Range
ILIM_RNG
6
AC/USB = 1, Mode = 0
200
1500
mA
FN7642.1
July 22, 2011
ISL9230
Electrical Specifications Typical values are tested at VIN = 5V, VBAT = 3.6V and the ambient temperature at +25°C. MIN/MAX
limits are across the operating conditions, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to
+85°C. (Continued)
PARAMETER
SYMBOL
Input Current Limit Accuracy
MIN
(Note 8)
TYP
MAX
(Note 8) UNITS
ILIM_AC1
RILIM = 1.62kΩ
955
1000
1045
mA
ILIM_AC2
RILIM = 4.32kΩ
340
375
410
mA
ILIM_100
AC/USB = 0, Mode = 0
78
88
98
mA
ILIM_500
AC/USB = 0, Mode = 1
380
440
500
mA
VBAT < 4.2V, AC/USB = 1, Mode = 0
300
1500
mA
RIREF = 1.78kΩ
450
500
550
mA
RIREF = 887Ω
900
1000
1100
mA
AC/USB, MODE not equal to (1, 1)
RIREF = 1.78kΩ (ITRK = 88/RIREF)
39
49
58
mA
IEOC_USB100 AC/USB = 0, Mode = 0, RIREF = 887Ω
13
29
46
mA
IEOC_USB500 AC/USB = 0, Mode = 1, RIREF = 887Ω
70
96
125
mA
76
96
116
mA
Fast Charge Current Range
IFAST
Fast Charge Current
Trickle Charge Current
ITRK
End Of Charge Current
TEST CONDITIONS
IEOC_AC
End Of Charge Deglitch Time
RIREF = 887Ω
tEOC
25
ms
PRECONDITIONING VOLTAGE THRESHOLD
Preconditioning Threshold Voltage
VMIN
VIN > VPOR and VIN > VBAT + VOS
2.9
3.0
3.1
V
Trickle Charge to Fast Charge Deglitch
Time
tCHG_LH
25
ms
Fast Charge to Trickle Charge Deglitch
Time
tCHG_HL
25
ms
CHARGING TIMERS (Note 7)
Fast Charge Timer
tFAST
Trickle Charge Timer
tPRE
RTIME = 30kΩ
180
240
300
RTIME = Floating
240
300
360
RTIME = 30kΩ
RTIME = Floating
24
24
30
Min
Min
36
INTERNAL TEMPERATURE MONITORING
Charger Current Thermal Foldback
Threshold
TFOLD
Thermal Shutdown Threshold
TSD
Thermal Shutdown Hysteresis
TSD_HYS
TJ rising
125
°C
155
°C
20
°C
EXTERNAL TEMPERATURE MONITORING
Thermistor Bias Current
IT
High Temperature Threshold
V TMAX
High Temperature Hysteresis
V TMAX_H
Low Temperature Threshold
V TMIN
Low Temperature Hysteresis
VTMIN_H
Temperature Trip Deglitch Time
tT_DG
NTC Pin Disable Threshold
VDIS_NTC
VIN >VPOR and VIN > VBAT + VOS
72
75
78
μA
VNTC falling
240
295
340
mV
VNTC rising after reaching V TMAX
VNTC rising
30
2000
VNTC falling after reaching VTMIN
2100
300
Measured from NTC fault to charger disabled
Referenced to VIN, NTC unconnected
mV
2200
mV
mV
50
ms
-300
mV
LOGIC INPUT AND OUTPUTS
CHGEN, CONT, MODE, AC/USB Logic
Input High
7
1.4
V
FN7642.1
July 22, 2011
ISL9230
Electrical Specifications Typical values are tested at VIN = 5V, VBAT = 3.6V and the ambient temperature at +25°C. MIN/MAX
limits are across the operating conditions, unless otherwise specified. Boldface limits apply over the operating temperature range, -40°C to
+85°C. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 8)
TYP
CHGEN, CONT, MODE, AC/USB Logic
Input Low
MAX
(Note 8) UNITS
0.4
V
CHGEN and AC/USB Pin Internal
Pull-Down Resistance
570
670
770
kΩ
CONT and MODE Pin Internal Pull-Down
Resistance
220
280
340
kΩ
PG, CHG
Driving Capability when LOW
Pin Voltage = 0.4V
Leakage Current when HIGH
Pin Voltage = 5V, VOUT = VBAT = 5V
5
mA
1
µA
NOTES:
6. The input current charge current can be affected by the thermal foldback function if the IC under the test setup cannot dissipate the heat.
7. Limits established by characterization and are not production tested.
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
8
FN7642.1
July 22, 2011
ISL9230
Typical Characteristics VIN = 5V, VBAT = 3.6V, AC/USB = 1, MODE = 0, TA = +25°C, unless otherwise
specified.
2V/DIV
VOUT
VBAT
END OF CHARGE OCCURS
CV CHARGE OCCURS
VBAT RAMPING UP
WHEN VBAT REACHES AGAIN WHEN VBAT > 4.2V
FROM 0V
4.2V
2V/DIV
RECHARGE OCCURS WHEN
VBAT FALLS BELOW 100mV
FAST CHARGE BEGINS
WHEN VBAT > 3V
FROM THE CV THRESHOLD
END OF CHARGE OCCURS
WHEN IBAT < IEOC
CHG
2V/DIV
VIN
2V/DIV
2V/DIV
TRICKLE CHARGE
BEGINS WHEN
VBAT > 1.8V
IBAT
200mA/DIV
IBAT
200mA/DIV
VOUT
5V/DIV
CHG
10ms/DIV
200s/DIV
FIGURE 2. DESCRIPTION OF CHARGING MODES AS VBAT VARIES
FIGURE 3. ADAPTER PLUG-IN WITH BATTERY CONNECTED
BATTERY NOT PRESENT
2V/DIV
BATTERY REMOVED
1V/DIV
2V/DIV
BATTERY INSERTED
VBAT
VIN
5V/DIV
VOUT
2V/DIV
1V/DIV
VOUT
VBAT
CHG
CHG
BATTERY DETECTION MODE
5V/DIV
500mA/DIV
IBAT
TRICKLE CHARGE
200ms/DIV
200ms/DIV
FIGURE 4. BATTERY DETECTION - BATTERY REMOVED
FIGURE 5. BATTERY DETECTION - BATTERY INSERTED/REMOVED
5V/DIV
CHGEN
5V/DIV
CHGEN
5V/DIV
5V/DIV
VOUT
VOUT
TRICKLE CHARGE
500mA/DIV
IBAT
500mA/DIV
IOUT
4ms/DIV
FIGURE 6. CHARGER ON/OFF BY CHGEN (ROUT = 10Ω)
9
500mA/DIV
IBAT
500mA/DIV
IOUT
4ms/DIV
FIGURE 7. CHARGER ON/OFF CHGEN (ROUT = 10Ω, VBAT = 3.6V)
FN7642.1
July 22, 2011
ISL9230
Typical Characteristics VIN = 5V, VBAT = 3.6V, AC/USB = 1, MODE = 0, TA = +25°C, unless otherwise
specified. (Continued)
VOUT
2V/DIV
2V/DIV
5V/DIV
VBAT
5V/DIV
VOUT
VBAT
500mA/DIV
5V/DIV
IOUT
VIN
IBAT
500mA/DIV
2V/DIV
PG
10ms/DIV
20s/DIV
FIGURE 8. OVP FAULT VIN = 5V TO 15V, R OUT = 10Ω
FIGURE 9. ENTERING AND EXITING DPPM MODE
5V/DIV
2V/DIV
VBAT
5V/DIV
VOUT
IVIN
2A/DIV
VBAT
5V/DIV
VOUT
2V/DIV
CHG
10A/DIV
IOUT
500mA/DIV
IBAT
200µs/DIV
100ms/DIV
FIGURE 10. VOUT SHORTED WITH BATTERY CONNECTED
FIGURE 11. VBAT TOGGLE FROM 4.3V TO 3.8V (NO OUTPUT)
1.4
500
1.3
400
IVIN (mA)
SHUTDOWN CURRENT (µA)
600
300
200
1.2
1.1
100
0
0
2
4
6
8
10
12
14
16
18
20
VIN (V)
FIGURE 12. SHUTDOWN CURRENT CHGEN = 1
10
22
24
1.0
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
FIGURE 13. VIN PIN SUPPLY CURRENT CHGEN = 0
FN7642.1
July 22, 2011
ISL9230
Typical Characteristics VIN = 5V, VBAT = 3.6V, AC/USB = 1, MODE = 0, TA = +25°C, unless otherwise
specified. (Continued)
600
80
ILOAD = 1A
70
500
VDO-Q2 (mV)
VDO-Q1 (mV)
60
400
300
200
ILOAD = 1A
VIN = 0V
VBAT = 3.6V
50
40
30
20
100
10
0
-50
-25
0
25
50
75
100
0
-50
125
-25
0
50
75
100
FIGURE 14. DROPOUT VOLTAGE (Q1) vs TEMPERATURE
FIGURE 15. DROPOUT VOLTAGE (Q2) vs TEMPERATURE
43
1.2
ILOAD = 1A
VIN = 0V
0.8
IBAT (A)
39
37
0.6
0.4
35
0.2
33
3.0
3.2
3.4
3.6
VBAT (V)
3.8
4.0
0.0
100
4.2
FIGURE 16. DROPOUT VOLTAGE (Q2) vs VBAT
4.23
125
1.0
41
VDO-Q2 (mV)
25
TEMPERATURE (°C)
TEMPERATURE (°C)
105
110
115 120 125 130 135
TEMPERATURE (°C)
140
145
150
FIGURE 17. THERMAL REGULATION OF IBAT
4.45
IBAT = 10mA
IOUT = 10mA
VOUT VOLTAGE (V)
VBAT VOLTAGE (V)
4.44
4.21
4.19
4.17
4.43
4.42
4.41
4.40
4.15
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
FIGURE 18. BATTERY VOLTAGE REGULATION vs TEMPERATURE
11
4.39
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
FIGURE 19. OUTPUT VOLTAGE REGULATION vs TEMPERATURE
FN7642.1
July 22, 2011
ISL9230
Typical Characteristics VIN = 5V, VBAT = 3.6V, AC/USB = 1, MODE = 0, TA = +25°C, unless otherwise
specified. (Continued)
54
4.214
IBAT = 100mA
4.212
4.210
52
VBAT (V)
ITRK (mA)
ILOAD = 1A
RIREF = 1.82kΩ
53
VBAT = 2V
51
50
4.208
4.206
4.204
49
4.202
48
-50
-25
0
25
50
75
100
4.200
4.5
125
4.7
4.9
5.1
5.3
FIGURE 20. TRICKLE CHARGE vs TEMPERATURE
6.5
4.430
4.2080
VOUT (V)
VBAT (V)
6.3
VBAT is FLOATING
4.2085
4.2075
4.2070
4.425
4.420
4.2065
4.2060
4.415
4.2055
0.3
0.5
0.7
0.9
1.1
1.3
1.5
4.410
0.0
0.2
0.4
0.6
IBAT (A)
FIGURE 22. BATTERY VOLTAGE vs CHARGE CURRENT (CV MODE)
0.8
1.0
IOUT (A)
1.2
1.4
1.6
FIGURE 23. OUTPUT VOLTAGE vs OUTPUT CURRENT
1.2
VOUT IS FLOATING
VOUT
1.0
4.40
0.8
4.35
IBAT (A)
VBAT AND VOUT (V)
6.1
4.435
4.2090
4.45
5.9
4.440
4.2095
4.50
5.7
FIGURE 21. BATTERY VOLTAGE vs INPUT VOLTAGE
4.2100
4.2050
0.1
5.5
VIN (V)
TEMPERATURE (°C)
4.30
4.25
0.6
0.4
4.20
VBAT
4.15
4.10
0.1
0.3
0.5
0.7
0.9
IBAT (A)
0.2
1.1
1.3
1.5
FIGURE 24. VBAT AND VOUT vs CHARGE CURRENT (CV MODE)
12
0
0.0
0.5
1.0
1.5
2.0
2.5
VBAT (V)
3.0
3.5
4.0
4.5
FIGURE 25. BATTERY VOLTAGE vs CHARGE CURRENT (CC MODE)
FN7642.1
July 22, 2011
ISL9230
Typical Characteristics VIN = 5V, VBAT = 3.6V, AC/USB = 1, MODE = 0, TA = +25°C, unless otherwise
specified. (Continued)
3.50
1.0
3.45
POR THRESHOLD (V)
1.2
0.6
0.4
0.2
0
3.6
4.0
4.4
4.8
5.2
5.6
6.0
6.4
3.40
3.35
3.30
3.25
3.20
-50
6.8
-25
VIN (V)
SHORT
OCCURED
0
25
50
75
100
125
TEMPERATURE (°C)
FIGURE 26. CHARGE CURRENT vs INPUT VOLTAGE
SHORT
REM OVED
FIGURE 27. INPUT VOLTAGE POR THRESHOLD vs TEMPERATURE
Q2 ON
Q2 OFF
Q2 OFF
Q2 ON
BT O SC 2
T < BT O SC2
VBAT-VOUT
IBAT (A)
0.8
RT OSC 2
RT O SC2
BT O SC 2
SHORT
OCCURED
= IOUT X R DSO N (Q2)
IOUT = NORM AL,
Q2 IS ON
V O SC2
= VBAT
(VOUT = ~ 0V)
Q2 IS OFF
SHORT
REM OVED
BT O SC 2
= 0V
IOUT = 0,
Q2 IS ON,
VOUT = VBAT
= ISC X R DSO N (Q2)
VOUT IS SHORTED, Q2 IS ON
TIME
FIGURE 28. VOUT SHORT CIRCUIT CHARACTERISTIC AT SUPPLEMENTAL MODE
13
FN7642.1
July 22, 2011
ISL9230
Theory of Operation
PG Indication
When a valid input voltage is applied at VIN, the ISL9230 first
regulates VOUT at 3.4V or at VBAT plus 225mV, depending on the
battery voltage. If the battery voltage is below 3.2V, the ISL9230
regulates VOUT at 3.4V. If the battery voltage is higher than 3.2V,
VOUT will be regulated at VBAT plus 225mV. The charge current is
also dependent on the battery voltage. When VBAT is less than
3.0V, the ISL9230 trickle charges the battery at a reduced
current, as specified in the "Electrical Specifications" table on
page 7. Once VBAT reaches 3.0V, the fast charge phase starts.
When the system exceeds the maximum available current, either
limited by the IC or by the input power supply, the charger FET Q2
is operated in a reverse mode, i.e. it provides battery current to
the system instead of charging.
The PG pin is an open-drain output to indicate the presence of a
good supply voltage on the VIN pin. If VIN is higher than the POR
threshold and lower than the OVP threshold, an internal open-drain
FET is turned on. If VIN suddenly falls below the POR falling
threshold or rises above the OVP rising threshold, the open-drain FET
will turn off. When turned on, the PG pin should be able to sink at
least 5mA current under all operating conditions.
TRICKLE
CC
CV
CHARGE
VOLTAGE
FAST
VRCH
3.0V
I EOC
CHG
CHG INDICATION
TIME
FIGURE 29. TYPICAL CHARGING CYCLE FOR CONT = L
The charger function is similar to other Li-ion battery chargers,
i.e., it charges the battery at a constant current (CC) or a constant
voltage (CV) depending on the battery terminal voltage. The
constant current IFAST is set by the external resistor RIREF.
Depending on the combination of the AC/USB and the MODE pin
status, the actual charge current may be reduced by the input
current limit. When the battery voltage reaches the final voltage
of 4.2V, the charger enters the CV mode and regulates the
battery voltage at 4.2V to fully charge the battery without the risk
of overcharging. Upon reaching an end-of-charge (EOC) current,
the CHG will turn to high impedance to indicate a charge
complete state and if CONT is low, Q2 will be turned off to
terminate charging. Figure 29 shows the typical charge profile
with the EOC recharge events when CONT is low.
The EOC current level is internally set at 10% of the fast charge
current as set by RIREF for AC adapter input and USB500 input
types. For USB100 input, the EOC current is set at 3.3% of the
fast charge current as set by RIREF. The CHG signal pulls low
when the trickle charge starts and turns to high impedance at an
EOC event.
A thermal foldback function reduces the charge current anytime
when the die temperature reaches typically +125°C. This function
guarantees safe operation when the printed-circuit board (PCB) is
not capable of dissipating the heat generated by the linear charger.
The ISL9230 can withstand an input voltage up to 26V but will be
disabled when the input voltage exceeds the OVP threshold, 6.6V
typical, to protect against unqualified or faulty AC adapters.
14
The power-good range is defined by the following three conditions:
1. VIN > VPOR
3. VIN < VOVP
where VOS is the offset voltage between the input and charger
output. The VOVP is the overvoltage protection threshold given in
the “Electrical Specifications” table on page 5. All VPOR, VOS, and
VOVP have hysteresis.
CHARGE
CURRENT
ITRK
Power-Good Range
2. VIN - VBAT > VOS
4. 2 V
I
The PG pin can be used to drive a LED or to interface with a
microprocessor.
CHG Indication
The CHG is an open-drain output. The open drain FET turns on
when the charger starts to charge and turns off when the EOC
condition is qualified. Once the EOC condition is qualified, the
CHG signal is latched in a Hi-Z state. The EOC condition is
qualified when both of the following conditions are satisfied:
1. VBAT > VRCH
2. IBAT < IEOC
After being turned off, even if the battery is being automatically
recharged later, the CHG indication will not be turned on again
until one of the following events is encountered:
1. Input power being re-cycled
2. CHGEN signal being toggled
3. The battery is removed and re-inserted
The CHG signal can be interfaced either with a microprocessor
GPIO or a LED for indication. A de-glitch delay of 25ms for both
edges is implemented to prevent nuisance triggering during
some short transient conditions.
Charge Termination, Recharge and Timeout
When an EOC condition is reached, the CHG pin changes to Hi-Z to
indicate the end-of-charge condition and the charging is terminated
if the CONT pin is in logic low. When a recharge condition is met, the
safety timer will be reset to zero and the charging re-starts.
In the event a timeout interval has elapsed before the EOC
condition is reached, a timeout fault condition is triggered. The
timeout fault condition is indicated by the CHG pin being toggled
between HI and LO every 0.5s. The timeout fault condition can be
cleared by removing and reapplying the input power to the IC.
Under the EOC, timeout and timeout fault conditions, the power
delivery to VOUT is not impacted. The battery continues to supply
current to VOUT if needed, as described in “Dynamic Power Path
Management” on page 15.
FN7642.1
July 22, 2011
ISL9230
from dropping further. Therefore, the VIN-DPM feature prevents
the USB port from crashing.
The charge termination current is calculated as follows:
For AC or USB500 input:
(EQ. 5)
I EOC = 0.1XIFAST
USB100 input:
(EQ. 6)
I EOC = 0.033XI FAST
Where IFAST is the fast charge current set by RIREF.
Disabling the Charge Termination Option
By setting the CONT pin low, the charge termination option will
occur when either IBAT < IEOC or the safety timer times out. This
function can be disabled by selecting the CONT pin high but
choosing the correct charge termination function needs to be
done prior to POR. When CONT is high, the safety timers are
suspended. For EOC detection, CHG status is not affected by the
state of the CONT pin, i.e. when IBAT < IEOC, the CHG will turn to
high impedance regardless of the status of CONT.
ILIM Pin Function
The ILIM pin is provided to control the maximum current drawn
by the ISL9230 at the VIN pin to supply the system and charge
the battery. This enables the system designer to ensure that the
IC does not draw more than the source can provide.
IREF Pin Function
The IREF pin has the two functions as described in the "Pin
Descriptions" on page 4. The fast charge current can be
programmed by the RIREF over the range of 300mA to 1500mA
for AC adapter input. The second function of the IREF pin is for
monitoring the charge current by measuring the voltage at this
pin, which is proportional to the charge current.
Dynamic Power Path Management
The power path management function of the ISL9230 controls
the charge current and the system current when charging the
battery with system load. The available input current, which is
either limited by the ISL9230 or by the input power source,
whichever is smaller, is properly split into two paths, one to the
battery and the other to the system. The priority is given to the
system. When the output voltage drops to the DPPM threshold,
which is the regulated output voltage minus 100mV, the
Dynamic Power Path Management (DPPM) starts to function.
The DPPM control will first allocate the available current to
satisfy the system needs, using the remaining current to charge
the battery. If the total available current is not enough to supply
the system need, when the output voltage drops to 40mV below
the battery voltage, the DPPM control will turn on the charge
control FET, allowing the battery to supply current to the system
load. Thus, when DPPM occurs, the battery may be charged at a
current smaller than the programmed constant current.
Input DPM Mode (VIN-DPM)
VIN-DPM is a special feature that is designed for current-limited
USB ports. VIN-DPM is engaged when the ISL9230 is configured
for USB100 (AC/USB = 0, MODE = 0) or USB500 (AC/USB = 0,
MODE = 1) modes. During operation of VIN-DPM, the input
voltage is monitored and if VIN drops to the threshold of
VIN-DPM, the input current is reduced to keep the input voltage
15
Short Circuit Detection and Battery Presence
By setting CHGEN = LO, the ISL9230 first checks to see if there is
a short-circuit on the VBAT pin. During the short circuit detection,
a current of 5.5mA is sourced from VBAT to the battery. If VBAT is
above VBSC after the test, charging current ITRK begins. During
battery detection, a current sink of a duration tDET is used to
detect if a battery has been installed or removed while power is
applied to the VIN pin. A pulsed switch sinks a 7.5mA current
from VBAT. If VBAT is above VMIN after the sink test, charging
current begins. If the voltage drops below VMIN within tDET, it
indicates the battery may have been removed or the battery
safety circuit is open. The IC will then apply ITRK for tDET to close,
if possible, the battery safety circuit. If the voltage rises above
VRCH, this indicates a missing battery condition. If the VBAT
voltage is within VMIN < VBAT < VRCH, it is determined that a
battery has been installed and charging is initiated.
Intelligent Timer
The internal timer in the ISL9230 provides a time reference for
the maximum charge time limit. The nominal clock cycle for the
reference time is set by the external resistor connected between
the TIME pin and GND and is given by Equations 2 and 3.
The nominal maximum charge time interval is calculated based on
the assumption that the programmed charge current is always
available during the entire charging cycle. However, due to the PPM
control, the current limit of the input source, or thermal foldback,
the actual charge current maybe reduced during the constant
current charge period. Under such conditions, the Intelligent Timer
control will increase the timeout interval accordingly to allow
approximately the same mAh product as the original timeout
interval at the programmed current. The Intelligent Timer is
suspended when CONT is asserted high.
Thermistor Interface
To ensure a safe charging temperature range, the ISL9230
incorporates a NTC pin to interface with the NTC thermistor in the
battery pack to monitor the battery temperature. A constant current
source is provided at this pin. The temperature range is determined
by the external negative temperature coefficient (NTC) thermistor.
The voltage thresholds and the current source value of the ISL9230
are optimized for the 103AT type industry standard thermister.
The ISL9230 uses a window comparator to set the valid
temperature window. When the NTC pin voltage is out of the
window anytime during charging, indicating either the
temperature is too hot or too cold to charge, the ISL9230 stops
charging. The CHG, however will stay low to indicate a "charging"
condition. When such an invalid temperature condition is
encountered, the safety timer will stop counting. When the
temperature returns to the set range, the charging resumes and
the timer resumes counting from where it stopped.
When the CONT is high, the temperature sensing function can be
disabled by pulling the NTC pin to a voltage level above the VDIS_NTC,
as shown on the “Electrical Specifications” table on page 7.
FN7642.1
July 22, 2011
ISL9230
VIN
Q1
X3
X3 VOUT
Q2
X3 VBAT
TEMPERATURE
MONITORING
IT
ISEN
IR
REF
IREF
CONTROL
+
CA
-
VA
+
-
VREF
IREF
FIGURE 30. CHARGE CURRENT THERMAL FOLDBACK CONTROL
Thermal Foldback
Applications Information
The thermal foldback function starts to reduce the charge current
when the internal temperature reaches a typical value of +125°C.
When thermal foldback is encountered, the charge current will be
reduced to a value where the die temperature stops rising.
Input Bypass Capacitor
Figure 31 shows the thermal foldback concept whereas the
current signals at the summing node of the current error
amplifier CA are shown in Figure 30. IR is the reference. IT is the
temperature tracking current generated from the Temperature
Monitoring block. The IT has no impact on the charge current
until the internal temperature reaches approximately +125°C;
then IT starts to rise. In the meantime, as IT rises, ISEN will fall at
the same rate (as the sum is a constant current IR). As a result,
the charging current, which is proportional to ISEN, also
decreases, keeping the die temperature constant at +125°C.
The system output current, however, is not impacted by the thermal
foldback. Thus, when the charge current is reduced to zero, if the die
temperature still rises, the IC will shut down at ~155°C to prevent
damage to the IC.
The input capacitor is required to suppress the power supply
transient response during transitions. Typically, a 4.7µF capacitor
should be sufficient to suppress the power supply noise.
Due to the inductance of the power leads of the wall adapter or
USB source, the input capacitor value must be properly selected
to prevent high voltage transient during a hot-plug event. Also, for
increase reliability to high dv/dt, a 10µF or more is preferable on
the input.
VOUT and VBAT Capacitor Selection
The criteria for selecting the capacitor at the VOUT and VBAT pins is
to maintain the stability as well as to bypass any transient load
current. The recommended capacitance is a 4.7µF X5R ceramic
capacitor for VOUT and 1µF for VBAT. The actual capacitance
connected to the output is dependent on the actual application
requirement.
Layout Guidance
IR
IT
ISEN
-40mA/°C
The ISL9230 uses a thermally-enhanced QFN package that has
an exposed thermal pad at the bottom side of the package. The
layout should connect as much copper to the pad as possible.
Typically, the component layer is more effective in dissipating
heat. The thermal impedance can be further reduced by using
other layers of copper connecting to the exposed pad through a
thermal via array. Each thermal via is recommended to have
0.3mm diameter and 1mm distance from other thermal vias.
Input Power Sources
+125°C TEMPERATURE
FIGURE 31. THERMAL FOLDBACK CONCEPT
16
The input power source is typically a well-regulated wall cube
with 1m length wire or a USB port. The recommended input
voltage ranges from 4.3V to 6.4V. The ISL9230 can withstand up
to 26V on the input without damaging the IC. If the input voltage
is higher than the OVP threshold, the IC is disabled.
FN7642.1
July 22, 2011
ISL9230
State Diagram
The state diagram is shown in Figure 32. There are 15 states to
cover all the operation modes, including the Power Down, Sleep,
Standby, ILIM, IREF check, VOUT check, Idle, VBAT check, Trickle
Charge, CC/CV charge, Charge Complete, Battery Detect-1,
Battery Detect-2, Battery Detect-3, Fault and Charging and
Suspend states.
The IC flow chart starts by checking the voltage applied at VIN. If
VPOR < VIN < VBAT + VOS, the IC stays in the Sleep state. If VBAT +
VOS < VIN < VOVP, the IC pulls the PG pin low and moves into the
ILIM, IREF check state where the ILIM and IREF pins are being
checked for short circuit condition. If there is no short at either
pin, the regulator FET Q1 will regulate VOUT with 100mA current
limit. Following this, the IC moves to the VOUT check state where
VOUT is checked for short circuit condition. If VOUT is below 0.9V,
indicating a VOUT short condition, the IC will stay at the VOUT
check state. If VOUT is above 0.9V, the IC will set the input current
limit according to the setting on the AC/USB and the MODE pins.
The IC then checks the status of the CHGEN pin.
If the CHGEN is low, the IC moves to the VBAT short circuit check
state where a 5.5mA current is sourced at the VBAT pin and the
voltage is checked against the 1.8V threshold. If VBAT is above
1.8V, the IC moves to the trickle charge state where the trickle
charge timer starts, the charge current is set to ITRK and CHG is
turned on to indicate charging is in progress.
When VBAT reaches the VMIN threshold (3.0V typ), the fast charge
starts where the charge current is set by RIREF or by the IC’s input
current limit, whichever is smaller. When VBAT reaches the VBAT
regulated voltage (4.2V typ), the charger moves to constant
voltage mode where VBAT is regulated at 4.2V. If the charge
current drops to below the EOC threshold, the CHG turns off to
indicate a charge complete condition. The charge current will be
terminated if the CONT pin is at logic low status. Recharge will
occur when VBAT drops below the recharge threshold which is
120mV below the regulated VBAT voltage.
17
There are 3 scenarios for fast charge depending on the output
current. When the sum of the output current and the fast charge
current is smaller than the input current limit, the IC enters the
Fast Charge state with the charge current set by RIREF. When the
sum of the output current and the fast charge current are greater
than the input current limit, the IC will enter the DPPM mode,
where the charging current is reduced to a point such that the
sum of output current and the charging current equals to the
input current limit. If the output current by itself is greater than
the programmed input current limit, the IC enters the battery
supplemental mode, where the battery is discharged to the
system to aid in meeting the output demand.
The output voltage, depending on VBAT, is regulated at either
VBAT + 225mV (when VBAT > 3.2V) or regulated at 3.4V (when
VBAT < 3.2V).
During the constant voltage mode, the output voltage is
regulated at VBAT + 225mV if the DPPM event is not
encountered.
If the timeout limit is reached before reaching the Charge
Complete state, the IC enters the Charger Fault state, where PG
is LO, CHG is blinking once in 0.5S, VOUT is regulated as
described above and the charger is OFF. This state is latched until
the input power is removed and re-applied to start a new cycle.
At any time during the operation, if the die temperature reaches the
OTP threshold, the IC will enter the OTP state, where PG is LO, CHG
remains in previous state, and the charger is OFF. VOUT is
disconnected from VIN and connected to VBAT internally to maintain
system power need. When the die temperature reduces by TSD-HYS,
normal charging operation occurs and the device returns to thermal
regulation.
FN7642.1
July 22, 2011
START
IF VBAT < V MIN
AFTER 25ms
ANY TIME AFTER (A) WHEN
VIN < VPOR_F
ANY STATE (EXCEPT (N)) AFTER
(B) WHEN VIN<VBAT + V OS _F
AFTER 20ms
18
ANY STATE AFTER (C)
WHEN VIN > V OVP
AFTER 50µs
PWR DOWN (A)
/PG = HI-Z
/CHG = HI-Z
Q1=OFF, Q2=ON
YES
VBAT
REACHES
V B_REG AND
IBAT < IEOC?
VIN < V POR ?
NO
SLEEP (B)
/PG = HI-Z
/CHG = HI-Z
Q1=OFF, Q2=ON
YES
VPOR < VIN
& VIN < VBAT + V OS ?
YES
Tj < T SD – T SD_HYS
TURN ON Q1 at
AC/USB, MODE
ENABLE THERMAL
LOOP
SINK IDET (7.5mA)
FOR tDET (250ms)
VIN > V OVP?
CHARGE
COMPLETE (J)
/CHG = HI-Z
Q1 = ON AT
AC/USB, MODE
Q2 = OFF
NO
/PG = L
YES
VBAT < V RCH
FOR tRCH?
SINK IDET (7.5mA)
FOR tDET (250ms)
TURN ON Q1 @
100mA
YES
VBAT > VMIN?
RESET tFAST
NO
NO
ANY STATE AFTER (F) WHEN
/CHGEN = H
ANY STATE AFTER (G)
WHEN
VBAT< V BSC
VBAT CHECK
(G)
/CHG = Hi-Z
Q1 = ON @
AC/USB, MODE
TURN ON IBSC
TRICKLE (H)
/CHG = L
IBAT = ITRK
ENABLE T PRE
TURN OFF Q1
Q2 REMAINS ON
GO TO (O)
Tj < T SD -T SD_HYS
FN7642.1
July 22, 2011
TURN ON Q1 AT
AC/USB, MODE
ENABLE
THERMAL LOOP
(BATTERY SUPPLEMENT MODE STILL
AVAILABLE)
SWITCH V O_REG
TO V B_REG +
225mV (4.425V)
TO START WHEN /CHGEN TOGGLES
ENABLE
ITRK
FOR tDET
/CHGEN = H?
BATTERY DETECTION-2(L)
(BATT REMOVAL
DETECTION)
NO
YES
VBAT > V RCH ?
VBAT < V BSC ?
TURN OFF IBSC
RESET tPRE
ENABLE THERMAL LOOP
SET /CHG = L
YES
NO
YES
NO
GO TO (N) IF tPRE HAS
BEEN ELAPSED
Tj > T SD
YES
FAULT (N)
/CHG FLASHING AT 2Hz
Q1 = ON AT AC/USB,
MODE
Q2 = OFF
YES
VOUT < VOSC1?
Q1 CURRENT
LIMIT SET BY AC/
USB AND MODE
Q2 = OFF
IDLE (F)
Q1 = ON @
AC/USB, MODE
Q2 = OFF
BATTERY DETECTION-1
(K)
(BATT REMOVAL
DETECTION)
VBAT<VMIN?
SWITCH
V O_REG
TO NORMAL
OPERATION
SINK IDET (7.5mA)
FOR tDET (250ms)
NO
VBAT > VMIN?
G
BATTERY DETECTION-3(M)
(BATT REMOVAL
DETECTION)
YES
NO
AFTER 25ms
DISABLE ITRK
DISABLE tPRE
RESET tFAST
FIGURE 32. STATE DIAGRAM (CONT = L)
SWITCH
V O_REG
To NORMAL
OPERATION
ANYTIME WHEN
Tj > T SD
G
CHARGING SUSPENDED (O)
Q1 = OFF, Q2 = ON
/CHG REMAINS PREVIOUS
STATE
HALT tFAST
HALT tPRE
ISL9230
VOUT CHECK (E)
/CHG = HI-Z
Q1 = ON @
100mA
Q2 = ON
NO
YES
ILIM OR IREF
PIN SHORTED?
NO
ANY STATE AFTER (E) WHEN
VOUT < V OSC1
Tj > T SD
TURN OFF Q1
Q2 REMAINS ON
GO TO (O)
AFTER 50µs
ILIM, IREF
CHECK (D)
GO TO (N) IF tFAST ELAPSED
YES
AFTER 25ms
DISABLE IBAT
TURN OFF Q2
DISABLE tFAST
/CHG = Hi-Z
NO
STANDBY (C)
/PG = HI-Z
/CHG = HI-Z
Q1=OFF, Q2=ON
NO
CC/CV CHARGE (I)
/CHG = L
(/CHG = Hi-Z DURING
RECHARGE)
IBAT = IFAST
ENABLE tFAST
ISL9230
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
June 10, 2011
FN7642.1
May 27, 2011
May 12, 2011
CHANGE
-Replaced IBAT with IFAST for fast charge operation discussion.
-Corrected CHG state to remain in previous state when die temp reaches an over-temp condition
-Changed:
Programmed Charge Current . . . . . . . . . . . . . . . . . . . . .200mA to 1500mA
To:
Programmed Fast Charge Current . . . . . . . . . . . . . . . . . 300mA to 1500mA
-Corrected "IVIN" label in Figure 10 to "IOUT" (was a duplicate)
On page 14:
-Corrected some references of IREF to IBAT and IMIN to IEOC
-Corrected some references of VOUT to VBAT
On page 15:
-In Equations 5 and 6, changed "ICHG" to "IFAST"
FN7642.0
Initial Release
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page
on intersil.com: ISL9230
To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff
FITs are available from our website at: http://rel.intersil.com/reports/sear
For additional products, see www.intersil.com/product_tree
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
19
FN7642.1
July 22, 2011
ISL9230
Package Outline Drawing
L16.3x3E
16 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 0, 3/11
4X 1.50
3.00
A
12X 0.50
B
13
6
PIN 1
INDEX AREA
16
6
PIN #1
INDEX AREA
1
3.00
12
1.70 +0.10
- 0.15
9
(4X)
4
0.15
8
0.10 M C A B
5
16X 0.40±0.10
TOP VIEW
4 16X 0.25 +0.07
- 0.05
BOTTOM VIEW
SEE DETAIL “X”
C
0.10 C
0.90 ±0.10
0 . 2 REF
5
C
0 . 02 NOM.
0 . 05 MAX.
0.08 C
SIDE VIEW
DETAIL "X"
NOTES:
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
4.
Dimension applies to the metallized terminal and is measured
(12X 0.50)
(2.80 TYP) ( 1.70)
(16X 0.25)
between 0.15mm and 0.30mm from the terminal tip.
(16X 0.60)
TYPICAL RECOMMENDED LAND PATTERN
20
5.
Tiebar shown (if present) is a non-functional feature.
6.
The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
FN7642.1
July 22, 2011