Fairchild FAN73832MX Half-bridge gate-drive ic Datasheet

FAN73832
Half-Bridge Gate-Drive IC
Features
Description
„ Floating Channel for Bootstrap Operation to +600V
The FAN73832 is a half-bridge, gate-drive IC with shutdown and programmable dead-time control functions for
driving MOSFETs and IGBTs, operating up to +600V.
„ Typically 350mA/650mA Sourcing/Sinking Current
Driving Capability for Both Channels
„ Extended Allowable Negative VS Swing to -9.8V for
„
„
„
„
„
Signal Propagation at VDD=VBS=15V
High-Side Output in Phase of IN Signal
Built-in UVLO Functions for Both Channels
Built-in Common-Mode dv/dt Noise Canceling Circuit
Internal 400ns Minimum Dead-Time at RDT=20KΩ
Programmable Turn-on Delay-Time Control
(Dead-Time)
Applications
Fairchild’s high-voltage process and common-mode
noise canceling technique provide stable operation of
high-side driver under high dv/dt noise circumstances.
An advanced level-shift circuit allows high-side gate
driver operation up to VS=-9.8V (typical) for VBS=15V.
The UVLO circuits for both channels prevent malfunction
when VDD and VBS are lower than the specified threshold voltage.
Output drivers typically source/sink 350mA/650mA,
respectively, which is suitable for all kinds of half- and
full-bridge inverters.
„ SMPS
„ Motor Drive Inverter
„ Fluorescent Lamp Ballast
„ HID Ballast
8-SOP
8-DIP
Ordering Information
Part Number
FAN73832M(1)
FAN73832MX(1)
FAN73832N
Package
8-SOP
Pb-Free
Operating Temperature Range Packing Method
Tube
Yes
8-DIP
-40°C ~ 125°C
Tape & Reel
Tube
Note:
1. These devices passed wave soldering test by JESD22A-111.
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
FAN73832 Half-Bridge Gate-Drive IC
February 2007
FAN73832 Half-Bridge Gate-Drive IC
Typical Application Diagrams
RBOOT
VDC
DBOOT
VDD
FAN73832
1 IN
PWM
2 GND
VB
8
HO
7
VS
6
LO
5
CBOOT
3
PWM IC
Control
Shutdown
DT/ SD
4 VDD
RDT
FAN73832 Rev.01
Figure 1. Application Circuit for Half-Bridge Switching Power Supply
VDC
VCC
VDD
VB
VDD
HO
PHA
VB
HO
IN
VS
VS
PHB
Forward
IN
FAN73832
SD
M
FAN73832
Reverse
DC Motor
Controller
LO
DT/ SD
LO
DT/ SD
GND
GND
FAN73832 Rev.01
Figure 2. Application Circuit for Full-Bridge DC Motor Driver
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
2
8
VB
7
HO
6
VS
4
VDD
5
LO
2
GND
UVLO
S
Q
HS(ON/ OFF)
1
3
R
SCHMITT
TRIGGER INPUT
RDTINT
DEAD - TIME
CONTROL
UVLO
LS(ON/ OFF)
DELAY
DRIVER
DT/SD
R
DRIVER
PULSE
GEN ERATOR
IN
NOISE
CANCELLER
FAN73832 Rev:00
Figure 3. Functional Block Diagram of FAN73832
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
3
FAN73832 Half-Bridge Gate-Drive IC
Internal Block Diagram
FAN73832 Half-Bridge Gate-Drive IC
Pin Assignments
1
GND
2
DT/SD
3
VDD
4
FAN73832
IN
8
VB
7
HO
6
VS
5
LO
FAN73832 Rev:00
Figure 4. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
1
IN
Description
2
GND
3
DT/SD
4
VDD
Low-Side Supply Voltage
5
LO
Low-Side Driver Output
6
VS
High-Side Floating Supply Return
7
HO
High-Side Driver Output
8
VB
High-Side Floating Supply
Logic Input
Ground
Dead-Time Control with External Resistor and Shutdown Function
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
4
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified.
Symbol
Parameter
VS
High-side offset voltage
VB
High-side floating supply voltage
Min.
Max.
Unit
VB-25
VB+0.3
V
-0.3
625
V
VS-0.3
VB+0.3
V
VHO
High-side floating output voltage HO
VDD
Low-side and logic-fixed supply voltage
-0.3
25
V
VLO
Low-side output voltage LO
-0.3
VDD+0.3
V
VIN
Logic input voltage (IN)
-0.3
VDD+0.3
V
Dead-time and shutdown control voltage
-0.3
5.0
V
VDD-25
VDD+0.3
V
50
V/ns
8-SOP
0.625
W
8-DIP
1.25
VDT/SD
GND
dVS/dt
PD(2)(3)(4)
Logic ground
Allowable offset voltage slew rate
Power dissipation
8-SOP
200
8-DIP
100
°C/W
θJA
Thermal resistance, junction-to-ambient
TJ
Junction temperature
150
°C
TSTG
Storage temperature
150
°C
Notes:
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
3. Refer to the following standards:
JESD51-2: Integral circuits thermal test method environmental conditions - Natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
4. Do not exceed PD under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Condition
Min.
Max.
Unit
VB
High-side floating supply voltage
VS+15
VS+20
V
VS
High-side floating supply offset voltage
6-VDD
600
V
VDD
Low-side supply voltage
15
20
V
VHO
High-side (HO) output voltage
VS
VB
V
VLO
Low-side (LO) output voltage
GND
VDD
V
VIN
Logic input voltage (IN)
GND
VDD
V
TA
Ambient temperature
-40
125
°C
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
5
FAN73832 Half-Bridge Gate-Drive IC
Absolute Maximum Ratings
VBIAS (VDD, VBS)=15.0V, RDT=20KΩ,TA=25°C, unless otherwise specified. The VIN and IIN parameters are referenced
to GND. The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO
and LO.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Unit
SUPPLY CURRENT SECTION
IQBS
Quiescent VBS supply current
VIN=0V or 5V
35
90
IQDD
Quiescent VDD supply current
VIN=0V or 5V, RDT=20KΩ
300
450
ISD(5)
Shutdown supply current
DT/SD=GND
650
900
IPBS
Operating VBS supply current
fIN=20kHz, rms value
400
700
IPDD
Operating VDD supply current
fIN=20kHz, rms value
650
850
ILK
Offset supply leakage current
VB=VS=600V
µA
10
POWER SUPPLY SECTION
VDDUV+
VBSUV+
VDD and VBS supply under-voltage
positive going threshold
10.7
11.6
12.5
V
VDDUVVBSUV-
VDD and VBS supply under-voltage
negative going threshold
10.0
10.8
11.6
V
VDDUVH
VBSUVH
VDD supply under-voltage lockout
hysteresis
0.8
V
20
KΩ
3.0
V
DEAD-TIME CONTROL SECTION
RDTINT
VDT
Internal dead-time setting resistance
Normal voltage at DT
RDT=20KΩ
GATE DRIVER OUTPUT SECTION
VOH
High-level output voltage, VBIAS-VO
IO=20mA
1.0
VOL
Low-level output voltage, VO
IO+
Output high short-circuit pulse current
VO=0V, VIN=5V with PW<10µs
250
350
mA
IO-
Output low short-circuit pulsed current
VO=15V, VIN=0V with PW<10µs
500
650
mA
VS
Allowable negative VS pin voltage for
IN signal propagation to HO
0.6
-9.8
-7.0
V
V
V
LOGIC INPUT SECTION (INPUT and SHUTDOWN)
VIH
Logic "1" input voltage
VIL
Logic "0" input voltage
IIN+
Logic "1" input bias current
VIN=5V
VIN=0V
IIN-
Logic "0" input bias current
SD+
Shutdown "1" input voltage
SD-
Shutdown "0" input voltage
RPD
Input pull-down resistance
2.9
V
50
2.9
1.2
V
100
µA
2.0
µA
1.2
V
V
100
KΩ
Note:
5. This parameter guaranteed by design.
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
6
FAN73832 Half-Bridge Gate-Drive IC
Electrical Characteristics
VBIAS (VDD, VBS)=15.0V, VS=GND, CL=1000pF, RDT=20KΩ and TA = 25°C, unless otherwise specified.
Symbol
tON
tOFF
Parameter
Turn-on propagation delay
Conditions
Min.
VS=0V, RDT=20KΩ
600V(5),
Max.
580
730
Turn-off propagation delay
VS=0V or
180
230
tR
Turn-on rise time
CL=1000pF
50
100
tF
Turn-off fall time
CL=1000pF
30
80
100
180
tSD(5)
DT1, DT2
DMT
RDT=20KΩ
Typ.
Shutdown propagation delay
Dead-time LO OFF to HO ON & HO
OFF to LO ON
Dead-time matching
Unit
ns
RDT =20KΩ
300
400
500
ns
RDT = 200KΩ
1.20
1.68
2.30
µs
RDT = 20KΩ
0
60
RDT =200KΩ
0
150
ns
Note:
5. These parameters guaranteed by design.
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
7
FAN73832 Half-Bridge Gate-Drive IC
Dynamic Electrical Characteristics
11.6
12.0
11.4
VDDUV- ,VBSUV- [V]
VDDUV+ ,VBSUV+ [V]
11.8
11.6
11.4
11.2
11.0
10.8
10.6
10.4
11.0
10.2
10.8
-40
11.2
-20
0
20
40
60
80
100
10.0
-40
120
-20
0
Temperature [°C]
500
100
400
80
300
40
100
20
0
20
40
60
60
80
100
120
60
200
-20
40
Figure 6. VDD/VBS UVLO (-) vs. Temperature
IQBS [μA]
IQDD [μA]
Figure 5. VDD/VBS UVLO (+) vs. Temperature
0
-40
20
Temperature [°C]
80
100
0
-40
120
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 7. VDD Quiescent Current vs. Temperature
Figure 8. VBS Quiescent Current vs. Temperature
1000
800
800
IPBS [μA]
IPDD [μA]
600
600
400
400
200
200
0
-40
-20
0
20
40
60
80
100
0
-40
120
Temperature [°C]
0
20
40
60
80
100
120
Temperature [°C]
Figure 9. VDD Operating Current vs. Temperature
Figure 10. VBS Operating Current vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
-20
www.fairchildsemi.com
8
FAN73832 Half-Bridge Gate-Drive IC
Typical Characteristics
100
3.0
2.5
2.0
VIH [V]
IIN+ [μA]
80
60
1.5
40
1.0
20
0
-40
0.5
-20
0
20
40
60
80
100
0.0
-40
120
-20
0
Temperature [°C]
Figure 11. Logic Input Current vs. Temperature
2.5
2.5
SD+ BAR [V]
3.0
VIL [V]
2.0
1.5
0.5
0.5
20
40
60
80
100
120
1.5
1.0
0
60
2.0
1.0
-20
40
Figure 12. Logic Input High Voltage vs. Temperature
3.0
0.0
-40
20
Temperature [°C]
80
100
0.0
-40
120
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
Figure 13. Logic Input Low Voltage vs. Temperature
Figure 14. SD Positive Threshold vs. Temperature
3.0
800
2.5
tON [nsec]
SD- BAR [V]
600
2.0
1.5
400
1.0
200
0.5
0.0
-40
-20
0
20
40
60
80
100
0
-40
120
Temperature [°C]
0
20
40
60
80
100
120
Temperature [°C]
Figure 15. SD Negative Threshold vs. Temperature
Figure 16. Turn-on Delay Time vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
-20
www.fairchildsemi.com
9
FAN73832 Half-Bridge Gate-Drive IC
Typical Characteristics (Continued)
500
300
DT1, RDT= 20kΩ [nsec]
tOFF [nsec]
250
200
150
100
450
400
350
50
0
-40
-20
0
20
40
60
80
100
300
-40
120
-20
0
Figure 17. Turn-off Delay Time vs. Temperature
60
80
100
120
2.0
2.2
1.6
Deadtime [μS]
DT1, RDT= 200kΩ [nsec]
40
Figure 18. Dead--Time (RDT=20kΩ) vs. Temperature
2.4
2.0
1.8
1.6
1.2
0.8
0.4
1.4
1.2
-40
20
Temperature [°C]
Temperature [°C]
-20
0
20
40
60
80
100
0.0
20
120
40
60
80
100
120
140
160
180
200
RDT [kohm]
Temperature [°C]
Figure 19. Dead Time (RDT=200kΩ) vs. Temperature
Figure 20. RDT vs. Dead-Time
-6
VS [V]
-8
-10
-12
-14
-40
-20
0
20
40
60
80
100
120
Temperature [°C]
Figure 21. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Temperature
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
10
FAN73832 Half-Bridge Gate-Drive IC
Typical Characteristics (Continued)
+15V
10μF
100nF
10μF 100nF
1 IN
2
GND
VB
8
HO
7
+15V
HO
1nF
Control
SD
20K
3 DT/SD
VS
6
VDD
LO
5
4
LO
FAN73832
1nF
FAN73832 Rev:00
Figure 22. Switching Time Test Circuit
IN
HO
LO
DT/SD
DT1
Shutdown
DT2
DT2
Shutdown
DT1
DT1
FAN73832 Rev.00
Figure 23. Input / Output Waveforms
IN
50%
50%
tOFF
90%
tON
LO
10%
90%
HO
tON
tOFF
10%
FAN73832 Rev.00
Figure 24. Switching Time Waveform Definitions
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
11
FAN73832 Half-Bridge Gate-Drive IC
Switching Time Definitions
FAN73832 Half-Bridge Gate-Drive IC
50%
DT/SD
90%
HO or LO
tSD
FAN73832 Rev.00
Figure 25. Shutdown Waveform Definition
90%
HO
10%
DT2
DT1
90%
LO
MDT= |DT1 - DT2|
10%
FAN73832 Rev.00
Figure 26. Dead-Time Control Waveform Definition
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
12
1. Normal Operating Consideration
3. Layout Consideration
The FAN73832 is a single PWM input, half-bridge, gatedrive IC with programmable dead-time and shutdown
functions.
For optimum performance of the high- and low-side gate
drivers, considerations must be taken during printed
circuit board (PCB) layout.
The dead-time is set with a resistor (RDT) at the DT/SD
pin. The wide dead-time programming range provides
the flexibility to optimize drive signal timing for a
selection of switching devices (MOSFET or IGBT) and
applications.
3.1 Supply Capacitors
If the output stages are able to quickly turn-on a
switching device with a high value of current, the supply
capacitors must be placed as close as possible to the
device pins (VDD and GND for the ground-tied supply, VB
and VS for the floating supply) to minimize parasitic
inductance and resistance.
The turn-on time delay circuitry (Dead-Time)
accommodates resistor values from 20kΩ to 200kΩ with
a dead-time proportional to the RDT resistance.
3.2 Gate Drive Loop
If the DT/SD pin voltage decreases below 1.2V in the
normal operation, the IC enters shutdown mode.
Current loops behave like an antenna, able to receive
and transmit noise. To reduce the noise coupling/emission and improve the power switch turn-on and off performances, gate drive loops must be reduced as much
as possible.
The external dead-time setting resistor (RDT) is at least
above 20KΩ for normal operation in typical applications.
2. Under-Voltage Lockout (UVLO)
3.3 Ground Plane
The FAN73832 has an under-voltage lockout (UVLO)
protection circuit for high- and low-side channels to
prevent malfunction when VDD and VBS are lower than
the specified threshold voltage. The UVLO circuitry
monitors the supply voltage (VDD) and bootstrap
capacitor voltage (VBS) antepenult.
Ground plane must not be placed under or nearby the
high-voltage floating side to minimize noise coupling.
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
13
FAN73832 Half-Bridge Gate-Drive IC
Typical Application Information
8-SOP
Dimensions are in millimeters (inches) unless otherwise noted..
MIN
0.1~0.25
0.004~0.001
#5
6.00 ±0.30
0.236 ±0.012
8°
0~
+0.10
0.15 -0.05
+0.004
0.006 -0.002
MAX0.10
MAX0.004
1.80
MAX
0.071
3.95 ±0.20
0.156 ±0.008
5.72
0.225
0.41 ±0.10
0.016 ±0.004
#4
1.27
0.050
#8
5.13
MAX
0.202
#1
4.92 ±0.20
0.194 ±0.008
(
0.56
)
0.022
1.55 ±0.20
0.061 ±0.008
0.50 ±0.20
0.020 ±0.008
January 2001, Rev. A
8sop225_dim.pdf
Figure 27. 8-Lead Small Outline Package (SOP)
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
14
FAN73832 Half-Bridge Gate-Drive IC
Mechanical Dimensions
FAN73832 Half-Bridge Gate-Drive IC
Mechanical Dimensions (Continued)
8-DIP
#4
#5
1.524 ±0.10
0.060 ±0.004
0.46 ±0.10
#8
2.54
0.100
9.60
MAX
0.378
#1
9.20 ±0.20
0.362 ±0.008
(
6.40 ±0.20
0.252 ±0.008
0.018 ±0.004
0.79
)
0.031
Dimensions are in millimeters (inches) unless otherwise noted..
7.62
0.300
3.30 ±0.30
0.130 ±0.012
5.08
MAX
0.200
3.40 ±0.20
0.134 ±0.008
0.33
0.013 MIN
+0.10
0.25 –0.05
+0.004
0~15°
0.010 –0.002
September 1999, Rev B
pdip8_dim.pdf
Figure 28. 8-Lead Dual In-Line Package (DIP)
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
15
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I23
© 2006 Fairchild Semiconductor Corporation
FAN73832 Rev. 1.0.2
www.fairchildsemi.com
16
FAN73832 Half-Bridge Gate-Drive IC
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