Burr-Brown OPA365 2.2v, 50mhz, low-noise, single-supply rail-to-rail operational amplifier Datasheet

OPA365
OPA2365
SBOS365A − JUNE 2006 − REVISED JULY 2006
2.2V, 50MHz, Low-Noise,
Single-Supply Rail-to-Rail
OPERATIONAL AMPLIFIERS
FEATURES
DESCRIPTION
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The OPAx365 zer∅-crossover series rail-to-rail highperformance CMOS operational amplifiers are optimized for very low voltage, single-supply applications.
Rail-to-rail input/output, low-noise (4.5nV/√Hz) and
high-speed operations (50MHz Gain Bandwidth) make
them ideal for driving sampling analog-to-digital converters (ADCs). Applications incude audio, signal conditioning, and sensor amplification. The OPA365 family
of op amps are well-suited for cell phone power amplifier control loops.
RAIL-TO-RAIL INPUT WITHOUT CROSSOVER
2.2V OPERATION
LOW OFFSET: 200µV
WIDE BANDWIDTH: 50MHz
CMRR: 100dB (min)
HIGH SLEW RATE: 25V/µs
LOW NOISE: 4.5nV//Hz
LOW THD+NOISE: 0.0006%
QUIESCENT CURRENT: 5mA (max)
microPACKAGE: SOT23-5
Special features include excellent common-mode rejection ratio (CMRR), no input stage crossover distortion, high input impedance and rail-to-rail input and output swing. The input common-mode range includes
both the negative and positive supplies. The output voltage swing is within 10mV of the rails.
APPLICATIONS
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SIGNAL CONDITIONING
DATA ACQUISITION
The OPA365 (single version) is available in the microSIZE SOT23-5 and SO-8 packages. The OPA2365
(dual version) is offered in the microSIZE DFN-8 (3mm
x 3mm) and SO-8 packages. All versions are specified
for operation from −40°C to +125°C. Single and dual
versions have identical specifications for maximum design flexibility.
PROCESS CONTROL
ACTIVE FILTERS
TEST EQUIPMENT
AUDIO
WIDEBAND AMPLIFIERS
OPA365 vs COMPETITION
0
+5V
−20
THD+Noise Ratio (dB)
f i = 10kHz
BW = 30kHz
PACKAGE
OPA365
SOT23-5
n
SO-8(1)
n
n
n
DFN-8(1)
−40
OPA2365
(1) Available Q3, 2006.
VIN
−60
Competitor B
−80
Competitor A
−100
OPA365
−120
1
2
3
4
5
VIN = VOUT (VPP)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright  2006, Texas Instruments Incorporated
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SBOS365A − JUNE 2006 − REVISED JULY 2006
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5V
Signal Input Terminals, Voltage(2) . . . . (V−) −0.5V to (V+) + 0.5V
Signal Input Terminals, Current(2) . . . . . . . . . . . . . . . . . . . . ±10mA
Output Short-Circuit(3) . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Operating Temperature . . . . . . . . . . . . . . . . . . . . . −40°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4000V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000V
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not supported.
(2) Input terminals are diode-clamped to the power-supply rails.
Input signals that can swing more than 0.5V beyond the supply
rails should be current limited to 10mA or less.
(3) Short-circuit to ground, one amplifier per package.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PRODUCT
PACKAGE-LEAD
PACKAGE DESIGNATOR
SOT23-5
DBV
OAVQ
SO-8(2)
D
O365A
SO-8(2)
D
O2365A
DFN-8(2)
DRB
OPA365
OPA2365
PACKAGE MARKING
BRA
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
(2) Available Q3, 2006.
PIN CONFIGURATIONS
Top View
OPA365
OPA365
VOUT
V−
+IN
1
5
V+
NC(1)
−IN
2
3
4
−IN
+IN
V−
1
2
3
4
OPA2365
8
NC(1)
VOUTA
1
8
V+
7
V+
−IN A
2
7
VOUTB
6
VOUT
+IN A
3
6
−IN B
5
NC(1)
V−
4
5
+IN B
SOT23−5
SO−8
(1) NC denotes no internal connection.
2
SO−8, DFN−8
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ELECTRICAL CHARACTERISTICS: VS = +2.2V to +5.5V
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2, unless otherwise noted.
OPAx365
PARAMETER
OFFSET VOLTAGE
Input Offset Voltage
VOS
Drift
dVOS/dT
vs Power Supply
PSRR
Channel Separation, dc
INPUT BIAS CURRENT
Input Bias Current
IB
over Temperature
Input Offset Current
IOS
NOISE
Input Voltage Noise, f = 0.1Hz to 10Hz
en
Input Voltage Noise Density, f = 100kHz
en
Input Current Noise Density, f = 10kHz
in
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
VCM
Common-Mode Rejection Ratio
CMRR
INPUT CAPACITANCE
Differential
Common-Mode
OPEN-LOOP GAIN
Open-Loop Voltage Gain
AOL
FREQUENCY RESPONSE
Gain-Bandwidth Product
Slew Rate
Settling Time, 0.1%
0.01%
Overload Recovery Time
Total Harmonic Distortion + Noise
OUTPUT
Voltage Output Swing from Rail
over Temperature
Short-Circuit Current
Capacitive Load Drive
Open-Loop Output Impedance
POWER SUPPLY
Specified Voltage Range
Quiescent Current Per Amplifier
over Temperature
TEMPERATURE RANGE
Specified Range
Thermal Resistance
SOT23-5
SO-8
DFN-8
GBW
SR
tS
THD+N
TEST CONDITIONS
VS = +2.2V to +5.5V
TYP
MAX
UNIT
100
1
10
0.2
200
µV
µV/°C
µV/V
µV/V
100
±0.2
±10
See Typical Characteristics
±0.2
±10
(V−) − 0.1V 3 VCM 3 (V+) + 0.1V
RL = 10kΩ, 100mV < VO < (V+) − 100mV
RL = 600Ω, 200mV < VO < (V+) − 200mV
RL = 600Ω, 200mV < VO < (V+) − 200mV
VS = 5V
(V−) − 0.1
100
100
100
94
G = +1
4V Step, G = +1
4V Step, G = +1
VIN x Gain > VS
RL = 600Ω, VO = 4VPP, G = +1, f = 1kHz
RL = 10kΩ, VS = 5.5V
f = 1MHz, IO = 0
pA
120
(V+) + 0.1
V
dB
6
2
pF
pF
120
120
dB
dB
dB
50
25
200
300
< 0.1
0.0006
MHz
V/µs
ns
ns
µs
%
10
20
±65
See Typical Characteristics
30
2.2
IO = 0
pA
µVPP
nV/√Hz
fA/√Hz
5
4.5
4
ISC
CL
VS
IQ
MIN
4.6
−40
qJA
200
150
46
mV
mA
Ω
5.5
5
5
V
mA
mA
+125
°C
°C/W
°C/W
°C/W
°C/W
3
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SBOS365A − JUNE 2006 − REVISED JULY 2006
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted.
POWER SUPPLY AND COMMON−MODE
REJECTION RATIO vs FREQUENCY
OPEN−LOOP GAIN/PHASE vs FREQUENCY
140
0
140
CMRR
−45
100
Phase
80
−90
60
40
Gain
20
−135
PSRR, CMRR (dB)
120
Phase (_ )
Voltage Gain (dB)
120
100
80
PSRR
60
40
20
0
−180
100M
−20
10
100
1k
10k
100k
1M
10M
0
10
100
1k
10k
100k
1M
Frequency (Hz)
Frequency (Hz)
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
100M
VS = 5.5V
−200
−180
−160
−140
−120
−100
−80
−60
−40
−20
0
20
40
60
80
100
120
140
160
180
200
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
Population
Population
VS = 5.5V
10M
Offset Voltage (µV)
Offset Voltage Drift (µV/_C)
INPUT BIAS CURRENT vs TEMPERATURE
INPUT BIAS CURRENT vs COMMON−MODE VOLTAGE
500
1000
900
400
700
300
600
IB (pA)
Input Bias (pA)
800
500
400
VCM Specified Range
300
100
200
100
0
−50
−25
0
25
50
Temperature (_C)
4
200
75
100
125
0
−25
−0.5 0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VCM (V)
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted.
OUTPUT VOLTAGE vs OUTPUT CURRENT
3
Short−Circuit Current (mA)
VS = ±1.1V
VS = ±2.75V
2
Output Voltage (V)
SHORT−CIRCUIT CURRENT vs TEMPERATURE
1
−40_C
0
+25_ C
+125_ C
+25_ C
−40_C
+125_ C
−1
−2
−3
0
10
20
30
40
50
60
70
80
90
70
60
50
40
30
20
10
0
−10
−20
−30
−40
−50
−60
−70
−80
100
ISC+
I SC−
−50
−25
0
50
75
100
125
Temperature (_ C)
Output Current (mA)
QUIESCENT CURRENT vs TEMPERATURE
QUIESCENT CURRENT vs SUPPLY VOLTAGE
4.80
Quiescent Current (mA)
4.75
4.50
4.25
4.00
4.74
4.68
4.62
4.56
4.50
3.75
2.2 2.5
3.0
3.5
4.0
4.5
5.0
−50
5.5
−25
0
25
50
75
100
125
Temperature (_ C)
Supply Voltage (V)
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
0.1Hz to 10Hz
INPUT VOLTAGE NOISE
0.01
THD+N (%)
G = 10, RL = 600Ω
2µV/div
Quiescent Current (mA)
25
VO = 1VRMS
0.001
VO = 1.448VRMS
VO = 1VRMS
G = +1, RL = 600Ω
0.0001
1s/div
10
100
1k
10k 100k
Frequency (Hz)
5
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = +5V, and CL = 0pF, unless otherwise noted.
OVERSHOOT vs CAPACITIVE LOAD
INPUT VOLTAGE NOISE SPECTRAL DENSITY
1k
60
100
Overshoot (%)
Voltage Noise (nV/√Hz)
50
10
G = +1
40
G = −1
30
G = +10
20
10
G = −10
1
0
10
100
1k
10k
0
100k
100
Capacitive Load (pF)
Frequency (Hz)
Output Voltage (1V/div)
G=1
RL = 10kΩ
VS = ±2.5
G=1
RL = 10kΩ
VS = ±2.5
Time (50ns/div)
Time (250ns/div)
SMALL−SIGNAL STEP RESPONSE
LARGE−SIGNAL STEP RESPONSE
G=1
RL = 600Ω
VS = ±2.5
Time (50ns/div)
6
LARGE−SIGNAL STEP RESPONSE
Output Voltage (1V/div)
Output Voltage (50mV/div)
Output Voltage (50mV/div)
SMALL−SIGNAL STEP RESPONSE
G=1
RL = 600Ω
VS = ±2.5
Time (250ns/div)
1k
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APPLICATIONS INFORMATION
R2
10kΩ
OPERATING CHARACTERISTICS
The OPA365 amplifier parameters are fully specified
from +2.2V to +5.5V. Many of the specifications apply
from −40°C to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or
temperature are presented in the Typical Characteristics.
+1.5V
R1
1kΩ
V+
OPA365
GENERAL LAYOUT GUIDELINES
The OPA365 is a wideband amplifier. To realize the full
operational performance of the device, good high-frequency printed circuit board (PCB) layout practices are
required. Low-loss, 0.1µF bypass capacitors must be
connected between each supply pin and ground as
close to the device as possible. The bypass capacitor
traces should be designed for minimum inductance.
C1
100nF
VIN
V−
C2
100nF
−1.5V
a) Dual Supply Connection
BASIC AMPLIFIER CONFIGURATIONS
As with other single-supply op amps, the OPA365 may
be operated with either a single supply or dual supplies.
A typical dual-supply connection is shown in Figure 1,
which is accompanied by a single-supply connection.
The OPA365 is configured as a basic inverting amplifier
with a gain of −10V/V. The dual-supply connection has
an output voltage centered on zero, while the single−
supply connection has an output centered on the common-mode voltage VCM. For the circuit shown, this voltage is 1.5V, but may be any value within the commonmode input voltage range. The OPA365 VCM range
extends 100mV beyond the power-supply rails.
VOUT
R2
10kΩ
+3V
R1
1kΩ
C1
100nF
V+
OPA365
VIN
VOUT
V−
VCM = 1.5V
b) Single−Supply Connection
Figure 1. Basic Circuit Connections
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Figure 2 shows a single-supply, electret microphone
application where VCM is provided by a resistive divider.
The divider also provides the bias voltage for the electret element.
49kΩ
Clean 3.3V Supply
3.3V
4kΩ
INPUT AND ESD PROTECTION
The OPA365 incorporates internal electrostatic discharge (ESD) protection circuits on all pins. In the case
of input and output pins, this protection primarily consists of current steering diodes connected between the
input and power-supply pins. These ESD protection
diodes also provide in-circuit, input overdrive protection, provided that the current is limited to 10mA as
stated in the Absolute Maximum Ratings. Figure 3
shows how a series input resistor may be added to the
driven input to limit the input current. The added resistor
contributes thermal noise at the amplifier input and its
value should be kept to the minimum in noise-sensitive
applications.
VOUT
OPA365
Electret
Microphone
6kΩ
5kΩ
1µF
Figure 2. Microphone Preamplifier
V+
RAIL−TO−RAIL INPUT
I OVERLOAD
10mA max
The OPA365 product family features true rail-to-rail input operation, with supply voltages as low as ±1.1V
(2.2V). A unique zer∅-crossover input topology eliminates the input offset transition region typical of many
rail-to-rail, complementary stage operational amplifiers.
This topology also allows the OPA365 to provide superior common−mode performance over the entire input
range, which extends 100mV beyond both power-supply rails; see Figure 4. When driving ADCs, the highly
linear VCM range of the OPA365 assures that the op
amp/ADC system linearity performance is not compromised.
VOUT
OPA365
VIN
5kΩ
Figure 3. Input Current Protection
OFFSET VOLTAGE vs COMMON−MODE VOLTAGE
200
VS = ±2.75V
150
100
VOS (µV)
OPA365
50
0
−50
−100
Competitors
−150
−200
−3
−2
−1
0
1
2
Common−Mode Voltage (V)
Figure 4. OPA365 has Linear Offset Over the
Entire Common-Mode Range
8
3
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A simplified schematic illustrating the rail-to-rail input
circuitry is shown in Figure 5.
VS
Regulated
Charge Pump
VO U T = VC C +1.8V
CAPACITIVE LOADS
The OPA365 may be used in applications where driving
a capacitive load is required. As with all op amps, there
may be specific instances where the OPA365 can become unstable, leading to oscillation. The particular op
amp circuit configuration, layout, gain and output loading are some of the factors to consider when establishing whether an amplifier will be stable in operation. An
op amp in the unity-gain (+1V/V) buffer configuration
and driving a capacitive load exhibits a greater tendency to be unstable than an amplifier operated at a higher
noise gain. The capacitive load, in conjunction with the
op amp output resistance, creates a pole within the
feedback loop that degrades the phase margin. The
degradation of the phase margin increases as the capacitive loading increases.
VC C + 1.8V
Patent Pending
Very Low Ripple
Topology
IB IAS
IB IA S
IBI A S
VIN −
VO U T
VI N +
When operating in the unity-gain configuration, the
OPA365 remains stable with a pure capacitive load up
to approximately 1nF. The equivalent series resistance
(ESR) of some very large capacitors (CL > 1µF) is sufficient to alter the phase characteristics in the feedback
loop such that the amplifier remains stable. Increasing
the amplifier closed-loop gain allows the amplifier to
drive increasingly larger capacitance. This increased
capability is evident when observing the overshoot response of the amplifier at higher voltage gains. See the
typical characteristic graph, Small-Signal Overshoot
vs. Capacitive Load.
One technique for increasing the capacitive load drive
capability of the amplifier operating in unity gain is to insert a small resistor, typically 10Ω to 20Ω, in series with
the output; see Figure 6. This resistor significantly reduces the overshoot and ringing associated with large
capacitive loads. A possible problem with this technique
is that a voltage divider is created with the added series
resistor and any resistor connected in parallel with the
capacitive load. The voltage divider introduces a gain
error at the output that reduces the output swing. The
error contributed by the voltage divider may be insignificant. For instance, with a load resistance, RL = 10kΩ,
and RS = 20Ω, the gain error is only about 0.2%. However, when RL is decreased to 600Ω, which the OPA365
is able to drive, the error increases to 7.5%.
IB IA S
Figure 5. Simplified Schematic
V+
RS
VOUT
OPA365
VIN
10Ω to
20Ω
RL
CL
Figure 6. Improving Capacitive Load Drive
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ACHIEVING AN OUTPUT LEVEL OF
ZERO VOLTS (0V)
V+ = +5V
Certain single-supply applications require the op amp
output to swing from 0V to a positive full-scale voltage
and have high accuracy. An example is an op amp
employed to drive a single-supply ADC having an input
range from 0V to +5V. Rail-to-rail output amplifiers with
very light output loading may achieve an output level
within millivolts of 0V (or +VS at the high end), but not
0V. Furthermore, the deviation from 0V only becomes
greater as the load current required increases. This increased deviation is a result of limitations of the CMOS
output stage.
OPA365
500µA
Note that this technique does not work with all op amps
and should only be applied to op amps such as the
OPA365 that have been specifically designed to operate in this manner. Also, operating the OPA365 output
at 0V changes the output stage operating conditions,
resulting in somewhat lower open-loop gain and bandwidth. Keep these precautions in mind when driving a
capacitive load because these conditions can affect circuit transient response and stability.
ACTIVE FILTERING
The OPA365 is well-suited for active filter applications
requiring a wide bandwidth, fast slew rate, low-noise,
single-supply operational amplifier. Figure 8 shows a
500kHz, 2nd-order, low-pass filter utilizing the multiple−
feedback (MFB) topology. The components have been
selected to provide a maximally-flat Butterworth
response. Beyond the cutoff frequency, roll-off is
−40dB/dec. The Butterworth response is ideal for applications requiring predictable gain characteristics
such as the anti-aliasing filter used ahead of an ADC.
10
RP = 10kΩ
Op Amps
Negative
Supply
Grounded
When a pull-down resistor is connected from the amplifier output to a negative voltage source, the OPA365
can achieve an output level of 0V, and even a few millivolts below 0V. Below this limit, nonlinearity and limiting
conditions become evident. Figure 7 illustrates a circuit
using this technique.
A pull-down current of approximately 500µA is required
when OPA365 is connected as a unity-gain buffer.
A practical termination voltage (VNEG) is −5V, but
other convenient negative voltages also may be
used. The pull-down resistor RL is calculated from
RL = [(VO −VNEG)/(500µA)]. Using a minimum output
voltage (VO) of 0V, RL = [0V−(−5V)]/(500µA)] = 10kΩ.
Keep in mind that lower termination voltages result in
smaller pull-down resistors that load the output during
positive output voltage excursions.
VOUT
VIN
−V = −5V
(Additional
Negative Supply)
Figure 7. Swing-to-Ground
R3
549Ω
C2
150pF
V+
R1
549Ω
R2
1.24kΩ
VIN
OPA365
C1
1nF
VOUT
V−
Figure 8. Second-Order Butterworth 500kHz
Low-Pass Filter
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One point to observe when considering the MFB filter
is that the output is inverted, relative to the input. If this
inversion is not required, or not desired, a noninverting
output can be achieved through one of these options:
1) adding an inverting amplifier; 2) adding an additional
2nd-order MFB stage; or 3) using a noninverting filter
topology such as the Sallen-Key (shown in Figure 9).
OPA365 an ideal driver for modern ADCs. Also, because it is free of the input offset transition characteristics inherent to some rail-to-rail CMOS op amps, the
OPA365 provides low THD and excellent linearity
throughout the input voltage swing range.
Figure 10 shows the OPA365 driving an ADS8326,
16-bit, 500kSPS converter. The amplifier is connected
as a unity-gain, noninverting buffer and has an output
swing to 0V, making it directly compatible with the ADC
minus full-scale input level. The 0V level is achieved by
powering the OPA365 V− pin with a small negative voltage established by the diode forward voltage drop.
A small, signal-switching diode or Schottky diode
provides a suitable negative supply voltage of −0.3 to
−0.7V. The supply rail-to-rail is equal to V+, plus the
small negative voltage.
MFB and Sallen-Key, low-pass and high-pass filter synthesis is quickly accomplished using TI’s FilterPro program. This software is available as a free download at
www.ti.com.
DRIVING AN ANALOG-TO-DIGITAL CONVERTER
Very wide common-mode input range, rail-to-rail input
and output voltage capability and high speed make the
C3
220pF
R2
19.5kΩ
R1
1.8kΩ
R3
150kΩ
VIN = 1VRMS
C1
3.3nF
C2
47pF
OPA365
VOUT
Figure 9. Configured as a 3-Pole, 20kHz, Sallen-Key Filter
+5V
C1
100nF
+5V
R1(1)
100Ω
V+
+IN
OPA365
C3(1)
1nF
V−
VIN
0 to 4.096V
−IN
ADS8326
16−Bit
100kSPS
REF IN
+5V
Optional(2)
R2
500Ω
SD1
BAS40
−5V
C2
100nF
REF3240
4.096V
C4
100nF
NOTES: (1) Suggested value; may require adjustment based on specific application.
(2) Single−supply applications lose a small number of ADC codes near ground
due to op amp output swing limitation. If a negative power supply is available,
this simple circuit creates a −0.3V supply to allow output swing to true ground
potential.
Figure 10. Driving the ADS8326
11
"#$
%"#$
www.ti.com
SBOS365A − JUNE 2006 − REVISED JULY 2006
One method for driving an ADC that negates the need
for an output swing down to 0V uses a slightly compressed ADC full-scale input range (FSR). For example, the 16-bit ADS8361 (shown in Figure 11) has a
maximum FSR of 0V to 5V, when powered by a +5V
supply and VREF of 2.5V. The idea is to match the ADC
input range with the op amp full linear output swing
range; for example, an output range of +0.1 to +4.9V.
The reference output from the ADS8361 ADC is divided
down from 2.5V to 2.4V using a resistive divider. The
ADC FSR then becomes 4.8VPP centered on a common-mode voltage of +2.5V. Current from the ADS8361
reference pin is limited to about ±10µA. Here, 5µA was
used to bias the divider. The resistors must be precise
to maintain the ADC gain accuracy. An additional benefit of this method is the elimination of the negative supply voltage; it requires no additional power-supply current.
An RC network, consisting of R1 and C1, is included between the op amp and the ADS8361. It not only provides a high-frequency filter function, but more importantly serves as a charge reservoir used for charging
the converter internal hold capacitance. This capability
assures that the op amp output linearity is maintained
as the ADC input characteristics change throughout the
conversion cycle. Depending on the particular application and ADC, some optimization of the R1 and C1 values may be required for best transient performance.
R2
10kΩ
+5V
R1
10kΩ
C1
100nF
V+
+5V
R3(1)
100Ω
−IN
OPA365
VIN
0.1V to 4.9V
C2(1)
V−
1nF
+IN
ADS8361
16−Bit
100kSPS
REF OUT REF IN
+2.5V
NOTE: (1) Suggested value; may require adjustment
based on specific application.
R4
20kΩ
+2.4V
R5
480kΩ
Figure 11. Driving the ADS8361
12
C3
1µF
"#$
%"#$
www.ti.com
SBOS365A − JUNE 2006 − REVISED JULY 2006
Figure 12 illustrates the OPA2365 dual op amp providing signal conditioning within an ADS1258 bridge sensor circuit. It follows the ADS1258 16:1 multiplexer and
is connected as a differential in/differential out amplifier.
The voltage gain for this stage is approximately 10V/V.
Driving the ADS1258 internal ADC in differential mode,
rather than in a single-ended, exploits the full linearity
performance capability of the converter. For best common-mode rejection the two R2 resistors should be
closely matched.
Note that in Figure 12, the amplifiers, bridges,
ADS1258 and internal reference are powered by the
same single +5V supply. This ratiometric connection
helps cancel excitation voltage drift effects and noise.
For best performance, the +5V supply should be as free
as possible of noise and transients.
When the ADS1258 data rate is set to maximum and
the chop feature enabled, this circuit yields 12 bits of
noise-free resolution with a 50mV full-scale input.
The chop feature is used to reduce the ADS1258 offset
and offset drift to very low levels. A 2.2nF capacitor is
required across the ADC inputs to bypass the sampling
currents. The 47Ω resistors provide isolation for the
OPA2365 outputs from the relatively large, 2.2nF capacitive load. For more information regarding the
ADS1258, see the product data sheet available for
down load at www.ti.com.
+5V
RFI
10µF
+
0.1µF
2kΩ
RFI
AIN0
AVSS
AVDD
2kΩ
REFP
AIN1
+
…
ADS1258
AINCOM
MUXOUTP
AIN15
MUXOUTN
AIN14
2kΩ
RFI
0.1µF
RFI
ADCINN
…
…
2kΩ
RFI
10µF
REFN
ADCINP
RFI
+5V
2.2nF
0.1µF
R3
47Ω
OPA2365
R2 = 10kΩ
R1 = 2.2kΩ
R2 = 10kΩ
R3
47Ω
OPA2365
NOTE: G = 1 + 2R2/R1. Match R2 resistors for optimum CMRR.
Figure 12. Conditioning Input Signals to the ADS1258 on a Single-Supply
13
PACKAGE OPTION ADDENDUM
www.ti.com
21-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
OPA365AIDBVR
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA365AIDBVRG4
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA365AIDBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
OPA365AIDBVTG4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
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Addendum-Page 1
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