MP9928 4V-60V Input, Current Mode, Synchronous Step-Down Controller DESCRIPTION FEATURES The MP9928 is a high-voltage, synchronous step-down switching regulator controller that can directly step down voltages from up to 60V. The MP9928 uses PWM current control architecture with accurate cycle-by-cycle current limiting. It is capable of driving dual Nchannel MOSFET switches. AAM Mode (Advanced asynchronous mode) enables non-synchronous operation and PFM mode to optimize light load efficiency. The operating frequency of MP9928 can be programmed by an external resistor or synchronized to an external clock for noisesensitive applications. Fault protections are available including a precision output over voltage protection (OVP), output over current protection (OCP), and thermal shutdown. The MP9928 is available in TSSOP20-EP package and QFN-20 (3mmx4mm) package. • • • • • • • • • • • • Wide 4V to 60V Operating Input Range Dual N-Channel MOSFET Driver Low Dropout Operation: Maximum Duty Cycle at 99.5% Programmable Frequency Range: 100kHz 1000kHz 180º Out-of-Phase SYNCO External Soft-Start and PG Pin Selectable Cycle-by-Cycle Current Limit Output Over Voltage Protection Internal LDO with Externally Power Supply Option Programmable CCM and AAM PulseSkipping Mode Accuracy Over Temperature Protection TSSOP20-EP package and QFN-20 (3mmx4mm) Package APPLICATIONS • • • • PD Power Supply in PoE System USB Dedicated Charging Port (DCP) Industrial Control Systems Power Supply for Linear Chargers All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under quality assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION VIN 4-60V BST IN FREQ TG VCC1 SW VOUT PG VCC2 SGND MP9928 EN/SYNC BG SENSE+ SENSE- ILIM FB CCM/AAM PGND COMP MP9928 Rev. 1.0 5/20/2016 SYNCO SS www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 1 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER ORDERING INFORMATION Part Number Package Top Marking MP9928GF* TSSOP-20 EP See Below MP9928GL** See Below QFN-20 (3mmx4mm) * For Tape & Reel, add suffix –Z (e.g. MP9928GF–Z) ** For Tape & Reel, add suffix –Z (e.g. MP9928GL–Z) TOP MARKING (MP9928GF) MP9928: product code of MP9928GF; MPS: MPS prefix; YY: year code; WW: week code: LLLLLLLLL: lot number; TOP MARKING (MP9928GL) 9928: product code of MP9928GL; MP: MPS prefix; Y: year code; W: week code: LLL: lot number; MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 2 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER PACKAGE REFERENCE VCC1 4 17 BG SGND 5 16 PGND SS 6 15 SENSE+ COMP 7 14 SENSE- FB 8 13 SYNCO CCM/AAM 9 12 ILIM FREQ 10 11 PG TSSOP-20 EP ABSOLUTE MAXIMUM RATINGS VCC2 1 16 SW VCC1 2 15 SGND 3 14 PGND SS 4 13 SENSE+ COMP 5 12 SENSE- FB 6 11 SYNCO BG QFN-20 (3mmx4mm) (1) Input supply voltage (VIN) ............... -0.3V to 65V EN/SYNC....................................... -0.3V to 50V SW .........................-0.3V(-4V for <20ns) to 65V BST - SW...................................... -0.3V to 6.5V Supply voltage (VCC1) ................. -0.3V to 6.5V External supply voltage (VCC2) ..... -0.3V to 15V SENSE + / - ................................... -0.3V to 28V Differential sense (SENSE+ to SENSE-)............ ................................................... -0.7V to +0.7V TG ..............................VSW - 0.3V to VBST + 0.3V BG .................................. -0.3V to VCC1 + 0.3V All other pins ............................... -0.3V to +6.5V (2) Continuous power dissipation (TA = +25°C) TSSOP-20 EP ...........................................3.1W QFN-20 (3mmx4mm) .................................2.6W Junction temperature .............................. .150°C Lead temperature .................................... 260°C Storage temperature ................ -65°C to +175°C MP9928 Rev. 1.0 5/20/2016 17 TG SW 10 18 BST 3 18 VCC2 9 TG IN 19 8 2 7 EN/SYNC ILIM BST PG 20 FREQ 1 CCM/AAM IN 19 TOP VIEW 20 EN/SYNC TOP VIEW Recommended Operating Conditions (3) Supply voltage (VIN) ......................... 4V to 60V(4) Output voltage (VOUT) ................................ ≤24V Supply voltage for (VCC2) .................. 5V to 12V Operating junction temp. (TJ). ...-40°C to +125°C Thermal Resistance (5) θJA θJC TSSOP-20 EP ........................ 40 ....... 8 .... °C/W QFN-20 (3mmx4mm) ............. 48 ...... 10 ... °C/W NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) UVLO_rising is 5V but UVLO_falling is lower than 4V, so input must be >5V for startup, and after start up MP9928 can work down to 4V input voltage. 5) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 3 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER ELECTRICAL CHARACTERISTICS VIN = 24V, TJ = -40°C to 125°C, EN = 2V, VILIMIT = 75mV, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Input Supply VIN UVLO threshold (rising) INUV_RISING 4.5 5 V VIN UVLO threshold (falling) INUV_FALLING 3.7 3.95 V INUV_HYS IQ_VCC2 800 25 40 mV μA 750 1000 μA 250 350 μA 0.5 3 μA VIN UVLO hysteresis VIN supply current with VCC2 bias VIN supply current without VCC2 bias VIN AAM current IQ IQ_AAM VIN shutdown current ISHDN VCC2 = 12V, external bias VCC2 = 0, VFB = 0.84V, VAAM = 5V, SENSE+ = SENSE- = 0.3V VAAM=0.6V, VFB=0.84V, SENSE+ = SENSE- = 0.3V VEN = 0V VCC Regulator VCC1 regulator output voltage from VIN VCC1 regulator load regulation from VIN VCC1 regulator output voltage from VCC2 VCC1_VIN VCC1_VCC2 VCC1 regulator load regulation from VCC2 VIN > 6V 5 V Load = 0 to 50mA, VCC2 floating or connects to GND 1 VCC2 > 6V 5 Load = 0 to 50mA, VCC2 = 12V 1 3 % 4.92 V 3 % V VCC2 UVLO threshold (rising) VCC2_RISING 4.7 VCC2 UVLO threshold (falling) VCC2_FALLING 4.45 V VCC2_HYS 250 mV VCC2 threshold hysteresis VCC2 supply current IVCC2 VAAM = 5V, VFB = 0.84V, VCC2 = 12V VAAM = 0.6V, VFB = 0.84V, VCC2 = 12V 800 1200 μA 200 300 μA 0.792 0.800 0.808 V 4V ≤ VIN ≤ 60V, TJ=-40°C to 125°C 0.788 0.800 0.812 V Feedback (FB) Feedback voltage Feedback current VFB IFB 4V ≤ VIN ≤ 60V, TJ=25°C VFB = 0.84V 10 nA Enable (EN) Enable threshold (rising) VEN_RISING 1.16 1.22 1.28 V Enable threshold (falling) VEN_FALLING 1.03 1.09 1.15 V Enable threshold hysteresis EN input current Enable turn-off delay MP9928 Rev. 1.0 5/20/2016 VEN_TH IEN TOFF VEN = 2V 10 130 mV 2 μA 15 μs www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 4 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER ELECTRICAL CHARACTERISTICS (continued) VIN = 24V, TJ = -40°C to 125°C, EN = 2V, VILIMIT = 75mV, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units R Freq = 65kΩ 240 300 360 kHz Oscillator and Sync Operating frequency FSW Foldback operating frequency Maximum programmable frequency Minimum programmable frequency Sync/EN frequency range FSW _FOLDBACK VFB = 0.1V FSYNC 100 Sync/EN voltage rising threshold VSYNC_RISING 2 Sync/EN voltage falling threshold VSYNC_FALLING FSWH 50% FSW 1000 kHz FSWL 100 kHz 1000 kHz V 0.35 V 24 V 35 60 85 mV mV mV Current Sense Current sense common mode voltage range Current limit sense voltage Reverse voltage current limit VILIMIT sense Valley current limit VREV_ILIMIT VVAL_ILIMIT Input current of sensor 0 VSENSE+/- ISENSE ILIM = GND, VSENSE+ = 3.3V ILIM = VCC1, VSENSE+ = 3.3V ILIM = FLOAT, VSENSE+ = 3.3V 15 40 65 25 50 75 ILIM = GND, VSENSE+ = 3.3V 8 ILIM = VCC1, VSENSE+ = 3.3V ILIM = FLOAT, VSENSE+ = 3.3V 17 24 ILIM = GND, VSENSE+ = 3.3V 22.5 ILIM = VCC1, VSENSE+ = 3.3V ILIM = FLOAT, VSENSE+ = 3.3V VSENSE+/-(CM) = 0V VSENSE+/-(CM) = 3.3V VSENSE+/-(CM) > 5V 47.5 72.5 -45 115 150 mV mV μA μA μA Soft Start (SS) Soft-start source current ISS SS = 0.5V Gm ΔV = 5mV 2 4 6 μA Error Amplifier Error amp transconductance (6) Error amp open loop DC gain AO Error amp sink/source current IEA FB = 0.7/0.9V 500 μA/V 70 dB ±30 μA Protection Over-voltage threshold Over-voltage hysteresis VOV VOV_HYS (7) Thermal shutdown Thermal shutdown hysteresis MP9928 Rev. 1.0 5/20/2016 (7) 110% 115% 10% 120% VFB VFB 170 °C 20 °C www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 5 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER ELECTRICAL CHARACTERISTICS (continued) VIN = 24V, TJ = -40°C to 125°C, EN = 2V, VILIMIT = 75mV, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units Gate Driver TG pull-up resistor RTG_PULLUP Source 20mA 2 Ω TG pull-down resistor RTG_PULLDN Sink 20mA 1 Ω BG pull-up resistor RBG_PULLUP Source 20mA 3 Ω BG pull-down resistor RBG_PULLDN Sink 20mA 1 Ω 60 ns 99.5 % ns Dead time TDead CLoad = 3.3nF TG maximum duty cycle Dmax VFB = 0.7V (7) 98 TG minimum on time TON_MIN_TG 92 BG minimum on time TON_MIN_BG 175 250 ns 0.1 0.3 V Power Good Power good low VPG_Low PG rising threshold PGVth_RSING PG falling threshold PGVth_FALLING PG threshold hysteresis Power good leakage Power good delay ISINK = 4mA VOUT rising VOUT falling VOUT falling VOUT rising 85% 90% 96.5% VFB 101% 107% 112.5% 81% 87% 92.5% VFB 105% 110% 116.5% PGVth_HYS IPG_LK TPG_delay 3% PG = 5V VFB 2 μA PG rising and falling 25 μs RFreq = 65 kΩ 9.2 μA AAM/CCM AAM output current CCM required AAM threshold voltage IAAM VCCM_TH 2.3 V NOTES: 6) Guaranteed by design, not tested. 7) Guaranteed by characterization, not production tested. MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 6 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TYPICAL CHARACTERISTICS VIN = 24V, VOUT = 5V, L = 4.7µH, TA = +25°C, unless otherwise noted. MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 7 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TYPICAL CHARACTERISTICS (continued) VIN = 24V, VOUT = 5V, L = 4.7µH, TA = +25°C, unless otherwise noted. MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 8 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 24V, VOUT = 5V, L = 4.7µH, TA = +25°C, unless otherwise noted. MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 9 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 24V, VOUT = 5V, L = 4.7µH, AAM Mode, TA = +25°C, unless otherwise noted. MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 10 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 24V, VOUT = 5V, L = 4.7µH, AAM mode, TA = +25°C, unless otherwise noted. MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 11 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 24V, VOUT = 5V, L = 4.7µH, AAM Mode, TA = +25°C, unless otherwise noted. MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 12 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER PIN FUNCTIONS TSSOP Pin # QFN Pin # 1 19 2 20 Name Input supply. The MP9928 operates from a 4V to 60V input. Ceramic capacitor is needed to prevent large voltage spikes from appearing at the input. Enable input. The threshold is 1.22V with 130mV of hysteresis, and it is used to implement an input under voltage lockout (UVLO) function EN/SYNC externally. If an external sync clock is applied to this pin, internal clock will follow the sync frequency. IN External power supply for the internal VCC1 regulator. It will disable the power from VIN as long as VCC2 is higher than 4.7V. Do not connect >12V VCC2 power supply to this pin. Connecting VCC2 pin to external power supply will reduce power dissipation and thus increases efficiency. Internal bias supply. Decouple with a 1µF ceramic capacitor or greater VCC1 ceramic capacitor. But the capacitance should be no more than 4.7µF. SGND Low noise signal ground reference. Soft-start control input. This pin is used to program the soft-start period SS with an external capacitor between SS to SGND. COMP is used to compensate the regulation control loop. Connect an RC COMP network from COMP to GND to compensate for the regulation control loop. Feedback. This is the input to the error amplifier. An external resistive FB divider connected between the output and GND is compared to the internal +0.8V reference to set the regulation voltage. Continuous conduction mode/advanced asynchronous mode set pin. Connect this pin to VCC1 pin or float can set the part operates in CCM CCM/AAM mode. Connecting an appropriate external resistor from this pin to GND to make AAM at low level, can set the part operates in AAM. The AAM voltage should be no less than 480mV. 3 1 4 2 5 3 6 4 7 5 8 6 9 7 10 8 FREQ 11 9 PG 12 10 ILIM 13 11 SYNCO 14 12 SENSE- 15 13 SENSE+ 16 14 PGND MP9928 Rev. 1.0 5/20/2016 Description Connect a resistor between FREQ and GND to set the switching frequency. Power good output. The output of this pin is open drain. Current sense voltage limit set. The voltage at this pin sets the nominal sense voltage at maximum output current. There are three fixed options (float, connect to VCC1 or connect to GND.) outputs a clock which are 180° out-of-phase with internal Oscillator Clock or external Synchronize Clock when part works in CCM or DCM(but not Sleep mode) for dual channel co-pack. SYNCO outputs DC voltage in other cases(Sleep mode, Low Dropout mode, Fault protections, etc.). Negative input for the current sense. The sensed inductor current limit threshold is determined by status of ILIM pin. Positive input for the current sense. The sensed inductor current limit threshold is determined by status of ILIM pin. Power ground reference for the internal low side switch driver and the VCC1 regulator circuit. Connect this pin directly to the negative terminal of the VCC1 decoupling capacitor. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 13 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER PIN FUNCTIONS (continued) TSSOP Pin # QFN Pin # Name 17 15 BG 18 16 SW 19 17 TG 20 MP9928 Rev. 1.0 5/20/2016 18 BST Description Bottom gate driver output. Connect this pin to the gate of the synchronous N-channel MOSFET. Switch node. Reference for the VBST supply and high current returns for bootstrapped switch. Top gate drive. The TG pin drives the gate of the top N-channel MOSFET. The TG driver draws power from the BST capacitor and returns to SW pin, providing a true floating drive to the top N-channel MOSFET. Bootstrap. This pin is the positive power supply for the internal floating high side MOSFET driver. Connect a bypass capacitor between this pin and SW pin. A diode from VCC1 to this pin charges the BST capacitor when the low side switch is off. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 14 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER BLOCK DIAGRAM SYNCO ILIM IN 4.7V VCC Regulator VCC2 VCC1 VCC1 BOOST Regulator FREQ Oscillator BST HS Driver VCC1 EN/SYNC Current Limit Comparator Reference Control Vref Error Amplifier LS Driver TG SW BG SS SS PGND FB 12X PG V PG Current Sense Amplifer SENSE+ SENSE- SGND COMP CCM/AAM Figure 1: Block Diagram MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 15 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER OPERATION Overview The MP9928 is a high-performance, step down, synchronous DC/DC converter controller IC with a wide input range. It implements current mode, switching frequency programmable control architecture to regulate the output voltage with external N-channel MOSFET switches. The MP9928 senses the voltage at FB pin. The difference between the voltage on this pin and an internal 0.8V reference is amplified to generate an error voltage on COMP pin which is used as a threshold for the current sense comparator with a slope compensation ramp. inductor current approaches zero at light-load. If the load is further decreased or even no load that make COMP voltage below the Voltage of CCM/AAM pin (VAAM)+480mV, the MP9928 enters AAM mode. In AAM mode, the internal clock is reset every time when VCOMP crosses over (VAAM+480mV) and the crossover time is taken as benchmark of the next clock. When the load increases and the DC value of VCOMP is higher than (VAAM+480mV), the operation mode is DCM or CCM which has a constant switching frequency. Inductor Current AAM Mode (AAM=Low) Inductor Current PWM Mode (AAM=High) t Under normal load condition, the controller operates in full PWM mode. At the beginning of each oscillator cycle, the top gate driver is enabled. Top gate turns on for a period determined by the duty cycle. When the top gate turns off, the bottom gate turns on after a dead time and stays on until the beginning of the next clock cycle. There is an optional power save mode for light load or no load conditions, and see details in the following section. AAM Mode MP9928 employs AAM mode functionality to optimize the efficiency during light-load or noload conditions. This AAM mode can be optional enabled when CCM/AAM pin is at a low level by connecting an appropriate resistor to GND to make sure that VAAM is no less than 480mV. VAAM (mV) = IAAM (μA) x RAAM (kΩ) Where, IAAM is AAM pin output current, it can be shown below. IAAM (μA) = 600 (mV) / RFREQ (kΩ) RFREQ is the resistor from FREQ to SGND, for given operating frequency, and its value is shown in ‘Programmable Switching Frequency’ section. AAM is disabled when CCM/AAM pin is floating or connected to VCC1. If AAM is enabled, the MP9928 will firstly enter non-synchronous operation as long as the MP9928 Rev. 1.0 5/20/2016 Load Decreased t Load t Decreased t t t Figure 2: AAM and PWM Floating Driver and Bootstrap Charging The floating top gate driver is powered by an external bootstrap capacitor (CBST), which is normally refreshed when the high-side MOSFET (HS-FET) turns off. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 3.05V with a hysteresis of 170mV. VCC1 Regulator and VCC2 Power Supply Both high-side and low-side MOSFET drivers and most of the internal circuitries are powered from the VCC1 regulator. An internal low dropout linear regulator supplies VCC1 power from VIN, usually a 1μF to 4.7μF ceramic capacitor is recommended from VCC1 to GND. If VCC2 pin is left open or connected to a voltage <4.45V, an internal 5V regulator supplies VCC1 power from VIN. If VCC2 is >4.7V, the 5V regulator is disabled and another 5V regulator is triggered that supplies VCC1 power from VCC2. If 4.5V<VCC2<5V, the 5V regulator is in dropout and VCC1 is approximately equal to VCC2. When VCC2 is greater than 5V (max. is 12V), VCC1 is www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 16 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER regulated to 5V. Using the VCC2 power supply allows the VCC1 power to be derived from a high-efficiency external source, such as one of the MP9928’s switching regulator outputs. Error Amplifier The error amplifier compares the FB pin voltage with the internal 0.8V reference (REF) and outputs a current proportional to the difference between the two input voltages. This output current is then used to charge or discharge the external compensation network to form the COMP voltage, which is used to control the power MOSFET current. Adjusting the compensation network from COMP pin to GND could optimize the control loop for good stability or fast transient response. Current Limit Function There are three fixed options for current limit setting: When ILIM connects to GND, the current limit sense voltage is set to 25mV; when ILIM connects to VCC1, the current limit sense voltage is set to 50mV; when ILIM pin floats, the current limit sense voltage is set to 75mV. When the peak value of the inductor current exceeds the set current limit threshold, meanwhile, output voltage starts to drop until FB is 62.5% of the reference. MP9928 enters hiccup mode to periodically restart the part. Meanwhile, the frequency would be lowered when FB<0.5V. This protection mode is especially useful when the output is dead-shorted to ground. The average short-circuit current is greatly reduced to alleviate the thermal issues. The MP9928 exits the hiccup mode once the over-current condition is removed. Low Dropout Operation At low dropout mode, the MP9928 is designed to operate at HS max duty on mode as long as the voltage across BST - SW is greater than 3.05V, this improves dropout. When the voltage from BST to SW drops below 3.05V, an under-voltage lockout (UVLO) circuit turns off the high-side MOSFET (HS-FET), and at the same time, the low-side MOSFET (LS-FET) turns on to refresh the BST capacitor. After the BST capacitor voltage is re-charged, the HS-FET turns on again to regulate the output. Since the BST capacitor voltage is greater than 3.05V, the HS-FET can remain on for more switching cycles than are MP9928 Rev. 1.0 5/20/2016 required to refresh the BST capacitor, thus increasing the effective duty cycle of the switching regulator. The low dropout operation makes the MP9928 suitable for application such as automotive cold-crank. Power Good Function The MP9928 includes an open-drain power good output that indicates whether the regulator’s output is within about ±10% of its nominal value. When the output voltage falls outside this range, the PG output is pulled to low. It should be connected to a voltage source of no more than 5V through a resistor (e.g., 100kΩ). The PG delay time is 25µs. PG pin has self-driving capability, if MP9928 is off and PG pin is pulled up to another DC power source through a resistor, the PG pin can also be pulled low by self-driving circuit. Soft Start The soft start (SS) is implemented to prevent the converter output voltage from overshooting during startup. When the chip starts, the internal circuitry generates a soft-start voltage ramping up from 0V to 0.8V. When it is lower than the internal reference (REF), SS voltage overrides REF, so the error amplifier uses SS voltage as the reference. When SS voltage is higher than REF, REF regains control. An external capacitor connected from SS to SGND is charged from an internal 4μA current source, producing a ramped voltage. The softstart time (tSS) is set by the external SS capacitor and can be calculated by below formula: t SS (ms ) = C SS (nF ) × VREF (V ) ISS (μA ) Where CSS is the external SS capacitor, VREF is the internal reference voltage (0.8V), and ISS is the 4μA SS charge current. There is no internal SS capacitor. SS will be reset when a fault protection happened except for output over voltage protection. Output Over-Voltage Protection MP9928 output voltage is monitored by FB voltage. If FB voltage is typically 10% higher than the reference, it’ll trigger OVP. Once it triggers OVP, MP9928 will go into discharge mode, the www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 17 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER HS-FET is turned off, and the LS-FET is turned on and keeps on until the reverse current limit is triggered, after LS-FET is turned off, inductor current will increase to 0. The LS-FET will be turned on again next clock cycle. MP9928 works at discharge mode until the over-voltage condition is cleared. Enable The MP9928 has a dedicated enable control pin. It uses a bandgap generated precision threshold of 1.22V. By pulling it high or low, the IC can be enabled or disabled. To disable the part, EN/SYNC must be pulled low for at least 15µs. Tie EN to VIN through a resistor divider R16 and R17 to program the VIN start up threshold (see Figure 3). The EN threshold is 1.08V (falling edge), so the VIN falling UVLO threshold is 1.08V x (1+ R16/R17). In high input design, EN pin voltage should not be greater than 50V. VIN R16 EN R17 Figure 3: EN Resistor Divider Synchronize The MP9928 can be synchronized to an external clock range from 100kHz up to 1000kHz through EN/SYNC pin. The internal clock rising edge is synchronized to the external clock rising edge. The pulse width (both on and off) of external clock signal should be no less than 100ns. MP9928 Rev. 1.0 5/20/2016 Under-Voltage Lockout Under-voltage lockout (UVLO) is implemented to protect the chip from operating at insufficient input supply voltages. The MP9928 UVLO rising threshold is about 4.5V while its falling threshold is about 3.7V. Thermal Protection The purpose of thermal protection is to prevent damage in the IC by allowing exceptive current to flow and heating the junction. The die temperature is internally monitored until the thermal limit is reached. When the silicon die temperature is higher than 170°C, it shuts down the whole chip. When the temperature is lower than its lower threshold, typically 150°C, the chip is enabled again. Start-Up and Shutdown If both VIN and EN are higher than their respective thresholds, the chip starts up. The reference block starts first, generating stable reference voltages and currents. And then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitry. Three events can shut down the chip: EN low, VIN low and thermal shutdown. In the shutdown procedure, the signal path is firstly blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subjected to this shutdown command. Pre-Bias Start-Up For MP9928, at startup, If SS<FB, which means output has pre-bias voltage, neither TG nor BG would be turned on until SS is greater than FB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 18 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER APPLICATION INFORMATION Setting the Output Voltage The external resistor divider is used to set the output voltage. VOUT R8 FB R9 Figure 4: VOUT Setting Resistor If R8 is determined, then R9 can be calculated with below formula: R9 = more inductance and capacitance, which results in larger real estate and also higher cost. It is a trade off between power loss and passive component size. Additionally, in noise-sensitive applications, the switching frequency should be out of a sensitive frequency band. The MP9928’s frequency can be programmed from 100kHz to 1000kHz with a resistor from FREQ to SGND. The value of RFREQ for a given operating frequency can be calculated by: 20000 RFREQ= (kΩ) −1 fs (kHz) To get fS = 500kHz, set RFREQ to 39kΩ. Table 2: Frequency vs. Resistor R8 VOUT −1 0.8V Resistor (kΩ) Frequency (kHz) 65 300 39 500 19 1000 Table 1—Resistor Selection for Common Output Voltages VOUT (V) R8 (kΩ) R9 (kΩ) 3.3 5 37.4 (1%) 63.4 (1%) 12 (1%) 12 (1%) 12 169 (1%) 12 (1%) VCC Regulator Connection VCC1 can be powered from both VIN and VCC2. If connecting VCC2 to an external power supply to improve the overall efficiency, this VCC2 should be larger than 4.7V but smaller than 12V. Setting Current Sensing The MP9928 has three fixed options for current limit setting: when ILIM pin is connected to GND, the current sense voltage is set to 25mV; when ILIM pin is connected to VCC1, the current sense voltage is set to 50mV and when ILIM pin is floating, the current limit sense voltage is set to 75mV. The current sense resistor, RSENSE, monitors the inductor current. Its value is chosen based on the current limit threshold. The relationship between the peak inductor current Ipk and RSENSE is: R SENSE = V ILIMIT Ipk C IN VIN VCC1 VCC2 LDO C Vcc MP9928 Internal Ext . Power Supply 4.7V (5) The typical values for RSENSE are in the range of 5mΩ to 50mΩ. Programmable Switching Frequency There are a number of variables to consider when choosing the switching frequency. A high frequency will increase switching losses and gate charge losses, while a lower frequency requires MP9928 Rev. 1.0 5/20/2016 VIN Figure 5: VCC Power from External Supply If VOUT is higher than 4.7V but ≤12V, VCC2 can be connected to VOUT directly. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 19 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER VIN IL Rsense C IN CO VIN VCC1 VCC2 LDO C Vcc MP9928 Internal IRMS =ILOAD VOUT VOUT V (1- OUT ) VIN VIN The worst-case condition occurs at VIN = 2VOUT, where IRMS = ILOAD/2. So, the input capacitor selected must be capable of handling this ripple current. Output Capacitor Selection The output capacitor keeps the output voltage ripple small and ensures regulation loop stability. The output capacitor impedance should be low at the switching frequency. The output voltage ripple can be estimated by: 4.7V Figure 6: VCC Power from VOUT Selecting the Inductor An inductor with a DC current rating at least 25% higher than the maximum load current is recommended for most applications. A larger value inductor results in less ripple current and a lower output ripple voltage. However, the larger value inductor has a larger physical size, higher series resistance, and lower saturation current. Generally, choose the inductor ripple current approximately 30% of the maximum load current. Then the inductance value can be then be calculated by: L= VOUT × (VIN - VOUT ) VΔI fL × S IN × Where VOUT is the output voltage, VIN is the input voltage, fS is the switching frequency, and ΔIL is the peak-to-peak inductor ripple current. The maximum inductor peak current is: IL(MAX) =ILOAD + ΔIL 2 Where, ILOAD is the load current. Input Capacitor Selection Since the input capacitor absorbs the input switching current, it requires an adequate ripple current rating. The selection of the input capacitor is mainly based on its maximum ripple current capability. The RMS value of the ripple current flowing through the input capacitor can be described as: MP9928 Rev. 1.0 5/20/2016 ΔVOUT = VOUT VOUT 1 × 1 − × RESR + fS × L VIN 8 × fS × CO Where CO is the output capacitance value and RESR is the equivalent series resistance (ESR) value of the output capacitor. For tantalum or electrolytic capacitor application, the ESR dominates the impedance at the switching frequency. So the above formula can be approximated as: ΔVOUT = VOUT VOUT × 1 − fS × L VIN × RESR Compensation Components The MP9928 employs current-mode control for easy compensation and fast transient response. The COMP pin controls system stability and transient response. The COMP pin is the output of the internal error amplifier. A series capacitorresistor combination sets a pole-zero combination to control the control system’s characteristics. The DC gain of the voltage feedback loop is: A VDC = R LOAD × G CS × A O × VFB VOUT Where AO is the error-amplifier voltage gain 3000V/V, GCS is the current-sense transconductance, 1/(12xRSENSE) (A/V), and RLOAD is the load resistor value. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 20 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER Follow the below compensation: COMP R5 C7 C6 Figure 7: COMP External Compensation The system has two important poles: one from the compensation capacitor (C6) and the output resistor of error amplifier and the other tone from the output capacitor and the load resistor. These poles can be calculated by: fP1 = fP2 = Gm 2π × C6 × A O 1 2π × Co × R LOAD Where Gm is the error-amplifier transconductance 500μA/V, and Co is the output capacitor. The system has one important zero due to the compensation capacitor and the compensation resistor (R5). This zero is located at: 1 f Z1 = 2π × C6 × R5 The system may have another significant zero if the output capacitor has a large capacitance or a high ESR value. This zero can be located at: 1 fESR = 2π × Co × R ESR In this case, a third pole set by the compensation capacitor (C7) and the compensation resistor can compensate for the effect of the ESR zero. This pole is calculated by: fP3 = 1 2π × C7 × R5 The goal of the compensation design is to shape the converter transfer function for a desired loop gain. The system crossover frequency where the feedback loop has unity gain is important, since lower crossover frequencies result in slower line and load transient responses, and higher crossover frequencies lead to system instability. Set the crossover frequency to ~0.1×fSW. MP9928 Rev. 1.0 5/20/2016 steps to design the 1. Choose R5 to set the desired crossover frequency: R5 = 2π × Co × fC VOUT × G m × G CS VFB Where, fC is the desired crossover frequency. 2. Choose C6 to achieve the desired phase margin. For applications with typical inductor values, set the compensation zero (fZ1) < 0.25 x fC to provide a sufficient phase margin. C6 is then: C6 > 4 2π × R5 × f C 3. C7 is required if the ESR zero of the output capacitor is located at <0.5×fSW, or the following relationship is valid: f 1 < SW 2π × Co × RESR 2 If this is the case, use C7 to set the pole (fP3) at the location of the ESR zero. Determine C7: C7 = Co × RESR R5 PCB Layout Considerations For a controller, the layout is always an important step in design. A poor layout would result in reduced performance, EMI problems, resistive loss and even system instability. Following step would help to guarantee a good layout design: 1. Input power loop between input capacitor, high-side MOSFET and low-side MOSFET should be as small as possible, SW trace should be as possible as short and wide. At the same time, one small decoupling capacitor should be placed close to the IC’s IN and GND pins. 2. Feedback loop should be far away from noise source such as SW trace, the feedback divider resistor should be as close as possible to FB and GND pin. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 21 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER 4. A short and wide type resistor is recommend for current sense. R2 R1 GND R5 R6 R15 R20 R19 R12 R11 VIN 7. The ground return of input/output capacitor should be tied close with large GND copper area, and then connect to IC GND pin through single point. 8. For heavy load, suggest layout large copper, more layers and more vias for heat sink. R2 GND C3 VIN C1B C5 R13 C8 M2 C1A R1 C2A VOUT R7 C11 R14 Via 2 Top Layer L1 Bottom Layer Figure 9: Layout Recommendation Design Example Below is a design example following the application guidelines for the following specifications: Table 3: Design Example VIN VOUT IOUT 6V to 60 V 5V 0A-7A The typical application circuit for VOUT = 5V in Figure 10 shows the detailed application schematic, and it is the basis for the typical performance waveforms. This circuit can work down to 4V after startup, but VOUT may drop when VIN is low due to maximum duty cycle limit. For more detailed device applications, please refer to the related Evaluation Board Datasheets GND R9 R6 C7 C4 C3 C2B C1C D1 C2A VOUT R7 M1 C1C D1 R5 R6 R15 R20 R19 R12 R11 R8 Figure 8 shows the recommended components place for MP9928 in TSSOP20-EP package. Figure 9 shows the recommended components place for MP9928 in QFN20 package. For the layout, the corresponding schematic can be found on Figure 10. C2B C5 C4 5. VCC1 and VCC2 capacitors should be placed as close as possible to VCC1 pin and VCC2 pin. 6. Layout the gate drive traces as directly as possible. Layout the forward and return traces close together, either running side by side or on top of each other on adjacent layers to minimize the inductance of the gate drive path. GND R8 R9 C6 C7 C8 R13 3. Route the sensing traces (SENSE+, SENSE-) in paired way with smallest closed area. Avoid crossing noisy areas such as SW or high-side gate drive traces. Place the filter capacitor for the current sense signal as close to the IC pins as possible. C11 R14 Via Top Layer L2 Bottom Layer Figure 8: Layout Recommendation MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 22 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER TYPICAL APPLICATION CIRCUITS VIN M1 R11 0 6V-60V VIN IN C1A C1B C1C 4.7uF 4.7uF 0.47uF TG D1 BST R13 2.2 VCC1 C8 L2 0.1uF FREQ R1 VCC1 37.4K SW R2 1uF SYNCO 0 0 R20 0 SENSE+ C2A C2B 22uF 220uF 63.4K SENSEFB R6 VIN SGND CCM/AAM NS EN/SYNC ILIM COMP EN/SYNC R16 PGND R15 100K R19 R8 SYNCO VOUT 0.007 10 220pF 4.7uF 0 5V / 7A R14 C11 BG MP9928 VOUT VCC2 C3 R3 VOUT M2 R12 U1 100K PG VCC2 4.7uH VCC1 C4 R7 R9 NS SS 12K C5 10nF C12 R17 NS NS C6 680pF C7 NS R5 51K C9 R4 NS 37.4K Figure 10: Application Circuit for 5V Output VIN M1 VIN R11 0 13V-60V IN C1A C1B C1C 4.7uF 4.7uF 0.47uF TG D1 BST R13 2.2 VCC1 C8 L2 0.1uF FREQ R1 VCC1 37.4K SW R2 1uF VCC2 C3 R3 0 12V 0.007 R19 0 R10 R20 0 220pF VCC2 R8 169K SENSE+ VOUT 0 C2A C2B C10 22uF 220uF 150pF SENSE- SYNCO SYNCO FB R6 VIN EN/SYNC NS COMP CCM/AAM NS SGND R16 ILIM PGND 100K VOUT 10 C11 BG MP9928 4.7uF 0 M2 R12 U1 100K PG VOUT R7 R14 VCC1 C4 R15 15uH SS R9 12K C5 EN/SYNC 10nF R17 NS C12 NS C6 220pF C7 82pF R5 10K R4 37.4K C9 NS Figure 11: Application Circuit for 12V Output MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 23 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER PACKAGE INFORMATION TSSOP-20 EP 4.40 TYP 0.40 TYP 6.40 6.60 20 0.65 BSC 11 1.60 TYP 4.30 4.50 PIN 1 ID 1 3.20 TYP 6.20 6.60 5.80 TYP 10 TOP VIEW RECOMMENDED LAND PATTERN 0.80 1.05 1.20 MAX SEATING PLANE 0.19 0.30 0.65 BSC 0.00 0.15 0.09 0.20 SEE DETAIL "A" SIDE VIEW FRONT VIEW GAUGE PLANE 0.25 BSC 3.80 4.30 0o-8o 0.45 0.75 DETAIL “A” 2.60 3.10 BOTTOM VIEW MP9928 Rev. 1.0 5/20/2016 NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) DRAWING CONFORMS TO JEDEC MO-153, VARIATION ACT. 6) DRAWING IS NOT TO SCALE. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 24 MP9928—4V TO 60V SYNCHRONOUS STEP-DOWN CONTROLLER QFN-20 (3mmx4mm) PIN 1 ID SEE DETAIL A PIN 1 ID MARKING PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW PIN 1 ID OPTION A 0.30x45° TYP. PIN 1 ID OPTION B R0.20 TYP. DETAIL A SIDE VIEW NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 4) JEDEC REFERENCE IS MO-220. 5) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP9928 Rev. 1.0 5/20/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 25