LINER LT1724IS Single, dual, quad 200mhz low noise precision op amp Datasheet

LT1722/LT1723/LT1724
Single, Dual, Quad 200MHz
Low Noise Precision Op Amps
U
FEATURES
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DESCRIPTIO
3.8nV/√Hz Input Noise Voltage
3.7mA Supply Current
200MHz Gain Bandwidth
Low Total Harmonic Distortion: – 85dBc at 1MHz
70V/µs Slew Rate
400µV Maximum Input Offset Voltage
300nA Maximum Input Bias Current
Unity-Gain Stable
Capacitive Load Stable Up to 100pF
23mA Minimum Output Current
Specified at ±5V and Single 5V
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APPLICATIO S
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The LT®1722/LT1723/LT1724 are single/dual/quad, low
noise, low power, high speed operational amplifiers. These
products feature lower input offset voltage, lower input
bias current and higher DC gain than devices with comparable bandwidth. The 200MHz gain bandwidth ensures
high open-loop gain at video frequencies.
The low input noise voltage is achieved with reduced
supply current. The total noise is optimized for a source
resistance between 0.8k and 12k. Due to the input bias
current cancellation technique used, the resistance seen
by each input does not need to be balanced.
The output drives a 150Ω load to ±3V with ±5V supplies.
On a single 5V supply the output swings from 1.5V to 3.5V
with a 500Ω load connected to 2.5V. The amplifier is unitygain stable (CLOAD ≤ 100pF).
Video and RF Amplification
ADSL, HDSL II, VDSL Receivers
Active Filters
Wideband Amplifiers
Buffers
Data Acquisition Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
The LT1722/LT1723/LT1724 are manufactured on Linear
Technology’s advanced low voltage complementary
bipolar process. The LT1722 is available in the SO-8 and
5-pin SOT-23 packages. The LT1723 is available in the
SO-8 and MS8 packages. The LT1724 is available in the
14-lead SO package.
U
TYPICAL APPLICATIO
Differential Video Line Driver
C1 5pF
Line Driver Mulitburst Video Signal
R3
750Ω
R5 2k
–
R7
62.5Ω
+VOUT
0.5V/DIV
1/2 LT1723
+
VIN
75Ω
SOURCE
125Ω
CAT-5
TWISTED PAIR
VIN
C2 5pF
R2
2k
R1
75Ω
VIN /2 62.5Ω
+VOUT LOAD
VIN
1V/DIV
–VOUT 62.5Ω
–VIN /2 LOAD
–VOUT
0.5V/DIV
R4 2k
–
R6
62.5Ω
1723 TA01
1/2 LT1723
+
1723 TA02
–VIN
172234fa
1
LT1722/LT1723/LT1724
U
W W
W
ABSOLUTE
AXI U RATI GS (Note 1)
Total Supply Voltage (V + to V –) ............................ 12.6V
Input Voltage ........................................................... ±VS
Differential Input Voltage (Note 2) ........................ ±0.7V
Input Current (Note 2) ........................................ ±10mA
Output Short-Circuit Duration (Note 3) ............ Indefinite
Operating Temperature Range (Note 4)...–40°C to 85°C
Specified Temperature Range (Note 5) ... –40°C to 85°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
U
W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
NC 1
–
+
–IN 2
+IN 3
V–
4
8
NC
7
V+
6
OUT
5
NC
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 150°C/W
–IN A 2
8
A
+IN A 3
B
V– 4
V+
7
OUT B
6
–IN B
5
+IN B
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 190°C/W
TOP VIEW
14 OUT D
OUT A 1
–IN A 2
+IN A 3
–
A
+
– 13 –IN D
D
+ 12 +IN D
V+ 4
+IN B 5
–IN B 6
OUT B 7
11 V –
+
B
–
C
TOP VIEW
5 V+
OUT 1
V– 2
+
+IN 3
S8 PART
MARKING
1722
1722I
–
LT1723CS8
LT1723IS8
S8 PART
MARKING
1723
1723I
LT1722CS5
LT1722IS5
4 –IN
S5 PACKAGE
5-LEAD PLASTIC SOT-23
TJMAX = 150°C, θJA = 250°C/W
ORDER PART
NUMBER
TOP VIEW
OUT A 1
LT1722CS8
LT1722IS8
ORDER PART
NUMBER
S5 PART
MARKING*
LTZB
ORDER PART
NUMBER
TOP VIEW
OUT A
–IN A
+IN A
V–
1
2
3
4
A
B
8
7
6
5
V+
OUT B
–IN B
+IN B
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 250°C/W
LT1723CMS8
LT1723IMS8
MS8 PART
MARKING
LTYC
LTZA
ORDER PART
NUMBER
LT1724CS
LT1724IS
+ 10 +IN C
– 8 –IN C
8
OUT C
S PACKAGE
14-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 100°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grades are identified by a label on the shipping container.
172234fa
2
LT1722/LT1723/LT1724
ELECTRICAL CHARACTERISTICS
SYMBOL
VOS
PARAMETER
Input Offset Voltage
IOS
IB
en
in
RIN
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Current
Input Resistance
CIN
CMRR
PSRR
AVOL
Input Capacitance
Input Voltage Range +
Input Voltage Range –
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Large-Signal Voltage Gain
VOUT
Output Swing
IOUT
ISC
SR
Output Current
Short-Circuit Current
Slew Rate
Full Power Bandwidth
Gain Bandwidth
Settling Time
GBW
tS
tr, tf
RO
IS
Rise Time, Fall Time
Overshoot
Propagation Delay
Output Resistance
Channel Separation
Supply Current
TA = 25°C, VS = ±5V, VCM = 0V, unless otherwise noted.
CONDITIONS
(Note 6)
LT1722 SOT-23 and LT1723 MS8
f = 10kHz
f = 10kHz
VCM = ±3.5V
Differential
MIN
5
3.5
VCM = ±3.5V
VS = ±2.3V to ± 5.5V
VOUT = ±3V, RL = 500Ω
VOUT = ±3V, RL = 150Ω
RL = 500Ω, VIN = ±10mV
RL = 150Ω, VIN = ±10mV
VOUT = ±3V, 10mV Overdrive
VOUT = 0V, VIN = ±1V
AV = –1, (Note 7)
3V peak, (Note 8)
f = 200kHz
AV = –1, 2V, 0.1%
AV = –1, 2V, 0.01%
AV = 1, 10% to 90%, VIN = 0.2VP-P, RL = 150Ω
AV = 1, VIN = 0.2VP-P, RL = 150Ω, RF = 0Ω
50% VIN to 50% VOUT = 0.2VP-P, RL = 150Ω
AV = 1, f = 1MHz
VOUT = ±3V, RL = 150Ω
Per Amplifier
80
78
10
7
±3.2
±3.1
23
35
45
115
82
TYP
100
150
40
40
3.8
1.2
35
50
2
4
–4
100
90
17
14
±3.8
±3.4
50
90
70
3.7
200
91
112
6
15
3
0.15
90
3.7
MAX
400
650
300
300
TYP
250
350
20
20
4
1.1
32
55
2
4
1
100
10
3.8
0.9
MAX
550
800
300
300
–3.5
4.5
UNITS
µV
µV
nA
nA
nV/√Hz
pA/√Hz
MΩ
kΩ
pF
V
V
dB
dB
V/mV
V/mV
V
V
mA
mA
V/µs
MHz
MHz
ns
ns
ns
%
ns
Ω
dB
mA
TA = 25°C. VS = 5V, VCM = 2.5V, RL to 2.5V, unless otherwise noted.
SYMBOL
VOS
PARAMETER
Input Offset Voltage
IOS
IB
en
in
RIN
Input Offset Current
Input Bias Current
Input Noise Voltage
Input Noise Current
Input Resistance
CIN
Input Capacitance
Input Voltage Range +
Input Voltage Range –
Common Mode Rejection Ratio
Large-Signal Voltage Gain
Output Swing+
Output Swing–
CMRR
AVOL
VOUT
CONDITIONS
(Note 6)
LT1722 SOT-23 and LT1723 MS8
f = 10kHz
f = 10kHz
VCM = 1.5V to 3.5V
Differential
MIN
5
3.5
VCM = 1.5V to 3.5V
VOUT = 1.5V to 3.5V, RL = 500Ω
RL = 500Ω, VIN = ±10mV
RL = 500Ω, VIN = ±10mV
80
4
3.6
1.5
1.4
UNITS
µV
µV
nA
nA
nV/√Hz
pA/√Hz
MΩ
kΩ
pF
V
V
dB
V/mV
V
V
172234fa
3
LT1722/LT1723/LT1724
ELECTRICAL CHARACTERISTICS
SYMBOL
IOUT
ISC
SR
GBW
tr, tf
RO
IS
PARAMETER
Output Current
Short-Circuit Current
Slew Rate
Full Power Bandwidth
Gain Bandwidth (Note 10)
Rise Time, Fall Time
Overshoot
Propagation Delay
Output Resistance
Channel Separation
Supply Current
TA = 25°C. VS = 5V, VCM = 2.5V, RL to 2.5V, unless otherwise noted.
CONDITIONS
VOUT = 3.5V or 1.5V, 10mV Overdrive
VOUT = 2.5V, VIN = ±1V
AV = -1, (Note 7)
1V peak, (Note 8)
f = 200kHz
AV = 1, 10% to 90%, VIN = 0.2VP-P, RL = 500Ω
AV = 1, VIN = 0.2VP-P, RL = 500Ω
50% VIN to 50% VOUT, 0.1V, RL = 500Ω
AV = 1, f = 1MHz
VOUT = 1.5V to 3.5V, RL = 500Ω
Per Amplifier
MIN
10
22
40
115
82
TYP
20
55
70
8.7
180
5
16
3
0.19
90
3.8
MAX
5
UNITS
mA
mA
V/µs
MHz
MHz
ns
%
ns
Ω
dB
mA
MAX
UNITS
700
850
µV
µV
The ● denotes the specifications which apply over the temperature range of 0°C ≤ TA ≤ 70°C. VS = ±5V, VCM = 0V,
unless otherwise noted. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
VOS
Input Offset Voltage
(Note 6)
LT1722 SOT-23 and LT1723 MS8
●
●
Input VOS Drift
(Note 9)
●
TYP
3
7
µV/°C
IOS
Input Offset Current
●
350
nA
IB
Input Bias Current
●
350
nA
Input Voltage Range +
Input Voltage Range –
●
●
3.5
–3.5
V
V
CMRR
Common Mode Rejection Ratio
V CM = ±3.5V
●
75
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.3V to ±5.5V
●
76
dB
AVOL
Large-Signal Voltage Gain
VOUT = ±3V, RL = 500Ω
V OUT = ±3V, RL = 150Ω
●
●
9
6
V/mV
V/mV
V OUT
Output Swing
R L = 500Ω, VIN = ±10mV
R L = 150Ω, VIN = ±10mV
●
●
±3.15
±3.05
IOUT
Output Current
V OUT = ±3V, 10mV Overdrive
●
22
mA
ISC
Short-Circuit Current
V OUT = 0V, VIN = ±1V
●
30
mA
SR
Slew Rate
A V = –1, (Note 7)
●
35
V/µs
GBW
Gain Bandwidth
f = 200kHz
●
100
MHz
Channel Separation
V OUT = ±3V, RL = 150Ω
●
81
dB
Supply Current
Per Amplifier
●
IS
V
V
5.45
mA
172234fa
4
LT1722/LT1723/LT1724
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the temperature range of
0°C ≤ TA ≤ 70°C. VS = 5V, VCM = 2.5V, RL to 2.5V, unless otherwise noted. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
(Note 6)
LT1722 SOT-23 and LT1723MS8
●
●
MIN
Input VOS Drift
(Note 9)
●
TYP
3
IOS
Input Offset Current
●
IB
Input Bias Current
●
Input Voltage Range +
Input Voltage Range –
●
●
3.5
MAX
UNITS
850
950
µV
µV
7
µV/°C
350
nA
350
nA
1.5
V
V
CMRR
Common Mode Rejection Ratio
VCM = 1.5V to 3.5V
●
75
dB
AVOL
Large-Signal Voltage Gain
VOUT = 1.5V to 3.5V, RL = 500Ω
●
3
V/mV
VOUT
Output Swing+
Output Swing–
RL = 500Ω, VIN = ±10mV
RL = 500Ω, VIN = ±10mV
●
●
3.55
IOUT
Output Current
VOUT = 3.5V or 1.5V, 10mV Overdrive
●
9
mA
ISC
Short-Circuit Current
VOUT = 2.5V, V IN = ±1V
●
11
mA
1.45
V
V
SR
Slew Rate
AV = –1, (Note 7)
●
30
V/µs
GBW
Gain Bandwidth (Note 10)
f = 200kHz
●
100
MHz
Channel Separation
VOUT = 1.5V to 3.5V, RL = 500Ω
●
81
dB
IS
Supply Current
●
5.95
mA
MAX
UNITS
900
1100
µV
µV
The ● denotes the specifications which apply over the temperature range of –40°C ≤ TA ≤ 85°C. VS = ±5V, VCM = 0V,
unless otherwise noted. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
VOS
Input Offset Voltage
(Note 6)
LT1722 SOT-23 and LT1723 MS8
●
●
MIN
Input VOS Drift
(Note 9)
●
TYP
10
µV/°C
IOS
Input Offset Current
●
400
nA
IB
Input Bias Current
●
400
nA
Input Voltage Range +
Input Voltage Range –
●
–3.5
V
V
3
3.5
CMRR
Common Mode Rejection Ratio
VCM = ±3.5V
●
75
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.0V to ±5.5V
●
75
dB
AVOL
Large-Signal Voltage Gain
VOUT = ±3V, RL = 500Ω
VOUT = ±3V, RL = 150Ω
●
●
8
5
V/mV
V/mV
VOUT
Output Swing
RL = 500Ω, VIN = ±10mV
RL = 150Ω, VIN = ±10mV
●
●
±3.1
±3.0
IOUT
Output Current
VOUT = ±3V, 10mV Overdrive
●
20
mA
ISC
Short-Circuit Current
VOUT = 0V, VIN = ±1V
●
25
mA
SR
Slew Rate
AV = –1, (Note 7)
●
25
V/µs
GBW
Gain Bandwidth
f = 200kHz
●
90
MHz
Channel Separation
VOUT = ±3V, RL = 150Ω
●
80
dB
IS
Supply Current
●
V
V
5.95
mA
172234fa
5
LT1722/LT1723/LT1724
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the temperature range of
– 40°C ≤ TA ≤ 85°C. VS = 5V, VCM = 2.5V, RL to 2.5V, unless otherwise noted. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
VOS
Input Offset Voltage
(Note 6)
LT1722 SOT-23 and LT1723 MS8
●
●
Input VOS Drift
(Note 9)
●
TYP
3
MAX
UNITS
1000
1200
µV
µV
10
µV/°C
IOS
Input Offset Current
●
400
nA
IB
Input Bias Current
●
400
nA
Input Voltage Range +
Input Voltage Range –
●
●
3.5
1.5
V
V
CMRR
Common Mode Rejection Ratio
VCM = 1.5V to 3.5V
●
75
dB
AVOL
Large-Signal Voltage Gain
VOUT = 1.5V to 3.5V, RL = 500Ω
●
2
V/mV
VOUT
Output Swing+
Output Swing–
RL = 500Ω, VIN = ±10mV
RL = 500Ω, VIN = ±10mV
●
●
3.5
Output Current
VOUT = 3.5V or 1.5V, 30mV Overdrive
●
8
IOUT
1.5
V
V
mA
ISC
Short-Circuit Current
VOUT = 2.5V, VIN = ±1V
●
10
mA
SR
Slew Rate
AV = –1, (Note 7)
●
20
V/µs
GBW
Gain Bandwidth (Note 10)
f = 200kHz
●
90
MHz
Channel Separation
VOUT = 1.5V to 3.5V, RL = 500Ω
●
80
IS
Supply Current
Note 1: Absolute Maximum Ratings are those values beyond which the
life of a device may be impaired.
Note 2: The inputs are protected by back-to-back diodes. If the differential
input voltage exceeds 0.7V, the input current should be limited to less than
10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 4: The LT1722C/LT1722I, LT1723C/LT1723I, LT1724C/LT1724I
are guaranteed functional over the operating temperature range of
–40°C to 85°C.
Note 5: The LT1722C/LT1723C/LT1724C are guaranteed to meet specified
performance from 0°C to 70°C. The LT1722C/LT1723C/LT1724C are
●
dB
6.45
mA
designed, characterized and expected to meet specified performance from
–40°C to 85°C but are not tested or QA sampled at these temperatures.
The LT1722I/LT1723I/LT1724I are guaranteed to meet specified
performance from –40°C to 85°C.
Note 6: Input offset voltage is pulse tested and is exclusive of warm-up
drift.
Note 7: Slew rate is measured between ±2V on the output with ±3V input
for ±5V supplies and ±1V on the output with ±1.5V input for single 5V
supply. (For 5V supply, the voltage levels are 2.5V referred.)
Note 8: Full power bandwidth is calculated from the slew rate:
FPBW = SR/2πVP
Note 9 : This parameter is not 100% tested.
Note 10 : This parameter is guaranteed through correlation with slew rate.
172234fa
6
LT1722/LT1723/LT1724
U W
TYPICAL PERFOR A CE CHARACTERISTICS
V+
VS = 5V
VS = ±5V
3.5
3.0
2.5
–0.5
–1.0
–1.5
–1.2
TA = 25°C
∆(VOS) < 500µV
2.0
1.5
1.0
V–
50
25
75
0
TEMPERATURE (°C)
100
1
3
2
5
4
SUPPLY VOLTAGE (±V)
INPUT VOLTAGE NOISE (nV/√Hz)
10
IB–
IB+
IB–
IB+
in
10
1
en
VS = ±5V
50
25
75
0
TEMPERATURE (°C)
100
125
1
0.01
0.1
Total Noise vs Unmatched Source
Resistance
RESISTOR NOISE
1
RS
0.1
0.01
+
–
OFFSET VOLTAGE DRIFT (µV)
TOTAL NOISE VOLTAGE (nV/√Hz)
10
TOTAL NOISE
100
1723 G07
VS = ±5V, VO = ±3V
84.0
81.5
VS = ±2.5V, VO = ±1V
79.0
76.5
74.0
100
1000
LOAD RESISTANCE (Ω)
1723 G06
VOS Shift vs VCM and VS
LT1722S8
TA = 25°C
TYPICAL DATA
25
TA = 25°C
TYPICAL PART
VS = ±6.3V
200
VS = ±6V
VS = ±5V
20
10000
300
15
VS = ±2.5V
10
100 V = ±5V
S
0
–100
5
VS = ±4V
VS = ±3V
VS = ±2.5V
–200
0
0.1
1
10
SOURCE RESISTANCE, RS (kΩ)
86.5
Warm-Up Drift vs Time
30
VS = ±5V
TA = 25°C
f = 10kHz
TA = 25°C
1723 G05
1723 G04
100
0.1
100
1
10
FREQUENCY (kHz)
89.0
VOS SHIFT (µV)
INPUT BIAS CURRENT (nA)
VS = 5V
5
1723 G03
INPUT CURRENT NOISE (pA/√Hz)
40
–60
–50 –25
–5 –4 –3 –2 –1 0 1 2 3 4
INPUT COMMON MODE VOLTAGE (V)
Open-Loop Gain
vs Resistive Load
100
–40
–200
Input Noise Spectral Density
60
–20
TA = 125°C
–100
1723 G02
Input Bias Current
vs Temperature
0
TA = –45°C
0
7
6
1723 G01
20
100
–400
0
125
TA = 25°C
–300
0.5
2.0
–50 –25
TA = 85°C
200
OPEN-LOOP GAIN (dB)
4.0
VS = ±5V
300
INPUT BIAS CURRENT (nA)
4.5
SUPPLY CURRENT (mA)
400
0.5
PER AMPLIFIER
INPUT COMMON MODE RANGE (V)
5.0
Input Bias Current
vs Common Mode Voltage
Input Common Mode Range
vs Supply Voltage
Supply Current vs Temperature
0
10 20 30 40 50 60 70 80 90 100
TIME AFTER POWER-UP (SEC)
1723 G08
–300
–5 –4 –3 –2 –1 0 1 2 3
COMMON MODE VOLTAGE (V)
4
5
1723 G09
172234fa
7
LT1722/LT1723/LT1724
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Undistorted Output Swing
vs Frequency
VOS vs Temperature
TYPICAL PART
OUTPUT VOLTAGE (VP-P)
0
VS = ±5V
–100
–200
VS = ±2.5V
–300
5.0
9
4.5
8 AV = 1, RF = 0Ω, RIN = 500Ω
7
6
5
4
3
2
–400
1
–500
–60 –40 –20
AV = –1, RF = 500Ω
0
0.1
0 20 40 60 80 100 120
TEMPERATURE (°C)
1
FREQUENCY (MHz)
82
81
80
VS = 5V, VO = ±1V
RL = 500Ω
78
77
100
RL = 500Ω
–1.0
–1.5
RL = 150Ω
–2.0
2.0
RL = 150Ω
1.5
1.0
RL = 500Ω
2.0
125
2.5
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (±V)
Gain and Phase vs Frequency
±5V
5V
5V
80
80
75
50
GAIN
40
40
30
30
20
20
0
65
60
50
10
70
70
TA = 25°C
AV = –1
RF = RG = 500Ω
–10
0.01
0.1
1
10
FREQUENCY (MHz)
10
PHASE (DEG)
GAIN (dB)
60
90
OVERSHOOT (%)
70
100
95
80
SOURCE
75
VS = 5V
70
SINK
65
50
25
0
75
TEMPERATURE (°C)
45
AV = –1, RF = 500Ω, RS = 0Ω
40
35
25
20
AV = 100
AV = 10
1
AV = 1
0.1
0.01
30
–10
100
TA = 25°C
VS = ±5V
10
AV = 1, RF = 500Ω,
RS = 0Ω
50
125
Output Impedance vs Frequency
VS = ±5V
RL = 500Ω
VIN = 2VP-P
f = 1MHz
55
100
1723 G15
100
60
0
1723 G16
SINK
85
60
–50 –25
6.0
SOURCE
VS = ±5V
90
Overshoot vs Capacitive Load
PHASE
±5V
80
5.5
105
1723 G08
1723 G13
90
10
110
TA = 25°C
VIN = 10mV
V–
50
25
0
75
TEMPERATURE (°C)
1
FREQUENCY (MHz)
Output Short-Circuit Current
vs Temperature
0.5
76
–50 –25
AV = –1, RF = 500Ω
1.5
1723 G12
OUTPUT SHORT-CIRCIUT CURRENT (mA)
RL = 500Ω
OUTPUT VOLTAGE SWING (V)
OPEN-LOOP GAIN (dB)
–0.5
RL = 150Ω
79
2.0
0
0.1
10
V+
83
2.5
Output Voltage Swing
vs Supply Voltage
86
84
AV = 1, RF = 0Ω,
RIN = 500Ω
3.0
1723 G11
Open-Loop Gain vs Temperature
VS = ±5V, VO = ±3V
3.5
0.5
1723 G10
85
4.0
VS = 5V
RL = 500Ω
2% MAX DISTORTION
1.0
VS = ±5V
RL = 150Ω
2% MAX DISTORTION
OUTPUT IMPEDANCE (Ω)
OFFSET VOLTAGE (µV)
100
10
OUTPUT VOLTAGE (VP-P)
200
Undistorted Output Swing
vs Frequency
AV = 1, RF = 0Ω, RS = 500Ω
10
20
30
40 50 60 70 80
CAPACITIVE LOAD (pF)
90 100
1723 G17
0.001
0.01
0.1
1
10
FREQUENCY (MHz)
100
1723 G18
172234fa
8
LT1722/LT1723/LT1724
U W
TYPICAL PERFOR A CE CHARACTERISTICS
TA = 25°C
AV = 1
RF = 0Ω
NO RL
±5V
5V
8
7
7
6
CL = 100pF
5
4
3
CL = 50pF
2
1
7
6
5
RF = 500Ω
4
3
2
10
FREQUENCY (MHz)
1
100
10
FREQUENCY (MHz)
100
CROSSTALK (dB)
–30
–40
–50
–60
–70
–80
–90
0.1
1
10
FREQUENCY (MHz)
–PSRR
80
+PSRR
70
60
50
40
30
20
10
0.1
1
10
FREQUENCY (MHz)
Slew Rate vs Temperature
80
90
75
VS = ±5V, SR +
70
PHASE MARGIN (DEG)
SLEW RATE (V/µs)
70
VS = ±5V, SR –
VS = ±2.5V, SR –
50
40
30
20
– 50 – 25
80
70
60
50
40
30
20
125
1723 G40
1
10
FREQUENCY (MHz)
100
1723 G24
220
TA = 25°C
AV = –1
VIN = –20dBm
RG = RF = 500Ω
215
RL = 500Ω
65
60
55
RL = 500Ω
CL = 5pF
CL = 25pF
50
40
100
0.1
Gain Bandwidth
vs Supply Voltage
RL = 150Ω
RL = 150Ω
RL = 150Ω
CL = 55pF
RL = 500Ω
2.5
3
3.5
4
5
4.5
SUPPLY VOLTAGE (±V)
5.5
210
6
1723 G41
RL = 150Ω
CL = 25pF
TA = 25°C
AV = –1
VIN = –20dBm
RG = RF = 500Ω
205
200
CL = 5pF
195
CL = 55pF
CL = 25pF
190
185
35
75
50
25
TEMPERATURE (°C)
0
90
10
0.01
100
45
TA = 25°C
AV = –1
RG = RF = 500Ω
TA = 25°C
VS = ±5V
100
Phase Margin vs Supply Voltage
100
60
110
1723 G23
1723 G22
VS = ±2.5V, SR +
100
Common Mode Rejection Ratio
vs Frequency
TA = 25°C
VS = ±5V
AV = 1
90
0
0.01
100
80
10
FREQUENCY (MHz)
1723 G21
Power Supply Rejection Ratio
vs Frequency
POWER SUPPLY REJECTION RATIO (dB)
–20
1
1723 G20
Channel Separation vs Frequency
TA = 25°C
VO = 6VP-P
RL = 150Ω
–1
100
1723 G19
–10
CL = 0pF
0
COMMON MODE REJECTION RATIO (dB)
1
3
1
–1
–1
CL = 50pF
4
1
RF = 0Ω
CL = 100pF
5
2
0
CL = 0pF
0
TA = 25°C
AV = –1
RF = RG = 500Ω
NO RL
±5V
5V
8
RF = 1k
GAIN BANDWIDTH (MHz)
GAIN (dB)
6
9
TA = 25°C
AV = 1
NO RL
NO CL
±5V
5V
8
GAIN (dB)
9
Gain vs Frequency, AV = –1
Gain vs Frequency, AV = 1
9
GAIN (dB)
Gain vs Frequency, AV = 1
CL = 5pF
RL = 500Ω
180
2.5
3
CL = 55pF
5
3.5
4.5
4
SUPPLY VOLTAGE (±V)
5.5
6
1723 G42
172234fa
9
LT1722/LT1723/LT1724
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Harmonic Distortion vs Frequency
AV = 1, VO = 0.2VP-P
Slew Rate vs Supply Voltage
SR
SR –
70
SR+
65
SR –
60
VIN = ±1.5V, VOUT_MES AT ±1V
TA = 25°C
AV = –1
RF = RG = RL = 500Ω
55
50
–40
VS = ±5V
AV = 1
RF = 0Ω
RIN = 0Ω
VO = 0.2VP-P
–50
–60
–70
RL = 150Ω, 3RD
–80
RL = 150Ω, 2ND
RL = 500Ω, 2ND
–90
RL = 500Ω, 3RD
–100
2
2.5
3
3.5 4 4.5 5 5.5
SUPPLY VOLTAGE (±V)
6
6.5
1
FREQUENCY (MHz)
Harmonic Distortion vs Frequency
AV = 2, VO = 0.2VP-P
HARMONIC DISTORTION (dBc)
HARMONIC DISTORTION (dBc)
–50
–60
RL = 150Ω, 3RD
–70
RL = 150Ω, 2ND
–80
RL = 500Ω, 3RD
–90
RL = 500Ω, 2ND
–100
0.1
–40
–50
–60
RL = 150Ω, 3RD
–70
RL = 150Ω, 2ND
–80
RL = 500Ω, 3RD
–90
RL = 500Ω, 2ND
–50
–60
–70
RL = 150Ω, 2ND
RL = 150Ω, 3RD
–80
RL = 500Ω, 3RD
RL = 500Ω, 2ND
–90
0.1
10
1
FREQUENCY (MHz)
–70
RL = 500Ω, 3RD
RL = 500Ω, 2ND
–90
10
1723 G30
Harmonic Distortion vs Frequency
AV = 2, VO = 2VP-P
–40
VS = 5V
AV = 1
RF = 0Ω
RIN = 500Ω
VO = 2VP-P
RL = 150Ω, 2ND
10
VS = ±5V
AV = 1
RF = 0Ω
RIN = 500Ω
VO = 2VP-P
1723 G29
RL = 150Ω, 3RD
–80
1
FREQUENCY (MHz)
–100
1
FREQUENCY (MHz)
HARMONIC DISTORTION (dBc)
HARMONIC DISTORTION (dBc)
–60
RL = 500Ω, 2ND
–90
0.1
VS = 5V
AV = 2
RF = 500Ω
VO = 0.2VP-P
Harmonic Distortion vs Frequency
AV = 1, VO = 2VP-P
–50
RL = 150Ω, 2ND
Harmonic Distortion vs Frequency
AV = 1, VO = 2VP-P
1723 G28
–40
–80
Harmonic Distortion vs Frequency
AV = 2, VO = 0.2VP-P
0.1
10
RL = 150Ω, 3RD
1723 G27
–100
1
FREQUENCY (MHz)
RL = 500Ω, 3RD
–70
1723 G26
–40
VS = ±5V
AV = 2
RF = 500Ω
VO = 0.2VP-P
–60
10
1723 G25
–40
–50
VS = 5V
AV = 1
RF = 0Ω
RIN = 0Ω
VO = 0.2VP-P
–100
0.1
HARMONIC DISTORTION (dBc)
SLEW RATE (V/µs)
75
–40
+
HARMONIC DISTORTION (dBc)
VIN_P-P = VS, VOUT_MES
AT 2/3 OF VIN_P-P
HARMONIC DISTORTION (dBc)
80
Harmonic Distortion vs Frequency
AV = 1, VO = 0.2VP-P
–50
VS = ±5V
AV = 2
RF = 500Ω
VO = 2VP-P
–60
RL = 150Ω, 2ND
RL = 150Ω, 3RD
–70
RL = 500Ω, 2ND
–80
–90
RL = 500Ω, 3RD
–100
–100
0.1
1
FREQUENCY (MHz)
10
1723 G31
0.1
1
FREQUENCY (MHz)
10
1723 G32
172234fa
10
LT1722/LT1723/LT1724
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Harmonic Distortion vs Frequency
AV = 2, VO = 2VP-P
–50
–60
Settling Time vs Output Step
3.0
2.5
VS = 5V
AV = 2
RF = 500Ω
VO = 2VP-P
0.1% SETTLING
2.0
OUTPUT STEP (V)
HARMONIC DISTORTION (dBc)
–40
RL = 150Ω, 3RD
RL = 150Ω, 2ND
–70
–80
RL = 500Ω, 2ND
1.5
1.0
0.01% SETTLING
VS = ±5V
AV = –1
RF = 500Ω
CF = 0pF
0.5
0
–0.5
–1.0
0.01% SETTLING
–1.5
RL = 500Ω, 3RD
–90
–2.0
0.1% SETTLING
–2.5
–100
0.1
1
FREQUENCY (MHz)
–3.0
10
70
60
80
90 100 110 120 130 140
SETTLING TIME (ns)
1723 G33
Large-Signal Transient, AV = 1
1723 G43
Small-Signal Transient, AV = 1
50mV/DIV
1V/DIV
AV = 1
RS = 500Ω
RF = 0Ω
50ns/DIV
50mV/DIV
AV = 1
RS = 0Ω
RF = 0Ω
CL = 0pF
1723 G34
Large-Signal Transient, AV = –1
50ns/DIV
AV = –1
RG = 500Ω
RF = 500Ω
50ns/DIV
1723 G37
AV = 1
RS = 0Ω
RF = 0Ω
CL = 100pF
1723 G35
Small-Signal Transient, AV = –1
50mV/DIV
1V/DIV
Small-Signal Transient, AV = 1
50ns/DIV
1723 G36
Small-Signal Transient, AV = –1
50mV/DIV
AV = –1
RG = 500Ω
RF = 500Ω
CL = 0pF
50ns/DIV
1723 G38
AV = –1
RG = 500Ω
RF = 500Ω
CL = 100pF
50ns/DIV
1723 G39
172234fa
11
LT1722/LT1723/LT1724
U
W
U U
APPLICATIO S I FOR ATIO
The LT1722/LT1723/LT1724 may be inserted directly into
many operational amplifier applications improving both
DC and AC performance, as well as noise and distortion.
VS+
+IN
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input combine with the
input capacitance to form a pole that can cause peaking or
even oscillations. In parallel with the feedback resistor, a
capacitor of value:
CF > RG • CIN/RF
should be used to cancel the input pole and optimize
dynamic performance. For unity-gain applications where
a feedback resistor is used, such as an I-to-V converter, CF
should be five times greater than CIN; an optimum value for
CF is 10pF.
Input Considerations
Each of the LT1722/LT1723/LT1724 inputs is protected
with back-to-back diodes across the bases of the NPN
input devices. If greater than 0.7V differential input voltages are anticipated, the input current must be limited to
less than 10mA with an external series resistor. Each input
also has two ESD clamp diodes—one to each supply. If an
input is driven beyond the supply, limit the current with an
external resistor to less than 10mA. The input stage
protection circuit is shown in Figure 1.
The input currents of the LT1722/LT1723/LT1724 are
typically in the tens of nA range due to the bias current
cancellation technique used at the input. As the input
offset current can be greater than either input current,
Q2
Q1
+IN
Layout and Passive Components
The LT1722/LT1723/LT1724 amplifiers are more tolerant
of less than ideal layouts than other high speed amplifiers.
For maximum performance (for example, fast settling
time) use a ground plane, short lead lengths and RF quality
bypass capacitors (0.01µF to 0.1µF). For high drive current applications, use low ESR supply bypass capacitors
(1µF to 10µF tantalum). The output/input parasitic coupling should be minimized when high frequency performance is required.
D1
D3
REXT
D2
R
D4
I1
VS –
D5
–IN
REXT
–IN
D6
I2
1723 F01
Figure 1. Input Stage Protection
adding resistance to balance source resistance is not
recommended. The value of the source resistor should be
below 12k as it actually degrades DC accuracy and also
increases noise.
Total Input Noise
The total input noise of the LT1722/LT1723/LT1724 is
optimized for a source resistance between 0.8k and 12k.
Within this range, the total input noise is dominated by the
noise of the source resistance itself. When the source
resistance is below 0.8k, voltage noise of the amplifier
dominates. When the source resistance is above 12k, the
input noise current is the dominant contributor.
Capacitive Loading
The LT1722/LT1723/LT1724 drive capacitive loads up to
100pF with unity gain. As the capacitive load increases,
both the bandwidth and the phase margin decrease
causing peaking in the frequency response and overshoot
in the transient response. When there is a need to drive a
larger capacitive load, a 25Ω series resistance assures
stability with any value of load capacitor. A feedback
capacitor also helps to reduce any peaking.
Power Dissipation
The LT1722/LT1723/LT1724 combine high speed and
large output drive in a small package. Maximum junction
temperature (TJ) is calculated from the ambient temperature (TA), power dissipation per amplifier (PD) and number
of amplifiers (n) as follows:
TJ = TA + (n • PD • θJA)
172234fa
12
LT1722/LT1723/LT1724
U
W
U U
APPLICATIO S I FOR ATIO
Power dissipation is composed of two parts. The first is
due to the quiescent supply current and the second is due
to on-chip dissipation caused by the load current.
Worst-case instantaneous power dissipation for a given
resistive load in one amplifier occurs at the maximum
supply current and when the output voltage is at half of
either supply voltage (or the maximum swing if less than
half supply voltage).
Therefore PD(MAX) in one amplifier is:
PD(MAX) = (V+ – V–)(IS(MAX)) + (V+/2)2/RL
or
PD(MAX) = (V+ – V–)(IS(MAX)) +
(V+ – VO(MAX))(VO(MAX)/RL)
Example. Worst-case conditions are: both op amps in the
LT1723IS8 are at TA = 85°C, VS = ±5V, RL = 150Ω,
VOUT = 2.5V.
Circuit Operation
The LT1722/LT1723/LT1724 circuit topology is a voltage
feedback amplifier. The operation of the circuit can be
understood by referring to the Simplified Schematic. The
first stage is a folded cascode formed by the transistors
Q1 through Q4. A degeneration resistor, R, is used in the
input stage. The current mirror Q5, Q6 is bootstrapped by
Q7. The capacitor, C, assures the bandwidth and the slew
rate performance. The output stage is formed by complementary emitter followers, Q8 through Q11. The diodes
D1 and D2 protect against input reversed biasing. The
remaining part of the circuit assures optimum voltage and
current biases for all stages.
Low noise, reduced current supply, high speed and DC
accurate parameters are distinctive features of the LT1722/
LT1723/LT1724.
PD(MAX) = 2 •[(10V)(5.95mA) + (2.5V)2/150Ω] = 203mW
TJ(MAX) = 85°C + (203mW)(190°C/W) = 124°C
which is less than the absolute maximum rating at 150°C.
W
W
SI PLIFIED SCHE ATIC
VS+
R1
R2
I5
Q3
Q4
VBIAS
C
D1
+IN
Q1
Q10
Q2
–IN
D2
R
Q7
Q5
Q6
Q8
OUT
Q9
Q11
I1
I2
I3
I4
1723 SS
VS–
172234fa
13
LT1722/LT1723/LT1724
U
PACKAGE DESCRIPTIO
S5 Package
5-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1633)
0.62
MAX
0.95
REF
2.80 – 3.10
(NOTE 4)
1.22 REF
2.60 – 3.00
1.4 MIN
3.85 MAX 2.62 REF
1.50 – 1.75
(NOTE 4)
PIN ONE
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.25 – 0.50
TYP 5 PLCS
NOTE 3
0.95 BSC
0.90 – 1.30
0.20 BSC
0.00 – 0.15
0.90 – 1.45
DATUM ‘A’
0.35 – 0.55 REF
0.09 – 0.20
(NOTE 3)
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. PACKAGE EIAJ REFERENCE IS SC-74A (EIAJ)
1.90 BSC
S5 SOT-23 0502
ATTENTION: ORIGINAL SOT23-5L PACKAGE.
MOST SOT23-5L PRODUCTS CONVERTED TO THIN SOT23
PACKAGE, DRAWING # 05-08-1635 AFTER APPROXIMATELY
APRIL 2001 SHIP DATE
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
.050 BSC
8
7
6
5
N
N
.245
MIN
.160 ±.005
1
.030 ±.005
TYP
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
× 45°
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
1
.053 – .069
(1.346 – 1.752)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
NOTE:
1. DIMENSIONS IN
2
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 0502
172234fa
14
LT1722/LT1723/LT1724
U
PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.2 – 3.45
(.126 – .136)
0.42 ± 0.04
(.0165 ± .0015)
TYP
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.65
(.0256)
BSC
8
0.52
(.206)
REF
7 6 5
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 ± 0.102
(.118 ± .004)
NOTE 4
4.90 ± 0.15
(1.93 ± .006)
DETAIL “A”
0° – 6° TYP
GAUGE PLANE
1
0.53 ± 0.015
(.021 ± .006)
2 3
4
1.10
(.043)
MAX
DETAIL “A”
0.86
(.034)
REF
0.18
(.077)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.13 ± 0.076
(.005 ± .003)
0.65
(.0256)
BSC
MSOP (MS8) 0802
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
S Package
14-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.337 – .344
(8.560 – 8.738)
NOTE 3
.045 ±.005
.050 BSC
14
N
12
11
10
9
8
N
.245
MIN
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
1
.030 ±.005
TYP
13
2
3
N/2
N/2
RECOMMENDED SOLDER PAD LAYOUT
1
.010 – .020
× 45°
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
2
3
4
5
6
7
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. DIMENSIONS IN
.014 – .019
(0.355 – 0.483)
TYP
.050
(1.270)
BSC
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
S14 0502
172234fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT1722/LT1723/LT1724
U
TYPICAL APPLICATIO
4- to 2-Wire Local Echo Cancellation Differential Receiver Amplifier
–
10pF
2k
1/2 LT1739
+
1k
50Ω
1k
–
1/2 LT1723
(n = 1)
n:1
VD
LINE
DRIVER
•
VL
100Ω
LINE
+
•R
VR
LINE
RECEIVER
L
n2
+
1/2 LT1723
–
+
50Ω
1k
1k
1/2 LT1739
–
2k
1723 TA03
10pF
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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3V Operation, 2.5mA Supply Current, 4.5nV/√Hz Max en,
60µV Max VOS
LT1800/LT1801/LT1802 Single/Dual/Quad, Low Power, 80MHz Rail-to-Rail
Precision Amplifier
1.6mA Supply Current, 350µV VOS, 2.3V Operation
LT1806/LT1807
Single/Dual, Low Noise 325MHz Rail-to-Rail Amplifiers
2.5V Operation, 550µVMAX VOS, 3.5nV/√Hz
LT1809/LT1810
Single/Dual, Low Distortion 180MHz Rail-to-Rail Amplifiers
2.5V Operation, –90dBc at 5MHz Distortion
LT1812/LT1813/LT1814 Single/Dual/Quad, 3mA, 750V/µs Amplifiers
5V Operation, 3.6mA Supply Current, 40mA Min Output Current
LT6202/LT6203/LT6204 Single/Dual/Quad, 100MHz, Low Noise Rail-to-Rail Op Amp
2nV/√Hz, 2.5mA on Single 3V Supply
172234fa
16
Linear Technology Corporation
LT/TP 1002 1K REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2002