Intersil ISL9111AEH50Z-T7A Low input voltage, high efficiency synchronous boost converter with 1a switch Datasheet

Low Input Voltage, High Efficiency Synchronous Boost
Converter with 1A Switch
ISL9111, ISL9111A
Features
The ISL9111 and ISL9111A provide a power supply solution
for single-cell, dual-cell, or three-cell alkaline, NiCd or NiMH
battery-powered applications. The device has a typical 0.8V
start-up voltage and is capable of supplying up to 5.25V output
voltage. Both devices are guaranteed to supply 100mA from a
single-cell input and 240mA from a dual-cell input when
output is 3.3V. High 1.2MHz switching frequency allows for the
use of tiny, low-profile inductors and ceramic capacitors to
minimize the size of the solution.
• Up to 97% Efficiency at Typical Operating Conditions
The ISL9111 and ISL9111A are internally compensated, fully
integrated synchronous boost converters optimized for
efficiency with minimal external components. At light load, the
device enters skip mode and consumes only 20µA of
quiescent current, resulting in higher efficiency at light loads
and maximum battery life.
• Low Quiescent Current: 20μA (Typical)
The ISL9111 and ISL9111A address both rechargeable and
non-rechargeable battery applications. The ISL9111 has a
UVLO feature, which will internally shut off at 0.7V protecting a
rechargeable battery. The ISL9111A has this feature disabled
to maximize the usable life of a non-rechargeable single cell
battery. The parts are available in fixed 3.0V, 3.3V and 5.0V
output voltage versions or an adjustable output voltage version
(ADJ). The fixed output voltage version also provides a FAULT
pin for fault condition monitoring. The ISL9111 and ISL9111A
are available in a 6 Ld SOT-23 package.
• Minimum Start-up Voltage
- 0.8V (ISL9111)
- 0.6V (ISL9111A)
• Minimum Operating Voltage
- 0.7V (ISL9111)
- 0.5V (ISL9111A)
• At VOUT = 3.3V
- 100mA Output Current @ VIN = 0.9V
- 240mA Output from @ VIN = 1.8V
• Logic Control Shutdown (Iq < 1µA)
• Output Voltage Up to 5.25V
• Output Disconnect During Shutdown
• Skip Mode Under Light Load Condition
• Undervoltage Lockout (ISL9111 Only)
• Fault Protection: OVP (ADJ Version Only), OTP, Short Circuit
• 6 Ld SOT-23 Package
Applications
• Products Including Portable HDMI and USB-OTG
• Personal Medical Products
• Wireless Mouse/Keyboard
• Bluetooth Headsets
• MP3/MP4 Players/DSC
• Single-cell, Dual-cell and Triple-cell Alkaline, NiCd, NiMH
Powered Products
100
4.7µH
VIN = 3.6V
95
6
VIN
4.7µF
VFLT
3
1k
4
VOUT
5
VIN
4.7µF
EN
FAULT
GND
2
ISL9111: 3.0/3.3/5.0V, ISL9111A: 3.0/3.3/5.0V
FIGURE 1. TYPICAL APPLICATION
December 7, 2011
FN7602.3
VOUT
1
EFFICIENCY (%)
1
SW
90
85
80
VIN = 1.8V
75
VIN = 0.9V
70
65
60
0.1
1
10
IOUT (mA)
100
1000
FIGURE 2. FIXED 5V EFFICIENCY
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL9111, ISL9111A
Block Diagram: ISL9111-ADJ, ISL9111A-ADJ
C1
VOUT
VIN
6
UVLO
VINT
C2
5
VOLTAGE
SELECTOR
START-UP
N-WELL
SWITCH
GATE
DRIVER
VOUT
OVP
SW
L1
1
AND
ANTI-CROSS
CONDUCTION
ZCD
3
SW
VOUT
OFF ON
CURRENT
SENSE
CONTROL LOGIC
R1
AND
DIGITAL
SOFT-START
CURRENT
LIMIT
FB
4
FAULT
MONITORING
gm
VOLTAGE
CLAMP
1.2MHz
OSCILLATOR
SLOPE COMP
R2
VINT
EN
REFERENCE
GENERATOR
THERMAL
SHUTDOWN
2
2
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Block Diagram: ISL9111-3.0/3.3/5.0V, ISL9111A-3.0/3.3/5.0V
C1
VOUT
VIN
6
UVLO
VINT
C2
5
VOLTAGE
SELECTOR
START-UP
N-WELL
SWITCH
GATE
DRIVER
SW
L1
1
AND
ANTI-CROSS
CONDUCTION
ZCD
VOUT
4
FAULT
SW
CURRENT
SENSE
CONTROL LOGIC
AND
EN
DIGITAL
SOFT-START
VOUT
CURRENT
LIMIT
FAULT
MONITORING
3
SLOPE COMP
gm
VOLTAGE
CLAMP
1.2MHz
OSCILLATOR
VINT
OFF ON
REFERENCE
GENERATOR
THERMAL
SHUTDOWN
2
3
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Pin Configurations
ADJUSTABLE OUTPUT
(6 LD SOT-23)
TOP VIEW
FIXED (5.0V/3.3V/3.0V)
(6 LD SOT-23)
TOP VIEW
SW
1
6
VIN
GND
2
5
VOUT
EN
3
4
FAULT
SW
1
6
VIN
GND
2
5
VOUT
EN
3
4
FB
Pin Descriptions
FIXED (5.0V, 3.3V, 3.0V)
PIN NUMBER
ADJUSTABLE OUTPUT
PIN NUMBER
SYMBOL
PIN DESCRIPTION
1
1
SW
The SW pin is the switching node of the power converter. Connect one terminal of
the inductor to the SW pin and the other to power input.
2
2
GND
System ground
3
3
EN
The EN pin is an active-high logic input for enabling the device. When asserted high,
the boost function begins. When asserted low, the device is completely disabled,
and current is blocked from flowing from the SW pin to the output and vice versa.
This pin should be tied either high to enable the device or low to disable.
4
-
FAULT
Fault output; outputs logic LOW under a number of fault conditions (see Table 1 on
page 10).
-
4
FB
Feedback pin of the converter. Connect voltage divider resistors between VOUT, FB
and GND for desired output. See Figures 3A, 4A, and 5A.
5
5
VOUT
6
6
VIN
4
Device output
Device input supply pin. Connect a 4.7µF ceramic capacitor to the power ground.
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Ordering Information
PART
MARKING
(Note 4)
PART NUMBER
(Notes 1, 2, 3)
VOUT (V)
TEMP RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL9111EH30Z-T
GAKA
3.0
-20 to +85
6 Ld SOT-23
P6.064
ISL9111EH30Z-T7A
GAKA
3.0
-20 to +85
6 Ld SOT-23
P6.064
ISL9111EH33Z-T
GALA
3.3
-20 to +85
6 Ld SOT-23
P6.064
ISL9111EH33Z-T7A
GALA
3.3
-20 to +85
6 Ld SOT-23
P6.064
ISL9111EH50Z-T
GAMA
5.0
-20 to +85
6 Ld SOT-23
P6.064
ISL9111EH50Z-T7A
GAMA
5.0
-20 to +85
6 Ld SOT-23
P6.064
ISL9111EHADJZ-T
GARA
Adjustable
-20 to +85
6 Ld SOT-23
P6.064
ISL9111EHADJZ-T7A
GARA
Adjustable
-20 to +85
6 Ld SOT-23
P6.064
ISL9111AEH30Z-T
GBAA
3.0
-20 to +85
6 Ld SOT-23
P6.064
ISL9111AEH30Z-T7A
GBAA
3.0
-20 to +85
6 Ld SOT-23
P6.064
ISL9111AEH33Z-T
GBAB
3.3
-20 to +85
6 Ld SOT-23
P6.064
ISL9111AEH33Z-T7A
GBAB
3.3
-20 to +85
6 Ld SOT-23
P6.064
ISL9111AEH50Z-T
GBAC
5.0
-20 to +85
6 Ld SOT-23
P6.064
ISL9111AEH50Z-T7A
GBAC
5.0
-20 to +85
6 Ld SOT-23
P6.064
ISL9111AEHADJZ-T
GBAD
Adjustable
-20 to +85
6 Ld SOT-23
P6.064
ISL9111AEHADJZ-T7A
GBAD
Adjustable
-20 to +85
6 Ld SOT-23
P6.064
ISL9111H30ZEVAL1Z
Evaluation Board
ISL9111H33ZEVAL1Z
Evaluation Board
ISL9111H50ZEVAL1Z
Evaluation Board
ISL9111HADJZEVAL1Z
Evaluation Board
NOTES:
1. Please refer to Tech Brief TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9111, ISL9111A. For more information on MSL please see Tech Brief
TB363.
4. The part marking is located on the bottom of the part.
5
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Absolute Maximum Ratings
Thermal Information
VIN, EN, FAULT, VOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
FB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.5V
SW Voltage
DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6.5V
Pulse < 10ns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 8.0V
ESD Ratings
Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . . . 3kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . . 250V
*Other ESD Spec should meet Level 1 requirement
Latch Up (Tested per JESD78; Class 2, Level A) . . . . . . . . . . . . . . . . 100mA
Thermal Resistance (Typical)
θJA (°C/W)
6 Ld SOT-23 (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
146
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-20°C to +125°C
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . -20°C to +85°C
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V to VOUT - 200mV
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -20°C to +85°C
Maximum DC Current from Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750mA
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTE:
5. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
VIN = 1.2V, VOUT = 3.3V, TA = +25°C (see “Typical Application Circuits” on page 7). Boldface limits apply
over the operating temperature range, -20°C to +85°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNITS
0.80
0.90
V
0.70
0.76
V
Minimum Start-up Voltage (ISL9111)
VMIN
VEN = VIN, RLOAD = 50Ω
Minimum Operating Voltage
after Start-up (ISL9111)
VUVLO
VEN = VIN, RLOAD = 50Ω
Minimum Start-up Voltage (ISL9111A)
VMIN
VEN = VIN, No Load
0.75
V
Minimum Operating Voltage
after Start-up (ISL9111A)
VOPT
VEN = VIN, No Load
0.50
V
Output Voltage Range
(ISL9111-ADJ/ISL9111A-ADJ)
VOUT
VIN < VOUT
2.5
5.25
V
Output Voltage Accuracy
(ISL9111: 3.0/3.3/5.0V,
ISL9111A: 3.0/3.3/5.0V)
VOUT
VIN = 1.2V, ILOAD = 50mA
-100
+100
mV
Feedback Voltage
(ISL9111-ADJ/ISL9111A-ADJ)
VFB
VOUT = 5V
784
816
mV
100
nA
0.68
800
Feedback Pin Input Current
Quiescent Current from VOUT
IQ1
No Load (Note 7)
20
45
μA
Shutdown Current from VIN
ISD
VEN = 0V, VIN = 1.2V, VO = 0
0.5
2
μA
1
μA
Leakage Current at SW Pin
VEN = 0V, VIN = 5V, VO = 0, TA = +25°C
N-Channel MOSFET ON-Resistance
VOUT = 5V
0.2
Ω
P-Channel MOSFET ON-Resistance
VOUT = 5V
0.35
Ω
N-Channel MOSFET Peak Current Limit
IPK
0.8
1.0
Maximum Duty Cycle
DMAX
84
87.5
PWM Switching Frequency
FOSC
1.0
1.2
Soft-Start-Up Time
1.2
A
%
1.4
MHz
1
EN Logic High
ms
0.8*VIN
EN Logic Low
FAULT Pin Leakage Current when High
VFLT = VOUT
FAULT Pin Sink Current when Low
VFLT = 0.5V
6
10
V
0.2*VIN
V
100
nA
mA
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Electrical Specifications
VIN = 1.2V, VOUT = 3.3V, TA = +25°C (see “Typical Application Circuits” on page 7). Boldface limits apply
over the operating temperature range, -20°C to +85°C. (Continued)
PARAMETER
SYMBOL
Load Regulation
MIN
(Note 6)
TEST CONDITIONS
ΔVOUT/VOUT
Line Regulation
TYP
MAX
(Note 6)
UNITS
ILOAD = 0 to 100mA
-1.5
+1.5
%
VIN = 0.8V to 1.6V, ILOAD = 1mA
-1.0
+1.0
%
Output Overvoltage Protection Threshold
(ADJ Version Only)
5.9
V
Output Overvoltage Protection Hysteresis
(ADJ Version Only)
400
mV
150
°C
25
°C
Thermal Shutdown
TSD
Thermal Shutdown Hysteresis
NOTES:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
7. IQ1 is measured at VOUT and multiplied by VOUT/VIN; thus, the equivalent input quiescent current is calculated.
Typical Application Circuits
100
4.7µH
SW
VIN
6
4.7µF
3
VOUT
VOUT
2.5V
5
VIN
EN
FB
4
357k
4.7µF
166k
GND
EFFICIENCY (%)
90
1
VIN = 1.8V
80
70
VIN = 1.2V
VIN = 0.9V
60
2
50
ISL9111, ISL9111A - ADJ
0.1
1.0
10
100
1000
IOUT (mA)
FIGURE 3A. POWER SUPPLY SOLUTION FOR 2.5V OUTPUT VOLTAGE
FIGURE 3B. EFFICIENCY AT VOUT = 2.5V
100
4.7µH
1
SW
VIN
6
4.7µF
3
VOUT
VOUT
4.0V
5
VIN
EN
FB
4
665k
4.7µF
166k
GND
VIN = 2.4V
VIN = 1.8V
80
70
VIN = 0.9V
VIN = 1.5V
60
50
2
ISL9111, ISL9111A - ADJ
FIGURE 4A. POWER SUPPLY SOLUTION FOR 4.0V OUTPUT VOLTAGE
7
EFFICIENCY (%)
90
40
0.1
1.0
10
100
1000
IOUT (mA)
FIGURE 4B. EFFICIENCY AT VOUT = 4.0V
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Typical Application Circuits (Continued)
100
4.7µH
VIN = 4.2V
1
SW
VIN
6
4.7µF
3
VOUT
5
VOUT
5.25V
VIN
EN
FB
4
923k
4.7µF
166k
GND
2
EFFICIENCY (%)
90 VIN = 3.6V
80
70
FIGURE 5A. POWER SUPPLY SOLUTION FOR 5.25V OUTPUT VOLTAGE
Detailed Description
Current Mode PWM Operation
The control scheme of the device is based on the peak current
mode control, and the control loop is compensated internally.
The peak current of the N-channel MOSFET switch is sensed to
limit the maximum current flowing through the switch and the
inductor. The typical current limit is set to 1A.
The control circuit includes ramp generator, slope compensator,
error amplifier, PWM comparator (see block diagrams on page 2
and page 3). The ramp signal is derived from the inductor
current. This ramp signal is then compared to the error amplifier
output to generate the PWM gating signals for driving both
N-channel and P-channel MOSFETs. The PWM operation is
initialized by the clock from the internal oscillator (typical
1.2MHz). The N-channel MOSFET is turned on at the beginning of
a PWM cycle, the P-channel MOSFET remains off, and the current
starts ramping up. When the sum of the ramp and the slope
compensator output reaches the error amplifier output voltage,
the PWM comparator outputs a signal to turn off the N-channel
MOSFET. Here, both MOSFETs remain off during the dead-time
interval, and then the P-channel MOSFET is turned on and
remains on until the end of this PWM cycle. During this time, the
inductor current ramps down until the next clock. At this point,
following a short dead time, the N-channel MOSFET is again
turned on, repeating as previously described.
Skip Mode Operation
The device is capable of operating in two different modes. When
the inductor current is sensed to cross zero for eight consecutive
times, the converter enters skip mode. In skip mode, each pulse
cycle is still synchronized by the PWM clock. The N-channel
MOSFET is turned on at the rising edge of the clock and turned
off when the inductor peak current reaches typically 25% of the
current limit. Then the P-channel MOSFET is turned on, and it
stays on until its current goes to zero. Subsequently, both
N-channel and P-channel MOSFETs are turned off until the next
clock cycle starts, at which time the N-channel MOSFET is turned
on again. When VOUT is 1.5% typically higher than the nominal
output voltage, the N-channel MOSFET is immediately turned off
and the P-channel MOSFET is turned on until the inductor current
8
VIN = 1.5V
60
VIN = 0.9V
50
40
ISL9111, ISL9111A - ADJ
VIN = 1.8V
0.1
1.0
10
100
1000
IOUT (mA)
FIGURE 5B. EFFICIENCY AT VOUT = 5.25V
goes to zero. The N-channel MOSFET resumes operation when
VFB falls back to its nominal value, repeating the previous
operation. The converter returns to 1.2MHz PWM mode
operation when VFB drops 1.5% below its nominal voltage.
Given the skip mode algorithm incorporated in the ISL9111 and
ISL9111A, the average value of the output voltage is
approximately 0.75% higher than the nominal output voltage
under PWM operation. This positive offset improves the load
transient response when switching from skip mode to PWM
mode operation. The ripple on the output voltage is typically
1.5%*VOUT(nominal) when input voltage is sufficiently lower than
output voltage, and it increases as input voltage approaches
output voltage. Figure 9 shows the ripple voltage versus input
voltage.
Synchronous Rectifier
The ISL9111 and ISL9111A integrate one N-channel MOSFET
and one P-channel MOSFET to realize synchronous boost
converters. Because the commonly used discrete Schottky
rectifier is replaced with the low rDS(ON) P-channel MOSFET, the
power conversion efficiency reaches a value above 90%. Since a
typical step-up converter has a conduction path from the input to
the output via the body diode of the P-channel MOSFET, a special
circuit (see Block Diagrams on page 2 and page 3) is used to
reverse the polarity of the P-channel body diode when the part is
shut down. This configuration completely disconnects the load
from the input during shutdown of the converter. The benefit of
this feature is that the battery will not be completely depleted
during shutdown of the converter. No additional components are
needed to disconnect the battery from the output of the
converter.
Minimum Startup and Minimum Operating
Voltage
The ISL9111 and ISL9111A address applications with
rechargeable and non-rechargeable battery cells.
1. The ISL9111 has a UVLO feature. The part can start up with a
0.8V typical input voltage and internally shut off when the
battery drops below 0.7V to protect a rechargeable battery
from over-discharge.
FN7602.3
December 7, 2011
ISL9111, ISL9111A
2. UVLO function is disabled in the ISL9111A. The minimum
start-up voltage can be as low as 0.6V, and minimum
operating voltage can be as low as 0.5V after start-up. The
advantage of minimum operating voltage maximizes the
performance of a non-rechargeable battery, allowing the
system to operate until the battery is fully depleted.
Soft-start
When the device is enabled, the start-up cycle starts with linear
phase. During linear phase, the rectifying switch is turned on in a
current limited configuration, delivering about 200mA, until the
output capacitor is charged to approximately 90% of the input
voltage. At this point, PWM begins, and thus, boost operation
starts. If the output voltage is below 2.3V, PWM switching is done
at a fixed duty-cycle of 75% until the output voltage reaches 2.3V.
When the output voltage exceeds 2.3V, the closed-loop current
mode PWM loop overrides the duty cycle until the output voltage
is regulated. Peak inductor current is ramped to the final value
(typically 1A) during the soft-start period to limit in-rush current
from the input source. Fault monitoring begins approximately
2ms after the device is enabled.
carry high switching current should be routed wide and short. A
solid power ground plane is important for EMI suppression.
The switching node (SW pin) of the converter and the traces
connected to this pin are noisy. Noise sensitive traces such as the
feedback trace should be kept away from SW pin and traces. The
voltage divider should be placed close to the feedback pin to
prevent noise pickup. Figure 6 shows the recommended EVB
layout.
VIN
VOUT
Over-temperature Protection (OTP)
The device offers over-temperature protection. A temperature
sensor circuit is integrated and monitors the internal IC
temperature. Once the temperature exceeds the preset threshold
(typically +150°C), the IC shuts down immediately. The OTP has
a typical hysteresis of +25°C. When the device temperature
decreases by this, the device starts operating.
Overvoltage Protection (OVP)
The adjustable version of the ISL9111 and ISL9111A have built
in overvoltage protection (OVP) to enhance product robustness
for transient up to 8V on SW pin. VOUT is actively monitored, and
should the voltage reach 5.9V (typical), the device will stop
switching. This turns off both power MOSFETs and the stored
inductor energy is discharged to VOUT through the body diode of
the synchronous rectifier.
Fault Monitoring and Reporting
Fault monitoring starts 2ms after start-up. Table 1 shows the
response to different detected faults. Any fault condition shown
in Table 1 causes the FAULT pin to be taken low. The FAULT pin
will not release until VIN and VOUT fully collapse or until the fault
condition is removed.
Board Layout Recommendations
The ISL9111 and ISL9111A are high frequency switching boost
converters. Accordingly, the converter creates fast voltage
changes and high switching current that may cause EMI and
stability issues if good PCB layout practices are not followed.
Although the ISL9111 and ISL9111A can tolerate short durations
of 8.0V transients, prolonged or higher amplitude excursions may
damage the device. Care should be taken to minimize the trace
inductance and reduce the area of the power loop.
Power components such as input capacitor, inductor and output
capacitor should be placed close to the device. Board traces that
9
GND
GND
FIGURE 6. RECOMMENDED EVALUATION BOARD LAYOUT
Fixed Output Voltage and Adjustable Output
Voltage
ISL9111 and ISL9111A offer options for fixed output voltages of
5V, 3.3V and 3V, or an adjustable output voltage.
For fixed output voltage versions (ISL9111-5.0, ISL9111A-5.0,
ISL9111-3.3, ISL9111A-3.3, ISL9111-3.0, ISL9111A-3.0), an
internal voltage divider is used (see “Block Diagram: ISL91113.0/3.3/5.0V, ISL9111A-3.0/3.3/5.0V” on page 3). For the
adjustable output voltage version (ISL9111-ADJ, ISL9111A -ADJ),
the output voltage is programmed by connecting two external
voltage divider resistors among OUT, FB and GND (see “Block
Diagram: ISL9111-ADJ, ISL9111A-ADJ” on page 2).
Output Voltage Setting Resistor Selection
For the ISL9111 adjustable output version, the resistors, R1 and
R2, as shown in the block diagram on page 2, set the desired
output voltage values. The output voltage can be calculated using
Equation 1:
R 1⎞
⎛
V O = V FB • ⎜ 1 + -------⎟
R
⎝
2⎠
(EQ. 1)
where VFB is the internal feedback reference voltage (0.8V
typical). The current flowing through the divider resistors is
calculated as VO/(R1 + R2). Large resistance is recommended to
minimize current into the divider and thus improve the total
efficiency of the converter. R1 and R2 should be placed close to
the feedback pin of the device to prevent noise pickup.
FN7602.3
December 7, 2011
ISL9111, ISL9111A
TABLE 1. FAULT DETECTION AND RESPONSE
FAULT CONDITION
DETECTION DETAILS
ACTION
Low Battery Voltage
(ISL9111 only)
VIN < 0.7V
Shut down until VEN or VIN is cycled.
VOUT Out of Regulation
VOUT is 10% below the target output voltage.
Shut down only if VIN and VOUT fall below 2.1V.
Device automatically restarts after 200ms.
Fault signal switches on and off when VOUT drops
out of regulation due to overload condition.
Short Circuit
VOUT falls below VIN.
Shut down immediately. Device automatically
restarts after 200ms.
Over-temperature Protection
Die temperature is > +150°C.
Switching stops. Device restarts when temperature
decreases to +125°C (typical).
Output Overvoltage Protection (ADJ
Version Only)
VOUT > 5.90V
Switching stops until VOUT drops 400mV below OVP
threshold.
Inductor Selection
Capacitor Selection
An inductor with core material suitable for high frequency
applications (e.g., ferrite) is desirable to minimize core loss and
improve efficiency. The inductor should have a low ESR to reduce
copper loss. Moreover, the inductor saturation current should be
higher than the maximum peak current of the part; i.e., 1.2A.
The part is designed to operate with an inductor value of 4.7µH to
provide stable operation across the range of load, input and
output voltages. Stable mode switching between PWM and skip
mode operation is guaranteed at this inductor value. Table 2
shows recommended inductors.
TABLE 2. INDUCTOR VENDOR INFORMATION
MANUFACTURER
SERIES
WEBSITE
Sumida
CDRH2D18/HPNP
www.sumida.com
Abracon
ASPI-0412FS
www.abracon.com
Bourns
SDR0302
www.bourns.com
Taiyo Yuden
NRS4012
www.t-yuden.com
TDK
VLF5012AT
www.tdk.com
10
INPUT CAPACITOR
A minimum 4.7µF ceramic capacitor is recommended to provide
stable operation under typical operating conditions. For input
voltage less than 1.0V application, an additional 4.7µF ceramic
capacitor is recommended for better noise filtering and EMI
suppression. The input capacitor should be placed close to the
input pin, GND pin, and the non-switching terminal of the
inductor.
OUTPUT CAPACITOR
For the output capacitor, a ceramic capacitor with small ESR is
recommended to minimize output voltage ripple. A typical 4.7µF
should be used to provide stable operation at different typical
operating conditions. The output capacitor should be placed
close to the output pin and GND pin of the device. Table 3 shows
recommended capacitors.
TABLE 3. CAPACITOR VENDOR INFORMATION
MANUFACTURER
SERIES
WEBSITE
AVX
X5R
www.avx.com
Murata
X5R
www.murata.com
Taiyo Yuden
X5R
www.t-yuden.com
TDK
X5R
www.tdk.com
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Typical Characteristics
95
95
90
VIN = 1.8V
85
EFFICIENCY (%)
EFFICIENCY (%)
90
80
75
VIN = 1.2V
70
VIN = 0.9V
65
60
VIN = 2.4V
85
80
VIN = 1.8V
75
70
65
60
55
0.1
55
1.0
10
100
1000
0.1
1.0
10
IOUT (mA)
IOUT (mA)
FIGURE 7. EFFICIENCY AT VOUT = 3.0V
300
3.3V_10mA
32.0
+85°C
31.0
200
150
IQ (μA)
VRIPPLE (mV)
1000
32.5
5.0V_10mA
31.5
3.0V_10mA
3.0V_0A
100
30.5
+25°C
30.0
29.5
-10°C
29.0
28.5
50
3.3V_0A
5.0V_0A
0
1
2
-40°C
28.0
3
4
27.5
5
0
1
2
VIN (V)
700
3.355
600
3.350
3.345
VO = 3.0V
400
VOUT (V)
500
VO = 5.0V
300
4
5
6
IOUT = 1mA(PSM)
3.340
3.335
3.330
200
VO = 3.3V
100
0
0.5
3
VIN (V)
FIGURE 10. QUIESCENT CURRENT vs TEMPERATURE
FIGURE 9. OUTPUT RIPPLE vs INPUT VOLTAGE
IOUT (mA)
100
FIGURE 8. EFFICIENCY AT VOUT = 3.3V
250
0
VIN = 1.2V
1.0
1.5
2.0
2.5
3.325
3.0 3.5
VIN (V)
4.0
4.5
5.0
5.5
FIGURE 11. MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE
11
IOUT = 50mA(PWM)
3.320
0.6
0.8
1.0
1.2
VIN (V)
1.4
1.6
1.8
FIGURE 12. LINE REGULATION, VOUT = 3.3V
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Typical Characteristics (Continued)
3.350
5.030
3.345
5.025
3.340
5.020
3.330
VOUT (V)
VOUT (V)
3.335
3.325
3.320
3.315
5.010
5.005
5.000
3.310
IOUT = 40mA(PWM)
4.995
3.305
3.300
IOUT = 10mA(PSM)
5.015
0
20
40
60
80
100
120
140
4.990
0.6
160
0.8
1.0
1.2
1.4
FIGURE 13. LOAD REGULATION, VIN = 1.2V
1000
VOUT = 3.3V
5.06
RESISTOR LOAD (Ω)
5.05
VOUT (V)
5.04
5.03
5.02
5.01
5.00
100
4.99
0
50
100
150
200
1.8
FIGURE 14. LINE REGULATION, VOUT = 5.0
5.07
4.98
1.6
VIN (V)
LOAD (mA)
250
300
350
10
CIN = 4.7µF
0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1.0 1.1 1.05 1.15 1.2
VIN (V)
LOAD (mA)
FIGURE 15. LOAD REGULATION, V IN = 3.6V
VIN = 3.6V, VOUT = 5.0V, ILOAD = 20mA
VOUT WITH 5.0V OFFSET(200mV/DIV)
FIGURE 16. START-UP WITH MINIMUM RESISTANCE
(PRELOADED) vs VIN
VIN = 3.6V, VOUT = 5.0V, ILOAD = 200mA
VOUT WITH 5.0V OFFSET(50mV/DIV)
INDUCTOR CURRENT(200mA/DIV)
INDUCTOR CURRENT(200mA/DIV)
SW(2.0V/DIV)
SW(2.0V/DIV)
FIGURE 17. SKIP MODE WAVEFORM
12
FIGURE 18. PWM WAVEFORM
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Typical Characteristics (Continued)
VIN = 3.6V, VOUT = 5.0V, ILOAD = 50mA
VIN = 3.6V, VOUT = 5.0V, ILOAD = 200mA
EN(5.0V/DIV)
EN(5.0V/DIV)
VOUT(2.0V/DIV)
VOUT(2.0V/DIV)
INDUCTOR CURRENT(200mA)
INDUCTOR CURRENT(200mA)
SW(2.0V/DIV)
SW(2.0V/DIV)
FIGURE 19. START-UP AFTER ENABLE
FIGURE 20. START-UP AFTER ENABLE
VIN = 3.6V, VOUT = 5.0V
VIN = 3.6V, VOUT = 5.0V
VOUT WITH 5.0V OFFSET(500mV/DIV)
VOUT WITH 5.0V OFFSET(500mV/DIV)
ILOAD = 20mA TO 200mA
ILOAD = 20mA TO 100mA
FIGURE 22. LOAD TRANSIENT RESPONSE
FIGURE 21. LOAD TRANSIENT RESPONSE
VIN = 3.0V TO 3.6V, VOUT = 5.0V, ILOAD = 200mA
VOUT WITH 5.0V OFFSET(200mV/DIV)
VIN(1.0V/DIV)
FIGURE 23. LINE TRANSIENT
13
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make
sure you have the latest revision.
DATE
REVISION
December 7, 2011
FN7602.3
CHANGE
Initial release to web.
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on
intersil.com: ISL9111, ISL9111A
To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
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14
FN7602.3
December 7, 2011
ISL9111, ISL9111A
Package Outline Drawing
P6.064
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
Rev 4, 2/10
0-8°
1.90
0.95
0.08-0.22
D
A
6
5
4
2.80
PIN 1
INDEX AREA
1.60 +0.15/-0.10
3
3
(0.60)
1
2
3
0.20 C
2x
0.40 ±0.10
B
SEE DETAIL X
3
0.20 M C A-B D
END VIEW
TOP VIEW
10° TYP
(2 PLCS)
2.90 ±0.10
3
1.15 +0.15/-0.25
C
0.10 C
SEATING PLANE
0.00-0.15
SIDE VIEW
(0.25)
GAUGE
PLANE
1.45 MAX
DETAIL "X"
0.45±0.1
4
(0.95)
(0.60)
(1.20)
(2.40)
NOTES:
1.
Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2.
Dimensioning and tolerancing conform to ASME Y14.5M-1994.
3.
Dimension is exclusive of mold flash, protrusions or gate burrs.
4.
Foot length is measured at reference to guage plane.
5.
Package conforms to JEDEC MO-178AB.
TYPICAL RECOMMENDED LAND PATTERN
15
FN7602.3
December 7, 2011